[edk2-devel] [PATCH v2 1/1] UefiCpuPkg/CpuCommonFeaturesLib: Update processor location info

[Laszlo Ersek]

On 06/01/21 09:24, Daoxiang wrote:
> From: Daoxiang Li <daoxiang.li at intel.com>
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424
> 
> Processor location information check needs to updated
> When Core 0 is disabled
> 
> Signed-off-by: Daoxiang Li <daoxiang.li at intel.com>
> CC: Eric Dong <eric.dong at intel.com>
> CC: Ray Ni <ray.ni at intel.com>
> CC: Laszlo Ersek <lersek at redhat.com>
> CC: Rahul Kumar <rahul1.kumar at intel.com>
> ---
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c          | 4 ++--
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c | 4 ++--
>  UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c         | 6 +++---
>  3 files changed, 7 insertions(+), 7 deletions(-)

I defer this to Eric, Ray, and Rahul.

Thanks
Laszlo

> 
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> index e6e5db75917c..c867802f0bb0 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
> @@ -63,9 +63,9 @@ C1eInitialize (
>  {
>    //
>    // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is Package, only program
> -  // MSR_FEATURE_CONFIG for thread 0 core 0 in each package.
> +  // MSR_FEATURE_CONFIG once for each package.
>    //
> -  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> +  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>    return RETURN_SUCCESS;
>    }
>  
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> index bb5d983d1f4b..a3a2861cee5b 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
> @@ -152,10 +152,10 @@ McaInitialize (
>  
>    //
>    // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for below processor type, only program
> -  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package.
> +  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package.
>    //
>    if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
> -    if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> +    if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>        return RETURN_SUCCESS;
>      }
>    }
> diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> index 8450c7ea3eaf..3c4c1bc706ba 100644
> --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
> @@ -130,10 +130,10 @@ PpinInitialize (
>    // Support function already check the processor which support PPIN feature, so this function not need
>    // to check the processor again.
>    //
> -  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL for
> -  // thread 0 core 0 in each package.
> +  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL
> +  // once for each package.
>    //
> -  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {
> +  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {
>      return RETURN_SUCCESS;
>    }
>  
> 



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