[edk2-devel] [edk2-platforms] [PATCH v1 1/9] IpmiFeaturePkg: Add IPMI driver Include headers
Nate DeSimone
nathaniel.l.desimone at intel.com
Tue Mar 2 02:27:56 UTC 2021
From: Isaac Oram <isaac.w.oram at intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3242
Adds header files for the IPMI transport drivers.
Cc: Sai Chaganty <rangasai.v.chaganty at intel.com>
Cc: Liming Gao <gaoliming at byosoft.com.cn>
Cc: Michael Kubacki <michael.kubacki at microsoft.com>
Signed-off-by: Isaac Oram <isaac.w.oram at intel.com>
Co-authored-by: Nate DeSimone <nathaniel.l.desimone at intel.com>
---
.../Include/Library/IpmiBaseLib.h | 50 +++
.../Include/Library/IpmiCommandLib.h | 19 +-
.../Include/Ppi/IpmiTransportPpi.h | 68 ++++
.../Include/Protocol/IpmiTransportProtocol.h | 75 ++++
.../IpmiFeaturePkg/Include/ServerManagement.h | 337 ++++++++++++++++++
.../IpmiFeaturePkg/Include/SmStatusCodes.h | 98 +++++
6 files changed, 646 insertions(+), 1 deletion(-)
create mode 100644 Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiBaseLib.h
create mode 100644 Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Ppi/IpmiTransportPpi.h
create mode 100644 Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Protocol/IpmiTransportProtocol.h
create mode 100644 Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/ServerManagement.h
create mode 100644 Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/SmStatusCodes.h
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiBaseLib.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiBaseLib.h
new file mode 100644
index 0000000000..8487ace5ba
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiBaseLib.h
@@ -0,0 +1,50 @@
+/** @file
+ IPMI Command Library Header File.
+
+ @copyright
+ Copyright 2011 - 2021 Intel Corporation. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _IPMI_BASE_LIB_H_
+#define _IPMI_BASE_LIB_H_
+
+//
+// Prototype definitions for IPMI Library
+//
+/**
+ Initialize the global varible with the pointer of IpmiTransport Protocol.
+
+ @retval EFI_SUCCESS - Always return success
+
+**/
+EFI_STATUS
+InitializeIpmiBase (
+ VOID
+ );
+
+/**
+ Routine to send commands to BMC.
+
+ @param NetFunction - Net function of the command
+ @param Command - IPMI Command
+ @param CommandData - Command Data
+ @param CommandDataSize - Size of CommandData
+ @param ResponseData - Response Data
+ @param ResponseDataSize - Response Data Size
+
+ @retval EFI_NOT_AVAILABLE_YET - IpmiTransport Protocol is not installed yet
+
+**/
+EFI_STATUS
+IpmiSubmitCommand (
+ IN UINT8 NetFunction,
+ IN UINT8 Command,
+ IN UINT8 *CommandData,
+ IN UINT32 CommandDataSize,
+ OUT UINT8 *ResponseData,
+ OUT UINT32 *ResponseDataSize
+ );
+
+#endif
+
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiCommandLib.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiCommandLib.h
index 9b761717d4..18f9d123c9 100644
--- a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiCommandLib.h
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Library/IpmiCommandLib.h
@@ -1,7 +1,7 @@
/** @file
This library abstract how to send/receive IPMI command.
-Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2018-2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -143,6 +143,23 @@ IpmiSetPowerRestorePolicy (
OUT IPMI_SET_POWER_RESTORE_POLICY_RESPONSE *ChassisControlResponse
);
+//
+// NetFnStorage
+//
+EFI_STATUS
+EFIAPI
+IpmiSetSystemBootOptions (
+ IN IPMI_SET_BOOT_OPTIONS_REQUEST *BootOptionsRequest,
+ OUT IPMI_SET_BOOT_OPTIONS_RESPONSE *BootOptionsResponse
+ );
+
+EFI_STATUS
+EFIAPI
+IpmiGetSystemBootOptions (
+ IN IPMI_GET_BOOT_OPTIONS_REQUEST *BootOptionsRequest,
+ OUT IPMI_GET_BOOT_OPTIONS_RESPONSE *BootOptionsResponse
+ );
+
//
// NetFnStorage
//
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Ppi/IpmiTransportPpi.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Ppi/IpmiTransportPpi.h
new file mode 100644
index 0000000000..9ecb20f9bf
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Ppi/IpmiTransportPpi.h
@@ -0,0 +1,68 @@
+/** @file
+ IPMI Ttransport PPI Header File.
+
+ @copyright
+ Copyright 2014 - 2021 Intel Corporation. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _IPMI_TRANSPORT_PPI_H_
+#define _IPMI_TRANSPORT_PPI_H_
+
+#include "ServerManagement.h"
+
+typedef struct _PEI_IPMI_TRANSPORT_PPI PEI_IPMI_TRANSPORT_PPI;
+
+#define PEI_IPMI_TRANSPORT_PPI_GUID \
+ { \
+ 0x7bf5fecc, 0xc5b5, 0x4b25, 0x81, 0x1b, 0xb4, 0xb5, 0xb, 0x28, 0x79, 0xf7 \
+ }
+
+//
+// Common Defines
+//
+typedef UINT32 BMC_STATUS;
+
+#define BMC_OK 0
+#define BMC_SOFTFAIL 1
+#define BMC_HARDFAIL 2
+#define BMC_UPDATE_IN_PROGRESS 3
+#define BMC_NOTREADY 4
+
+
+//
+// IPMI Function Prototypes
+//
+typedef
+EFI_STATUS
+(EFIAPI *PEI_IPMI_SEND_COMMAND) (
+ IN PEI_IPMI_TRANSPORT_PPI *This,
+ IN UINT8 NetFunction,
+ IN UINT8 Lun,
+ IN UINT8 Command,
+ IN UINT8 *CommandData,
+ IN UINT32 CommandDataSize,
+ OUT UINT8 *ResponseData,
+ OUT UINT32 *ResponseDataSize
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PEI_IPMI_GET_CHANNEL_STATUS) (
+ IN PEI_IPMI_TRANSPORT_PPI *This,
+ OUT BMC_STATUS *BmcStatus,
+ OUT SM_COM_ADDRESS *ComAddress
+ );
+
+//
+// IPMI TRANSPORT PPI
+//
+struct _PEI_IPMI_TRANSPORT_PPI {
+ UINT64 Revision;
+ PEI_IPMI_SEND_COMMAND IpmiSubmitCommand;
+ PEI_IPMI_GET_CHANNEL_STATUS GetBmcStatus;
+};
+
+extern EFI_GUID gPeiIpmiTransportPpiGuid;
+
+#endif
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Protocol/IpmiTransportProtocol.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Protocol/IpmiTransportProtocol.h
new file mode 100644
index 0000000000..2ee6f98e07
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/Protocol/IpmiTransportProtocol.h
@@ -0,0 +1,75 @@
+/** @file
+ IPMITtransport Protocol Header File.
+
+ @copyright
+ Copyright 2011 - 2021 Intel Corporation. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _IPMI_TRANSPORT_PROTO_H_
+#define _IPMI_TRANSPORT_PROTO_H_
+
+#include <ServerManagement.h>
+
+typedef struct _IPMI_TRANSPORT IPMI_TRANSPORT;
+
+#define IPMI_TRANSPORT_PROTOCOL_GUID \
+ { \
+ 0x6bb945e8, 0x3743, 0x433e, 0xb9, 0xe, 0x29, 0xb3, 0xd, 0x5d, 0xc6, 0x30 \
+ }
+
+#define SMM_IPMI_TRANSPORT_PROTOCOL_GUID \
+{ \
+ 0x8bb070f1, 0xa8f3, 0x471d, 0x86, 0x16, 0x77, 0x4b, 0xa3, 0xf4, 0x30, 0xa0 \
+}
+
+//
+// Common Defines
+//
+typedef UINT32 BMC_STATUS;
+
+#define BMC_OK 0
+#define BMC_SOFTFAIL 1
+#define BMC_HARDFAIL 2
+#define BMC_UPDATE_IN_PROGRESS 3
+#define BMC_NOTREADY 4
+
+//
+// IPMI Function Prototypes
+//
+typedef
+EFI_STATUS
+(EFIAPI *IPMI_SEND_COMMAND) (
+ IN IPMI_TRANSPORT *This,
+ IN UINT8 NetFunction,
+ IN UINT8 Lun,
+ IN UINT8 Command,
+ IN UINT8 *CommandData,
+ IN UINT32 CommandDataSize,
+ OUT UINT8 *ResponseData,
+ OUT UINT32 *ResponseDataSize
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *IPMI_GET_CHANNEL_STATUS) (
+ IN IPMI_TRANSPORT *This,
+ OUT BMC_STATUS *BmcStatus,
+ OUT SM_COM_ADDRESS *ComAddress
+ );
+
+//
+// IPMI TRANSPORT PROTOCOL
+//
+struct _IPMI_TRANSPORT {
+ UINT64 Revision;
+ IPMI_SEND_COMMAND IpmiSubmitCommand;
+ IPMI_GET_CHANNEL_STATUS GetBmcStatus;
+ EFI_HANDLE IpmiHandle;
+ UINT8 CompletionCode;
+};
+
+extern EFI_GUID gIpmiTransportProtocolGuid;
+extern EFI_GUID gSmmIpmiTransportProtocolGuid;
+
+#endif
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/ServerManagement.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/ServerManagement.h
new file mode 100644
index 0000000000..244b86e91a
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/ServerManagement.h
@@ -0,0 +1,337 @@
+/** @file
+ Generic Definations for Server Management Header File.
+
+ @copyright
+ Copyright 1999 - 2021 Intel Corporation. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SERVER_MANAGEMENT_H_
+#define _SERVER_MANAGEMENT_H_
+
+//
+// Defines
+//
+#define PRIM_IPMB_CHANNEL 0x0
+#define BMC_LUN 0x0
+#define PRESENT_INTERFACE 0xE
+#define SYSTEM_INTERFACE 0xF
+#define COMPLETE_SEL_RECORD 0xFF
+#define IPMI_UNSPECIFIED_ERROR 0xFF
+
+//
+// Net Function Defines.
+//
+#define SM_CHASSIS 0x0
+#define SM_BRIDGE 0x2
+#define SM_SENSOR_EVENT 0x4
+#define SM_APPLICATION 0x6
+#define SM_FIRMWARE 0x8
+#define SM_STORAGE 0xA
+#define SM_TRANSPORT 0xC
+#define SM_GROUP_EXT 0x2C
+#define SM_OEM_GROUP 0x2E
+#define SM_INTEL_OEM 0x30
+#define SM_SOL_OEM 0x34
+
+//
+// IPMI Command Definations.
+//
+#define IPMI_GET_DEVICE_ID 1
+#define IPMI_COLD_RESET 2
+#define IPMI_WARM_RESET 3
+#define IPMI_GET_SELF_TEST_RESULTS 4
+#define IPMI_MFG_MODE_ON 5
+#define IPMI_SET_ACPI_POWER_STATE 6
+#define IPMI_GET_ACPI_POWER_STATE 7
+#define IPMI_GET_DEVICE_GUID 8
+
+#define IPMI_GET_MESSAGE_FLAGS 0x31
+#define IPMI_GET_MESSAGE 0x33
+#define IPMI_SEND_MESSAGE 0x34
+
+#define RESERVE_SEL_ENTRY 0x42
+#define ADD_SEL_ENTRY 0x44
+#define GET_SEL_ENTRY 0x43
+#define DELETE_SEL_ENTRY 0x46
+#define CLEAR_SEL_ENTRY 0x47
+#define SET_BMC_GLOBALS 0x2E
+#define GET_BMC_GLOBALS 0x2F
+#define SET_SEL_TIME 0x49
+
+#define GET_SELF_TEST_RESULTS 0x4
+
+#define NMI_ENABLE_DISABLE 0xF7
+
+//
+// Controller Attributes
+//
+#define IPMI_SENSOR_DEVICE_SUPPORT 0x1
+#define IPMB_SDR_REPOSITORY_SUPPORT 0x2
+#define IPMI_SEL_DEVICE_SUPPORT 0x4
+#define IPMI_FRU_INVENTORY_SUPPORT 0x8
+#define IPMB_EVENT_RECEIVER_SUPPORT 0x10
+#define IPMB_EVENT_GENERATOR_SUPPORT 0x20
+#define ICMB_BRIDGE_SUPPORT 0x40
+#define ICMB_CHASSIS_DEVICE_SUPPORT 0x80
+#define SM_TCP_SUPPORT 0x100
+#define SM_UDP_SUPPORT 0x200
+#define SM_IPV4_SUPPORT 0x400
+#define SM_IPV6_SUPPORT 0x800
+#define SM_RS232_SUPPORT 0x1000
+
+//
+// Sensor Type Definations
+//
+typedef enum {
+ SensorReserved,
+ SensorTemperature,
+ SensorVoltage,
+ SensorCurrent,
+ SensorFan,
+ SensorPhysicalSecurity,
+ SensorPlatformSecurityViolationAttempt,
+ SensorProcessor,
+ SensorPowerSupply,
+ SensorPowerUnit,
+ SensorCoolingDevice,
+ SensorOtherUnits,
+ SensorMemory,
+ SensorDriveSlot,
+ SensorPOSTMemoryResize,
+ SensorSystemFirmwareProgress,
+ SensorEventLoggingDisabled,
+ SensorWatchdog1,
+ SensorSystemEvent,
+ SensorCriticalInterrupt,
+ SensorButton,
+ SensorModuleBoard,
+ SensorMicrocontrollerCoprocessor,
+ SensorAddinCard,
+ SensorChassis,
+ SensorChipSet,
+ SensorOtherFRU,
+ SensorCableInterconnect,
+ SensorTerminator,
+ SensorSystemBootInitiated,
+ SensorBootError,
+ SensorOSBoot,
+ SensorOSCriticalStop,
+ SensorSlotConnector,
+ SensorSystemACPIPowerState,
+ SensorWatchdog2,
+ SensorPlatformAlert,
+ SensorEntityPresence,
+ SensorMonitorASIC,
+ SensorLAN,
+ SensorManagementSubsystemHealth
+} SM_SENSOR_TYPE;
+
+//
+// Sensor Event Type Code
+//
+#define SENSOR_THRESHOLD_EVENT_TYPE 1
+#define SENSOR_SPECIFIC_EVENT_TYPE 0x6F
+
+//
+// THRESHOLD SENSOR TYPE BIT MASK
+//
+#define LOWER_NON_CRITICAL_GOING_LOW 0x1
+#define LOWER_NON_CRITICAL_GOING_HI 0x2
+#define LOWER_CRITICAL_GOING_LOW 0x4
+#define LOWER_CRITICAL_GOING_HI 0x8
+#define LOWER_NON_RECOVER_GOING_LOW 0x10
+#define LOWER_NON_RECOVER_GOING_HI 0x20
+#define UPPER_NON_CRITICAL_GOING_LOW 0x40
+#define UPPER_NON_CRITICAL_GOING_HI 0x80
+#define UPPER_CRITICAL_GOING_LOW 0x100
+#define UPPER_CRITICAL_GOING_HI 0x200
+#define UPPER_NON_RECOVER_GOING_LOW 0x400
+#define UPPER_NON_RECOVER_GOING_HI 0x800
+
+//
+// Server Management COM Addressing types
+//
+typedef enum {
+ SmReserved,
+ SmIpmb,
+ SmIcmb1_0,
+ SmIcmb0_9,
+ Sm802_3_Lan,
+ SmRs_232,
+ SmOtherLan,
+ SmPciSmBus,
+ SmSmBus1_0,
+ SmSmBus2_0,
+ SmUsb1_x,
+ SmUsb2_x,
+ SmBmc
+} SM_CHANNEL_MEDIA_TYPE;
+
+typedef enum {
+ SmTcp,
+ SmUdp,
+ SmIcmp,
+ SmIpmi
+} SM_PROTOCOL_TYPE;
+
+typedef enum {
+ SmMessage,
+ SmRawData
+} SM_DATA_TYPE;
+
+typedef struct {
+ BOOLEAN IpAddressType;
+ UINT16 IpPort;
+ UINT8 IpAddress[16];
+} SM_IP_ADDRESS;
+
+typedef struct {
+ UINT8 SlaveAddress;
+ UINT8 LunAddress;
+ UINT8 NetFunction;
+ UINT8 ChannelAddress;
+} SM_IPMI_ADDRESS;
+
+typedef struct {
+ UINT8 SerialPortNumber;
+} SM_SERIAL_ADDRESS;
+
+typedef union {
+ SM_IP_ADDRESS IpAddress;
+ SM_IPMI_ADDRESS BmcAddress;
+ SM_SERIAL_ADDRESS SerialAddress;
+} SM_COM_ADDRESS_TYPE;
+
+typedef struct {
+ SM_CHANNEL_MEDIA_TYPE ChannelType;
+ SM_COM_ADDRESS_TYPE Address;
+} SM_COM_ADDRESS;
+
+#pragma pack(1)
+//
+// Sensor Reading Data
+//
+typedef enum {
+ DataLinear, // Linear
+ DataNaturalLog, // Ln(x)
+ DataLog10, // Log10(x)
+ DataLog2, // Log2(x)
+ Datae, // e
+ DataExp10, // Exp 10
+ DataExp2, // Exp 2
+ DataInverse, // 1/x
+ DataSqr, // Sqr
+ DataCube, // Cube
+ DataSqrt, // Square Root
+ DataCubeInverse // Cube-1 (x)
+} LINERIZATION_TYPE;
+
+typedef union {
+ UINT8 SensorUint8Data[2];
+ UINT16 SensorUint16Data;
+} SENSOR_SPLIT_DATA;
+
+typedef struct {
+ LINERIZATION_TYPE Linearization; // L
+ UINT8 Tolerance; // Tolerance
+ UINT8 AdditiveOffsetExp; // k1
+ UINT8 AccuracyExp; // Accuracy Exponential
+ UINT8 ResultExponent; // k2
+ SENSOR_SPLIT_DATA IntegerConstantMultiplier; // M
+ SENSOR_SPLIT_DATA AdditiveOffset; // B
+ SENSOR_SPLIT_DATA Accuracy; // Accuracy
+} SENSOR_CONVERSION_DATA;
+
+//
+// Server Management Controller Information
+//
+typedef struct {
+ UINT8 CompletionCode;
+ UINT8 DeviceId;
+ UINT8 DeviceRevision : 4;
+ UINT8 Reserved : 3;
+ UINT8 DeviceSdr : 1;
+ UINT8 MajorFirmwareRev : 7;
+ UINT8 UpdateMode : 1;
+ UINT8 MinorFirmwareRev;
+ UINT8 SpecificationVersion;
+ UINT8 SensorDeviceSupport : 1;
+ UINT8 SdrRepositorySupport : 1;
+ UINT8 SelDeviceSupport : 1;
+ UINT8 FruInventorySupport : 1;
+ UINT8 IPMBMessageReceiver : 1;
+ UINT8 IPMBMessageGenerator : 1;
+ UINT8 BridgeSupport : 1;
+ UINT8 ChassisSupport : 1;
+ UINT8 ManufacturerId[3];
+ UINT16 ProductId;
+ UINT32 AuxFirmwareRevInfo;
+} SM_CTRL_INFO;
+
+typedef struct {
+ UINT8 Reserved1 : 1;
+ UINT8 ControllerSlaveAddress : 7;
+ UINT8 FruDeviceId;
+ UINT8 BusId : 3;
+ UINT8 Lun : 2;
+ UINT8 Reserved : 2;
+ UINT8 LogicalFruDevice : 1;
+ UINT8 Reserved3 : 4;
+ UINT8 ChannelNumber : 4;
+} FRU_DATA_INFO;
+#pragma pack()
+
+typedef enum {
+ Unicode,
+ BcdPlus,
+ Ascii6BitPacked,
+ AsciiLatin1
+} SENSOR_ID_STRING_TYPE;
+
+//
+// SENSOR Structures
+//
+typedef struct {
+ BOOLEAN Valid; // Data is Valid
+ SENSOR_CONVERSION_DATA ConversionParam; // Conversion Parameters
+ UINT8 UpperNonRec; // Upper Non Recoverable
+ UINT8 UpperCritical; // Upper Critical
+ UINT8 UpperNonCritical; // Upper Non Critical
+ UINT8 LowerNonRec; // Lower Non Recoverable
+ UINT8 LowerCritical; // Lower Critical
+ UINT8 LowerNonCritical; // Lower Non Critical
+} SENSOR_THRESHOLD_STRUCT;
+
+typedef struct {
+ BOOLEAN Valid; // Structure Valid
+ SENSOR_CONVERSION_DATA ConversionParam; // Conversion Parameters
+ SENSOR_ID_STRING_TYPE SensorIdStringType; // Sensor ID String type
+ UINT8 NominalReading; // Nominal Reading of the Sensor
+ UINT8 SensorId[16]; // Sensor Description
+} SENSOR_READING_STRUCT;
+
+//
+// IPMI HOB
+//
+typedef struct {
+ UINT16 IoBasePort;
+} IPMI_HOB_DATA;
+
+//
+// COM Layer Callback
+//
+typedef
+EFI_STATUS
+(EFIAPI *SM_CALLBACK_PROC) (
+ OUT EFI_STATUS Status,
+ IN VOID *UserContext
+ );
+
+typedef struct {
+ SM_CALLBACK_PROC SmCallback;
+ VOID *UserContext;
+} SM_CALLBACK;
+
+#endif // _SERVER_MANAGEMENT_H_
+
diff --git a/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/SmStatusCodes.h b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/SmStatusCodes.h
new file mode 100644
index 0000000000..08cd3b21b9
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/IpmiFeaturePkg/Include/SmStatusCodes.h
@@ -0,0 +1,98 @@
+/** @file
+ Efi Server Management Status Code Header File.
+
+ @copyright
+ Copyright 2011 - 2021 Intel Corporation. <BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SM_STATUS_CODE_H_
+#define _SM_STATUS_CODE_H_
+
+//
+// Computing Unit Host Processor Subclass Error Code definitions.
+//
+#define CU_HP_EC_MISMATCH_STEPPING (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define CU_HP_EC_MISMATCH_FAMILY (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define CU_HP_EC_MISMATCH_MODEL (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define CU_HP_EC_MISMATCH_FSB (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define CU_HP_EC_MISMATCH_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define CU_HP_EC_UNSUPPORTED_PROCESSOR_FAMILY (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define CU_HP_EC_MISMATCH_CACHE_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define CU_HP_EC_UNSUPPORTED_CHIPSET (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define CU_HP_EC_MISMATCH_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+
+//
+// Computing Unit Firmware Processor Subclass Error Code definitions.
+//
+#define CU_FP_EC_FRB2_WATCHDOG_TIMEOUT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define CU_FP_EC_OS_WATCHDOG_TIMEOUT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define CU_FP_EC_SDR_EMPTY (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define CU_FP_EC_FORCE_UPDATE_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define CU_FP_EC_FW_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+
+//
+// Computing Unit Memory Subclass Error Code definitions.
+//
+#define CU_MEMORY_EC_FAILED (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define CU_MEMORY_EC_UNSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define CU_MEMORY_EC_CLTT_FAILED (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define CU_MEMORY_EC_DCPMM_INV_POP (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+
+//
+// Peripheral Class Error Code definitions.
+//
+#define P_EC_FW_CORRUPTED 0x0000000A
+#define P_EC_RESOURCE_CONSUMED_BY_BMC 0x0000000B
+
+//
+// IO Bus Subclass definitions.
+//
+#define IO_BUS_PCI_EXPRESS (IO_BUS | 0x000D0000)
+
+//
+// IO Bus Class PCI Subclass Error Code definitions.
+//
+#define IOB_PCI_EC_OUT_OF_RESOURCES (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// IO Bus Class PCI EXPRESS Subclass Error Code definitions.
+//
+#define IOB_PCI_EXP_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define IOB_PCI_EXP_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define IOB_PCI_EXP_EC_TRAINING_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define IOB_PCI_EXP_EC_DEGRADED_LINK (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define IOB_PCI_EXP_EC_IBIST_FAILED (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+//
+// Software Subclass definitions.
+//
+#define SOFTWARE_SYSTEM_ERROR (EFI_SOFTWARE | 0x00130000)
+#define SYSTEM_FRONT_PANEL (EFI_SOFTWARE | 0x00140000)
+#define SOFTWARE_EFI_BMC (EFI_SOFTWARE | 0x00150000)
+
+//
+// Software Class DXE BS Driver Subclass Progress Code definitions.
+//
+#define SW_DXE_BS_END_OF_POST (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+
+//
+// Software Class Error Code definitions.
+//
+#define SW_EC_PWD_CLEAR_JMPR_SET 0x00000012
+
+//
+// Software Class PEI Module Subclass Error Code definitions.
+//
+#define SW_PEIM_WATCHDOG_TIMEOUT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define SW_PEIM_OS_WATCHDOG_TIMEOUT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Software Class System Subclass Error Code definitions.
+//
+#define SW_EC_CMOS_DATE_TIME_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define SW_EC_BACKUP_BIOS_FLASH_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+
+#endif // _SM_STATUS_CODE_H_
+
--
2.27.0.windows.1
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