[edk2-devel] [edk2-platforms][PATCH v1 4/5] Platform/Sgi: update _OSC control method to control LPI and CPPC

Pranav Madhu pranav.madhu at arm.com
Sat May 29 12:56:33 UTC 2021


Define and use the global macro LPI_EN and CPPC_EN to enable low power
idle and CPPC support for reference design platforms. Update platform
wide _OSC control method to enable/disable low power idle and CPPC
support based on pcd PcdOscLpiEnable and PcdOscCppcEnable. The pcds
are controlled by the global macros LPI_EN and CPPC_EN.

Signed-off-by: Pranav Madhu <pranav.madhu at arm.com>
---
 Platform/ARM/SgiPkg/SgiPlatform.dec                     |  4 ++++
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc                 | 14 ++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf   |  1 +
 Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf |  1 +
 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf       |  2 ++
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf   |  2 ++
 Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf       |  2 ++
 Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf     |  2 ++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf     |  1 +
 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h             |  2 ++
 Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl        |  8 ++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl      |  8 ++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl            | 15 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl        | 15 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl            | 15 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl          | 15 +++++++++++++++
 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl          |  8 ++++++++
 17 files changed, 115 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index ffbbb24f1c33..8cd818a9bf64 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -86,5 +86,9 @@
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize|0|UINT32|0x00000023
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt|0|UINT32|0x00000024
 
+  # ACPI platform wide _OSC
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable|0|UINT32|0x00000025
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable|0|UINT32|0x00000026
+
 [Ppis]
   gNtFwConfigDtInfoPpiGuid     = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 2851cf180c0e..7e37732fb93c 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -17,6 +17,10 @@
   # To allow HDLCD display using the Graphics Output Protocol, set this to TRUE.
   DEFINE ENABLE_GOP                         = FALSE
 
+  # To enable LPI and CPPC power management functionality, set this to TRUE.
+  DEFINE LPI_EN                             = FALSE
+  DEFINE CPPC_EN                            = FALSE
+
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
 
@@ -108,6 +112,16 @@
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0x8080000000
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0x180000000
 
+!if $(LPI_EN) == TRUE
+  # Allow use of LPI in the response to _OSC method call
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable|1
+!endif
+
+!if $(CPPC_EN) == TRUE
+  # Allow use of CPPC in the response to _OSC method call
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable|1
+!endif
+
   # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x01400000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x01400000
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 8d46b001444c..ce89aa93ea7b 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -57,6 +57,7 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 473c9eff0f55..1999bc1553e9 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -66,6 +66,7 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
index c537db45e08f..25be2e276e85 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
@@ -57,6 +57,8 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
index 6bbc3fc230ae..4b36c3e5ceb2 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
@@ -57,6 +57,8 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdSmmuBase
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
index d461cbe54c68..97a87462932b 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf
@@ -57,6 +57,8 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
index 3b699b0acbb8..deaca3719ae4 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
@@ -66,6 +66,8 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
+  gArmSgiTokenSpaceGuid.PcdOscCppcEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
index 3ee66b1dfd5a..a1bd71fde761 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf
@@ -57,6 +57,7 @@
   gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt
   gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
+  gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
   gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index 7b8c16b172c0..d75d54055436 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -37,6 +37,8 @@
 
 // ACPI OSC for Platform-Wide Capability
 #define OSC_CAP_CPPC_SUPPORT          (1U << 5)
+#define OSC_CAP_CPPC2_SUPPORT         (1U << 6)
+#define OSC_CAP_PLAT_COORDINATED_LPI  (1U << 7)
 #define OSC_CAP_OS_INITIATED_LPI      (1U << 8)
 
 #pragma pack(1)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
index a2258f61aeca..bd8efa544a59 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -29,6 +29,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl
index 5807658e7815..9cb2b175418c 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl
@@ -31,6 +31,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl
index a318ef48ded9..ccd98f829652 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
 
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
           If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
             /* CPPC revision 1 and below not supported */
             And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl
index 411eff84334a..b6decc77f480 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl
@@ -36,11 +36,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
 
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
           If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
             /* CPPC revision 1 and below not supported */
             And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
index 0f632673d050..db9c19780e16 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
 
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
           If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
             /* CPPC revision 1 and below not supported */
             And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl
index 622d522532a3..e084d82de7c0 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl
@@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI",
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
 
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
           If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) {
             /* CPPC revision 1 and below not supported */
             And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) {
+            if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
index e879a681fabf..a292d20d8afb 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl
@@ -28,6 +28,14 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM
             And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0)
             Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
           }
+
+          If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) {
+            if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) {
+              And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0)
+              Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0)
+            }
+          }
+
         } Else {
           And (STS0, Not (OSC_STS_MASK), STS0)
           Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0)
-- 
2.17.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#75854): https://edk2.groups.io/g/devel/message/75854
Mute This Topic: https://groups.io/mt/83169537/1813853
Group Owner: devel+owner at edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [edk2-devel-archive at redhat.com]
-=-=-=-=-=-=-=-=-=-=-=-






More information about the edk2-devel-archive mailing list