[Fedora-electronic-lab] [Fedora Electronic Lab] #57: DGC - Digital Gate Compiler

Fedora Electronic Lab trac at fedorahosted.org
Tue Oct 6 21:29:40 UTC 2009

#57: DGC - Digital Gate Compiler
 Reporter:  chitlesh      |       Owner:  chitlesh 
     Type:  defect        |      Status:  new      
 Priority:  major         |   Milestone:  Fedora 13
Component:  VHDL/Verilog  |     Version:  devel    
 Keywords:  PLA           |  
 Complements espresso and eqntott

 DGC is a tool for the creation of digital netlists. DGC does an
 optimization and technology mapping for an abstract description of boolean
 functions and state machines. Output formats are EDIF, XNF and VHDL. Input
 formats are KISS, PLA and others.

Ticket URL: <https://fedorahosted.org/fedora-electronic-lab/ticket/57>
Fedora Electronic Lab <https://fedorahosted.org/fedora-electronic-lab>
Design, Simulate and Program electronics.

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