rpms/xorg-x11-drv-ati/devel radeon-6.9.0-to-git.patch, 1.1, 1.2 radeon-modeset.patch, 1.7, 1.8 xorg-x11-drv-ati.spec, 1.101, 1.102
Dave Airlie (airlied)
fedora-extras-commits at redhat.com
Thu Aug 14 06:03:08 UTC 2008
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Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs-int.fedora.redhat.com:/tmp/cvs-serv12051
Modified Files:
radeon-6.9.0-to-git.patch radeon-modeset.patch
xorg-x11-drv-ati.spec
Log Message:
* Thu Aug 14 2008 Dave Airlie <airlied at redhat.com> 6.9.0-3
- bring back modesetting
radeon-6.9.0-to-git.patch:
Index: radeon-6.9.0-to-git.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-6.9.0-to-git.patch,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- radeon-6.9.0-to-git.patch 11 Aug 2008 04:14:20 -0000 1.1
+++ radeon-6.9.0-to-git.patch 14 Aug 2008 06:02:35 -0000 1.2
@@ -703,7 +703,7 @@
ati_drv_la_LDFLAGS = -module -avoid-version
ati_drv_ladir = @moduledir@/drivers
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
-index a740df8..1da8f1f 100644
+index a740df8..633c5d3 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -1,4 +1,5 @@
@@ -712,16 +712,17 @@
#define PCI_CHIP_RV380_3152 0x3152
#define PCI_CHIP_RV380_3154 0x3154
#define PCI_CHIP_RV380_3E50 0x3E50
-@@ -330,6 +331,8 @@
+@@ -330,6 +331,9 @@
#define PCI_CHIP_R600_940A 0x940A
#define PCI_CHIP_R600_940B 0x940B
#define PCI_CHIP_R600_940F 0x940F
+#define PCI_CHIP_RV770_9440 0x9440
++#define PCI_CHIP_RV770_9441 0x9441
+#define PCI_CHIP_RV770_9442 0x9442
#define PCI_CHIP_RV610_94C0 0x94C0
#define PCI_CHIP_RV610_94C1 0x94C1
#define PCI_CHIP_RV610_94C3 0x94C3
-@@ -347,6 +350,7 @@
+@@ -347,6 +351,7 @@
#define PCI_CHIP_RV670_9507 0x9507
#define PCI_CHIP_RV670_950F 0x950F
#define PCI_CHIP_RV670_9511 0x9511
@@ -1614,7 +1615,7 @@
}
break;
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
-index 1f6fa82..364f4e1 100644
+index 1f6fa82..07e71a3 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -1,5 +1,6 @@
@@ -1624,16 +1625,17 @@
"0x3152","RV380_3152","RV380",1,,,,,"ATI Radeon Mobility X300 (M24) 3152 (PCIE)"
"0x3154","RV380_3154","RV380",1,,,,,"ATI FireGL M24 GL 3154 (PCIE)"
"0x3E50","RV380_3E50","RV380",,,,,,"ATI Radeon X600 (RV380) 3E50 (PCIE)"
-@@ -331,6 +332,8 @@
+@@ -331,6 +332,9 @@
"0x940A","R600_940A","R600",,,,,,"ATI FireGL V8650"
"0x940B","R600_940B","R600",,,,,,"ATI FireGL V8600"
"0x940F","R600_940F","R600",,,,,,"ATI FireGL V7600"
+"0x9440","RV770_9440","RV770",,,,,,"ATI Radeon 4800 Series"
++"0x9441","RV770_9441","RV770",,,,,,"ATI Radeon HD 4870 x2"
+"0x9442","RV770_9442","RV770",,,,,,"ATI Radeon 4800 Series"
"0x94C0","RV610_94C0","RV610",,,,,,"ATI RV610"
"0x94C1","RV610_94C1","RV610",,,,,,"ATI Radeon HD 2400 XT"
"0x94C3","RV610_94C3","RV610",,,,,,"ATI Radeon HD 2400 Pro"
-@@ -348,6 +351,7 @@
+@@ -348,6 +352,7 @@
"0x9507","RV670_9507","RV670",,,,,,"ATI RV670"
"0x950F","RV670_950F","RV670",,,,,,"ATI Radeon HD3870 X2"
"0x9511","RV670_9511","RV670",,,,,,"ATI FireGL V7700"
@@ -1642,7 +1644,7 @@
"0x9581","RV630_9581","RV630",1,,,,,"ATI Mobility Radeon HD 2600"
"0x9583","RV630_9583","RV630",1,,,,,"ATI Mobility Radeon HD 2600 XT"
diff --git a/src/radeon.h b/src/radeon.h
-index 4f77c3b..63655b8 100644
+index 4f77c3b..975e5d1 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -98,6 +98,36 @@
@@ -1698,7 +1700,25 @@
int CPFifoSize; /* Size of the CP command FIFO */
int CPusecTimeout; /* CP timeout in usecs */
Bool needCacheFlush;
-@@ -787,7 +817,6 @@ do { \
+@@ -640,17 +670,6 @@ typedef struct {
+ FBAreaPtr depthTexArea;
+ #endif
+
+- /* Saved scissor values */
+- uint32_t sc_left;
+- uint32_t sc_right;
+- uint32_t sc_top;
+- uint32_t sc_bottom;
+-
+- uint32_t re_top_left;
+- uint32_t re_width_height;
+-
+- uint32_t aux_sc_cntl;
+-
+ int irq;
+
+ Bool DMAForXv;
+@@ -787,7 +806,6 @@ do { \
extern void legacy_crtc_dpms(xf86CrtcPtr crtc, int mode);
extern void legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
DisplayModePtr adjusted_mode, int x, int y);
@@ -1706,7 +1726,7 @@
extern void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore);
extern void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
-@@ -872,6 +901,7 @@ extern Bool RADEONGetTMDSInfoFromBIOS(xf86OutputPtr output);
+@@ -872,6 +890,7 @@ extern Bool RADEONGetTMDSInfoFromBIOS(xf86OutputPtr output);
extern Bool RADEONGetTVInfoFromBIOS(xf86OutputPtr output);
extern Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output);
extern Bool RADEONPostCardFromBIOSTables(ScrnInfoPtr pScrn);
@@ -1714,7 +1734,7 @@
/* radeon_commonfuncs.c */
#ifdef XF86DRI
-@@ -894,6 +924,7 @@ extern DisplayModePtr RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
+@@ -894,6 +913,7 @@ extern DisplayModePtr RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
DisplayModePtr pMode);
extern void RADEONUnblank(ScrnInfoPtr pScrn);
extern Bool RADEONSetTiling(ScrnInfoPtr pScrn);
@@ -1722,7 +1742,7 @@
/* radeon_cursor.c */
extern Bool RADEONCursorInit(ScreenPtr pScreen);
-@@ -983,6 +1014,8 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
+@@ -983,6 +1003,8 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
extern void RADEONSetOutputType(ScrnInfoPtr pScrn,
RADEONOutputPrivatePtr radeon_output);
extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
@@ -1731,7 +1751,7 @@
/* radeon_tv.c */
extern void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-@@ -1046,13 +1079,11 @@ do { \
+@@ -1046,13 +1068,11 @@ do { \
#define RADEONCP_RESET(pScrn, info) \
do { \
@@ -1745,11 +1765,54 @@
} while (0)
#define RADEONCP_REFRESH(pScrn, info) \
+@@ -1064,18 +1084,6 @@ do { \
+ info->needCacheFlush = FALSE; \
+ } \
+ RADEON_WAIT_UNTIL_IDLE(); \
+- if (info->ChipFamily <= CHIP_FAMILY_RV280) { \
+- BEGIN_RING(6); \
+- OUT_RING_REG(RADEON_RE_TOP_LEFT, info->re_top_left); \
+- OUT_RING_REG(RADEON_RE_WIDTH_HEIGHT, info->re_width_height); \
+- OUT_RING_REG(RADEON_AUX_SC_CNTL, info->aux_sc_cntl); \
+- ADVANCE_RING(); \
+- } else { \
+- BEGIN_RING(4); \
+- OUT_RING_REG(R300_SC_SCISSOR0, info->re_top_left); \
+- OUT_RING_REG(R300_SC_SCISSOR1, info->re_width_height); \
+- ADVANCE_RING(); \
+- } \
+ info->CPInUse = TRUE; \
+ } \
+ } while (0)
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
-index 65ad33d..91f463a 100644
+index 65ad33d..e617fd5 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
-@@ -1046,18 +1046,6 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
+@@ -469,23 +469,6 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
+ | RADEON_GMC_CLR_CMP_CNTL_DIS
+ | RADEON_GMC_DST_PITCH_OFFSET_CNTL);
+
+-#ifdef XF86DRI
+- info->sc_left = 0x00000000;
+- info->sc_right = RADEON_DEFAULT_SC_RIGHT_MAX;
+- info->sc_top = 0x00000000;
+- info->sc_bottom = RADEON_DEFAULT_SC_BOTTOM_MAX;
+-
+- info->re_top_left = 0x00000000;
+- if (info->ChipFamily <= CHIP_FAMILY_RV280)
+- info->re_width_height = ((0x7ff << RADEON_RE_WIDTH_SHIFT) |
+- (0x7ff << RADEON_RE_HEIGHT_SHIFT));
+- else
+- info->re_width_height = ((8191 << R300_SCISSOR_X_SHIFT) |
+- (8191 << R300_SCISSOR_Y_SHIFT));
+-
+- info->aux_sc_cntl = 0x00000000;
+-#endif
+-
+ RADEONEngineRestore(pScrn);
+ }
+
+@@ -1046,18 +1029,6 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
depthSize = ((((pScrn->virtualY + 15) & ~15) * info->depthPitch
* depthCpp + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN);
@@ -2553,7 +2616,7 @@
case 6:
reg = id & 0x1fff;
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
-index ed3174a..0d7d085 100644
+index ed3174a..daaf717 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -1,6 +1,7 @@
@@ -2564,16 +2627,17 @@
{ 0x3152, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
{ 0x3154, CHIP_FAMILY_RV380, 1, 0, 0, 0, 0 },
{ 0x3E50, CHIP_FAMILY_RV380, 0, 0, 0, 0, 0 },
-@@ -250,6 +251,8 @@ RADEONCardInfo RADEONCards[] = {
+@@ -250,6 +251,9 @@ RADEONCardInfo RADEONCards[] = {
{ 0x940A, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
{ 0x940B, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
{ 0x940F, CHIP_FAMILY_R600, 0, 0, 0, 0, 0 },
+ { 0x9440, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
++ { 0x9441, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
+ { 0x9442, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x94C0, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
{ 0x94C1, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
{ 0x94C3, CHIP_FAMILY_RV610, 0, 0, 0, 0, 0 },
-@@ -267,6 +270,7 @@ RADEONCardInfo RADEONCards[] = {
+@@ -267,6 +271,7 @@ RADEONCardInfo RADEONCards[] = {
{ 0x9507, CHIP_FAMILY_RV670, 0, 0, 0, 0, 0 },
{ 0x950F, CHIP_FAMILY_RV670, 0, 0, 0, 0, 0 },
{ 0x9511, CHIP_FAMILY_RV670, 0, 0, 0, 0, 0 },
@@ -2582,7 +2646,7 @@
{ 0x9581, CHIP_FAMILY_RV630, 1, 0, 0, 0, 0 },
{ 0x9583, CHIP_FAMILY_RV630, 1, 0, 0, 0, 0 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
-index d1761d2..96b60e9 100644
+index d1761d2..79b094a 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -1,6 +1,7 @@
@@ -2593,16 +2657,17 @@
{ PCI_CHIP_RV380_3152, "ATI Radeon Mobility X300 (M24) 3152 (PCIE)" },
{ PCI_CHIP_RV380_3154, "ATI FireGL M24 GL 3154 (PCIE)" },
{ PCI_CHIP_RV380_3E50, "ATI Radeon X600 (RV380) 3E50 (PCIE)" },
-@@ -250,6 +251,8 @@ static SymTabRec RADEONChipsets[] = {
+@@ -250,6 +251,9 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_R600_940A, "ATI FireGL V8650" },
{ PCI_CHIP_R600_940B, "ATI FireGL V8600" },
{ PCI_CHIP_R600_940F, "ATI FireGL V7600" },
+ { PCI_CHIP_RV770_9440, "ATI Radeon 4800 Series" },
++ { PCI_CHIP_RV770_9441, "ATI Radeon HD 4870 x2" },
+ { PCI_CHIP_RV770_9442, "ATI Radeon 4800 Series" },
{ PCI_CHIP_RV610_94C0, "ATI RV610" },
{ PCI_CHIP_RV610_94C1, "ATI Radeon HD 2400 XT" },
{ PCI_CHIP_RV610_94C3, "ATI Radeon HD 2400 Pro" },
-@@ -267,6 +270,7 @@ static SymTabRec RADEONChipsets[] = {
+@@ -267,6 +271,7 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_RV670_9507, "ATI RV670" },
{ PCI_CHIP_RV670_950F, "ATI Radeon HD3870 X2" },
{ PCI_CHIP_RV670_9511, "ATI FireGL V7700" },
@@ -3636,7 +3701,7 @@
optstr = (char *)xf86GetOptValString(info->Options, OPTION_CONNECTORTABLE);
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
-index 39adb5e..f24deb5 100644
+index 39adb5e..ff1801f 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -1,6 +1,7 @@
@@ -3647,16 +3712,17 @@
{ PCI_CHIP_RV380_3152, PCI_CHIP_RV380_3152, RES_SHARED_VGA },
{ PCI_CHIP_RV380_3154, PCI_CHIP_RV380_3154, RES_SHARED_VGA },
{ PCI_CHIP_RV380_3E50, PCI_CHIP_RV380_3E50, RES_SHARED_VGA },
-@@ -250,6 +251,8 @@ PciChipsets RADEONPciChipsets[] = {
+@@ -250,6 +251,9 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_R600_940A, PCI_CHIP_R600_940A, RES_SHARED_VGA },
{ PCI_CHIP_R600_940B, PCI_CHIP_R600_940B, RES_SHARED_VGA },
{ PCI_CHIP_R600_940F, PCI_CHIP_R600_940F, RES_SHARED_VGA },
+ { PCI_CHIP_RV770_9440, PCI_CHIP_RV770_9440, RES_SHARED_VGA },
++ { PCI_CHIP_RV770_9441, PCI_CHIP_RV770_9441, RES_SHARED_VGA },
+ { PCI_CHIP_RV770_9442, PCI_CHIP_RV770_9442, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C0, PCI_CHIP_RV610_94C0, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C1, PCI_CHIP_RV610_94C1, RES_SHARED_VGA },
{ PCI_CHIP_RV610_94C3, PCI_CHIP_RV610_94C3, RES_SHARED_VGA },
-@@ -267,6 +270,7 @@ PciChipsets RADEONPciChipsets[] = {
+@@ -267,6 +271,7 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_RV670_9507, PCI_CHIP_RV670_9507, RES_SHARED_VGA },
{ PCI_CHIP_RV670_950F, PCI_CHIP_RV670_950F, RES_SHARED_VGA },
{ PCI_CHIP_RV670_9511, PCI_CHIP_RV670_9511, RES_SHARED_VGA },
@@ -3665,7 +3731,7 @@
{ PCI_CHIP_RV630_9581, PCI_CHIP_RV630_9581, RES_SHARED_VGA },
{ PCI_CHIP_RV630_9583, PCI_CHIP_RV630_9583, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
-index d81cbe3..aa19d6a 100644
+index d81cbe3..d650f9f 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -1,6 +1,7 @@
@@ -3676,16 +3742,17 @@
ATI_DEVICE_MATCH( PCI_CHIP_RV380_3152, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV380_3154, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV380_3E50, 0 ),
-@@ -250,6 +251,8 @@ static const struct pci_id_match radeon_device_match[] = {
+@@ -250,6 +251,9 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_R600_940A, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R600_940B, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R600_940F, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9440, 0 ),
++ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9441, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9442, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C0, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C1, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C3, 0 ),
-@@ -267,6 +270,7 @@ static const struct pci_id_match radeon_device_match[] = {
+@@ -267,6 +271,7 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_RV670_9507, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV670_950F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV670_9511, 0 ),
radeon-modeset.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -N -r 1.7 -r 1.8 radeon-modeset.patch
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -r1.7 -r1.8
--- radeon-modeset.patch 11 Aug 2008 04:14:20 -0000 1.7
+++ radeon-modeset.patch 14 Aug 2008 06:02:35 -0000 1.8
@@ -18,7 +18,7 @@
save_CFLAGS="$CFLAGS"
diff --git a/src/Makefile.am b/src/Makefile.am
-index 97c686b..9f58788 100644
+index 97c686b..0a7d1bb 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -90,12 +90,13 @@ radeon_drv_ladir = @moduledir@/drivers
@@ -33,7 +33,7 @@
$(RADEON_ATOMBIOS_SOURCES) radeon_atombios.c radeon_atomwrapper.c \
- $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c
+ $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c \
-+ drmmode_display.c
++ drmmode_display.c radeon_bufmgr_exa.c
if XMODES
radeon_drv_la_SOURCES += \
@@ -46,10 +46,10 @@
+ drmmode_display.h
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
new file mode 100644
-index 0000000..c51c51c
+index 0000000..89b1a22
--- /dev/null
+++ b/src/drmmode_display.c
-@@ -0,0 +1,680 @@
+@@ -0,0 +1,681 @@
+/*
+ * Copyright © 2007 Red Hat, Inc.
+ *
@@ -297,31 +297,27 @@
+ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+ int size;
+ unsigned long rotate_pitch;
-+
++ dri_bo *rotate_bo;
++ int ret;
+ rotate_pitch = crtc->scrn->displayWidth * drmmode->cpp;
+ size = rotate_pitch * height;
+
-+#if 0
-+ drmmode_crtc->rotate_bo = dri_bo_alloc(drmmode->bufmgr, "rotate",
-+ size, 4096, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED | DRM_BO_FLAG_CACHED_MAPPED);
-+
-+ if (!drmmode_crtc->rotate_bo) {
-+ xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR,
-+ "Couldn't allocate shadow memory for rotated CRTC\n");
++ rotate_bo = dri_bo_alloc(drmmode->bufmgr, "rotate", size, 0);
++ if (rotate_bo == NULL)
+ return NULL;
-+ }
-+
-+ dri_bo_map(drmmode_crtc->rotate_bo, 1);
++
++ radeon_bufmgr_pin(rotate_bo);
++ dri_bo_map(rotate_bo, 1);
+
+ ret = drmModeAddFB(drmmode->fd, width, height, crtc->scrn->depth,
-+ crtc->scrn->bitsPerPixel, rotate_pitch, dri_bo_get_handle(drmmode_crtc->rotate_bo), &drmmode_crtc->rotate_fb_id);
++ crtc->scrn->bitsPerPixel, rotate_pitch, radeon_bufmgr_get_handle(rotate_bo),
++ &drmmode_crtc->rotate_fb_id);
+ if (ret) {
+ ErrorF("failed to add rotate fb\n");
+ }
-+
++
++ drmmode_crtc->rotate_bo = rotate_bo;
+ return drmmode_crtc->rotate_bo->virtual;
-+#endif
-+ return NULL;
+}
+
+static PixmapPtr
@@ -357,18 +353,16 @@
+drmmode_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *data)
+{
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
++ drmmode_ptr drmmode = drmmode_crtc->drmmode;
+
+ if (rotate_pixmap)
+ FreeScratchPixmapHeader(rotate_pixmap);
+
+ if (data) {
-+#if 0
-+ /* Be sure to sync acceleration before the memory gets unbound. */
+ drmModeRmFB(drmmode->fd, drmmode_crtc->rotate_fb_id);
+ drmmode_crtc->rotate_fb_id = 0;
+ dri_bo_unreference(drmmode_crtc->rotate_bo);
+ drmmode_crtc->rotate_bo = NULL;
-+#endif
+ }
+
+}
@@ -533,7 +527,7 @@
+ "DVI",
+ "DVI",
+ "DVI",
-+ "Composite"
++ "Composite",
+ "TV",
+ "LVDS",
+ "CTV",
@@ -633,13 +627,11 @@
+ return TRUE;
+}
+
-+#if 0
+Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, dri_bufmgr *bufmgr)
+{
+ drmmode->bufmgr = bufmgr;
+ return TRUE;
+}
-+#endif
+
+void drmmode_set_fb(ScrnInfoPtr scrn, drmmode_ptr drmmode, int width, int height, int pitch, uint32_t handle)
+{
@@ -671,7 +663,6 @@
+ drmmode_crtc->cursor_map = ptr;
+}
+
-+#if 0
+Bool drmmode_is_rotate_pixmap(ScrnInfoPtr pScrn, pointer pPixData, dri_bo **bo)
+{
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
@@ -692,7 +683,6 @@
+ return FALSE;
+
+}
-+#endif
+
+static Bool drmmode_resize_fb(ScrnInfoPtr scrn, drmmode_ptr drmmode, int width, int height)
+{
@@ -728,14 +718,25 @@
+ return TRUE;
+}
+
-+#endif
++void drmmode_adjust_frame(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int x, int y, int flags)
++{
++ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
++ xf86OutputPtr output = config->output[config->compat_output];
++ xf86CrtcPtr crtc = output->crtc;
++
++ if (crtc && crtc->enabled) {
++ drmmode_set_mode_major(crtc, &crtc->mode, crtc->rotation,
++ x, y);
++ }
++}
+
++#endif
diff --git a/src/drmmode_display.h b/src/drmmode_display.h
new file mode 100644
-index 0000000..59e6307
+index 0000000..03f8119
--- /dev/null
+++ b/src/drmmode_display.h
-@@ -0,0 +1,70 @@
+@@ -0,0 +1,74 @@
+/*
+ * Copyright © 2007 Red Hat, Inc.
+ *
@@ -769,13 +770,16 @@
+
+#include "xf86drmMode.h"
+
++#include "radeon_probe.h"
++#include "radeon_bufmgr_exa.h"
++
+typedef struct {
+ int fd;
+ int fb_id;
+ drmModeResPtr mode_res;
+ drmModeFBPtr mode_fb;
+ int cpp;
-+ // dri_bufmgr *bufmgr;
++ dri_bufmgr *bufmgr;
+
+ uint32_t (*create_new_fb)(ScrnInfoPtr pScrn, int width, int height, int *pitch);
+} drmmode_rec, *drmmode_ptr;
@@ -786,7 +790,7 @@
+ drmModeCrtcPtr mode_crtc;
+ uint32_t cursor_handle;
+ void *cursor_map;
-+ // dri_bo *rotate_bo;
++ dri_bo *rotate_bo;
+ int rotate_fb_id;
+} drmmode_crtc_private_rec, *drmmode_crtc_private_ptr;
+
@@ -800,14 +804,15 @@
+
+
[...2041 lines suppressed...]
+ for (mem = info->mm.bo_list[i]; mem != NULL;
+ mem = mem->next) {
-+ if (!radeon_bind_memory(pScrn, mem)) {
-+ FatalError("Couldn't bind %s\n", mem->name);
-+
-+ }
++ if (mem->vt_bind)
++ if (!radeon_bind_memory(pScrn, mem)) {
++ FatalError("Couldn't bind %s\n", mem->name);
++ }
+ }
+ }
+ return TRUE;
@@ -4202,7 +4830,8 @@
+ for (i = 0; i < 2; i++) {
+ for (mem = info->mm.bo_list[i]; mem != NULL;
+ mem = mem->next) {
-+ radeon_unbind_memory(pScrn, mem);
++ if (mem->vt_bind)
++ radeon_unbind_memory(pScrn, mem);
+ }
+ }
+ return TRUE;
@@ -4229,20 +4858,26 @@
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ int ret;
+
++ assert(!mem->map);
++
++
+ args.handle = mem->kernel_bo_handle;
+ args.size = mem->size;
+ ret = drmCommandWriteRead(info->drmFD, DRM_RADEON_GEM_MMAP, &args, sizeof(args));
+
+ if (!ret)
+ mem->map = (void *)(unsigned long)args.addr_ptr;
-+ ErrorF("Mapped %s size %ld at %ld %p\n", mem->name, mem->size, mem->offset, mem->map);
++ // ErrorF("Mapped %s size %ld at %x %p\n", mem->name, mem->size, mem->offset, mem->map);
+ return ret;
+}
+
+void radeon_unmap_memory(ScrnInfoPtr pScrn, struct radeon_memory *mem)
+{
-+ munmap(mem->map, mem->size);
-+ mem->map = NULL;
++ assert(mem->map);
++ if (mem->map) {
++ munmap(mem->map, mem->size);
++ mem->map = NULL;
++ }
+}
+
+/* Okay radeon
@@ -4279,7 +4914,7 @@
+
+ for (c = 0; c < xf86_config->num_crtc; c++) {
+ /* cursor objects */
-+ info->mm.cursor[c] = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, cursor_size, 0, 1, "Cursor");
++ info->mm.cursor[c] = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, cursor_size, 0, 1, "Cursor", 1);
+ if (!info->mm.cursor[c]) {
+ return FALSE;
+ }
@@ -4318,7 +4953,7 @@
+
+ if (info->directRenderingEnabled) {
+ info->backPitch = pScrn->displayWidth;
-+ info->mm.back_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, screen_size, 0, 1, "Back Buffer");
++ info->mm.back_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, screen_size, 0, 1, "Back Buffer", 1);
+ if (!info->mm.back_buffer) {
+ return FALSE;
+ }
@@ -4329,7 +4964,7 @@
+ {
+ int depthCpp = (info->depthBits - 8) / 4;
+ int depth_size = RADEON_ALIGN(pScrn->virtualY, 16) * info->depthPitch * depthCpp;
-+ info->mm.depth_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, depth_size, 0, 1, "Depth Buffer");
++ info->mm.depth_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, depth_size, 0, 1, "Depth Buffer", 1);
+ if (!info->mm.depth_buffer) {
+ return FALSE;
+ }
@@ -4347,10 +4982,12 @@
+ /* allocate an object for all the EXA bits */
+ /* shove EXA + frontbuffer together until we have EXA pixmap hooks */
+ fb_size_bytes = screen_size + (remain_size_bytes - info->textureSize);
++
++ if (info->new_cs)
++ fb_size_bytes = screen_size;
+ ErrorF("fb size is %dK %dK\n", fb_size_bytes / 1024, total_size_bytes / 1024);
+
-+ fb_size_bytes = 64 * 1024 * 1024;
-+ info->mm.front_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, fb_size_bytes, 0, 1, "Front Buffer + EXA");
++ info->mm.front_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, fb_size_bytes, 0, 1, "Front Buffer + EXA", 1);
+ if (!info->mm.front_buffer) {
+ return FALSE;
+ }
@@ -4370,24 +5007,24 @@
+ ErrorF("Failed to map front buffer memory\n");
+ }
+#endif
-+ info->exa->memoryBase = info->mm.front_buffer->map;
-+ info->exa->offScreenBase = screen_size;
-+ info->exa->memorySize = fb_size_bytes;
-+
-+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-+ "Will use %ld kb for X Server offscreen at offset 0x%08lx\n",
-+ (info->exa->memorySize - info->exa->offScreenBase) /
-+ 1024, info->exa->offScreenBase);
++
++ if (!info->new_cs) {
++ info->exa->memoryBase = info->mm.front_buffer->map;
++ info->exa->offScreenBase = screen_size;
++ info->exa->memorySize = fb_size_bytes;
++ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
++ "Will use %ld kb for X Server offscreen at offset 0x%08lx\n",
++ (info->exa->memorySize - info->exa->offScreenBase) /
++ 1024, info->exa->offScreenBase);
++ }
+
+ if (info->directRenderingEnabled) {
-+ /* allocate an object for all the textures */
+ info->textureSize /= 2;
-+ info->mm.texture_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, info->textureSize, 0, 1, "Texture Buffer");
++ info->mm.texture_buffer = radeon_allocate_memory(pScrn, RADEON_POOL_VRAM, info->textureSize, 0, 1, "Texture Buffer", 1);
+ if (!info->mm.texture_buffer) {
+ return FALSE;
+ }
+ radeon_bind_memory(pScrn, info->mm.texture_buffer);
-+
+ }
+
+ if (info->drm_mode_setting) {
@@ -4405,7 +5042,7 @@
+ info->mm.gart_texture_buffer =
+ radeon_allocate_memory(pScrn, RADEON_POOL_GART,
+ info->gartTexMapSize,
-+ 0, 1, "GART texture buffers");
++ 0, 1, "GART texture buffers", 1);
+
+ if (!info->mm.gart_texture_buffer) {
+ return FALSE;
@@ -4421,12 +5058,22 @@
+}
+
+
++dri_bo *radeon_create_rotate_bo(ScrnInfoPtr pScrn, int size)
++{
++ RADEONInfoPtr info = RADEONPTR(pScrn);
++ dri_bo *bo;
++
++ bo = dri_bo_alloc(info->bufmgr, "rotate", size, 0);
++
++ radeon_bufmgr_pin(bo);
++ return bo;
++}
+
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
-index 3770abf..e14c280 100644
+index 3770abf..e8505b7 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
-@@ -182,6 +182,26 @@ typedef struct
+@@ -182,6 +182,27 @@ typedef struct
uint32_t a_data_mask;
} RADEONI2CBusRec, *RADEONI2CBusPtr;
@@ -4448,12 +5095,13 @@
+ uint32_t alignment;
+ uint32_t kernel_bo_handle;
+ uint32_t kernel_name;
++ Bool vt_bind;
+};
+
typedef struct _RADEONCrtcPrivateRec {
#ifdef USE_XAA
FBLinearPtr rotate_mem_xaa;
-@@ -198,6 +218,8 @@ typedef struct _RADEONCrtcPrivateRec {
+@@ -198,6 +219,8 @@ typedef struct _RADEONCrtcPrivateRec {
uint32_t crtc_offset;
int can_tile;
Bool enabled;
@@ -4644,9 +5292,18 @@
RADEON_COLOR_ARG_A_ZERO |
RADEON_COLOR_ARG_B_ZERO |
diff --git a/src/radeon_video.c b/src/radeon_video.c
-index ac60166..d9233a7 100644
+index ac60166..eca7846 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
+@@ -275,7 +275,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
+ memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr));
+ adaptors = newAdaptors;
+
+- if (!IS_AVIVO_VARIANT) {
++ if (!IS_AVIVO_VARIANT && !info->drm_mode_setting) {
+ overlayAdaptor = RADEONSetupImageVideo(pScreen);
+ if (overlayAdaptor != NULL) {
+ adaptors[num_adaptors++] = overlayAdaptor;
@@ -288,7 +288,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
if (info->ChipFamily != CHIP_FAMILY_RV250) {
if ((info->ChipFamily < CHIP_FAMILY_RS400)
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.101
retrieving revision 1.102
diff -u -r1.101 -r1.102
--- xorg-x11-drv-ati.spec 11 Aug 2008 20:05:28 -0000 1.101
+++ xorg-x11-drv-ati.spec 14 Aug 2008 06:02:35 -0000 1.102
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.9.0
-Release: 2%{?dist}
+Release: 3%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -35,7 +35,7 @@
%prep
%setup -q -n %{tarball}-%{version}
%patch0 -p1 -b .git
-#patch1 -p1 -b .modeset
+%patch1 -p1 -b .modeset
%build
autoreconf
@@ -67,6 +67,9 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Thu Aug 14 2008 Dave Airlie <airlied at redhat.com> 6.9.0-3
+- bring back modesetting
+
* Mon Aug 11 2008 Adam Jackson <ajax at redhat.com> 6.9.0-2
- Rebuild without modesetting since libdrm lost the API. It'll be back soon,
I'm sure.
- Previous message (by thread): rpms/bodhi/devel .cvsignore, 1.13, 1.14 bodhi.spec, 1.16, 1.17 sources, 1.13, 1.14 bodhi-0.4.10-python-fedora-0.3.patch, 1.1, NONE
- Next message (by thread): rpms/xorg-x11-drv-ati/devel xorg-x11-drv-ati.spec,1.102,1.103
- Messages sorted by:
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