rpms/xorg-x11-drv-ati/devel radeon-6.9.0-to-git.patch, 1.2, 1.3 radeon-modeset.patch, 1.9, 1.10 xorg-x11-drv-ati.spec, 1.103, 1.104
Dave Airlie (airlied)
fedora-extras-commits at redhat.com
Fri Aug 15 03:16:40 UTC 2008
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs-int.fedora.redhat.com:/tmp/cvs-serv25070
Modified Files:
radeon-6.9.0-to-git.patch radeon-modeset.patch
xorg-x11-drv-ati.spec
Log Message:
* Fri Aug 15 2008 Dave Airlie <airlied at redhat.com> 6.9.0-4
- fix bugs in modesetting and bring PLL fixes in from master
radeon-6.9.0-to-git.patch:
Index: radeon-6.9.0-to-git.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-6.9.0-to-git.patch,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- radeon-6.9.0-to-git.patch 14 Aug 2008 06:02:35 -0000 1.2
+++ radeon-6.9.0-to-git.patch 15 Aug 2008 03:16:09 -0000 1.3
@@ -731,7 +731,7 @@
#define PCI_CHIP_RV630_9581 0x9581
#define PCI_CHIP_RV630_9583 0x9583
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
-index 363addf..70650e1 100644
+index 363addf..8f5b40a 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -48,6 +48,29 @@
@@ -802,7 +802,20 @@
if (RHDAtomBiosFunc(atomBIOS->scrnIndex, atomBIOS, ATOMBIOS_EXEC, &data) == ATOM_SUCCESS) {
ErrorF("Set CRTC Timing success\n");
-@@ -235,9 +275,9 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags)
+@@ -185,7 +225,11 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags)
+ if (IS_AVIVO_VARIANT) {
+ uint32_t temp;
+
+- pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
++ if (mode->Clock > 120000) /* range limits??? */
++ pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
++ else
++ pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
++
+
+ RADEONComputePLL(&info->pll, mode->Clock, &temp, &fb_div, &ref_div, &post_div, pll_flags);
+ sclock = temp;
+@@ -235,9 +279,9 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags)
case 1:
case 2:
spc2_ptr = (PIXEL_CLOCK_PARAMETERS_V2*)&spc_param.sPCLKInput;
@@ -815,7 +828,7 @@
spc2_ptr->ucPostDiv = post_div;
spc2_ptr->ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
spc2_ptr->ucCRTC = radeon_crtc->crtc_id;
-@@ -246,9 +286,9 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags)
+@@ -246,9 +290,9 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags)
break;
case 3:
spc3_ptr = (PIXEL_CLOCK_PARAMETERS_V3*)&spc_param.sPCLKInput;
@@ -828,7 +841,7 @@
spc3_ptr->ucPostDiv = post_div;
spc3_ptr->ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
spc3_ptr->ucMiscInfo = (radeon_crtc->crtc_id << 2);
-@@ -442,9 +482,6 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
+@@ -442,9 +486,6 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
fb_location = fb_location + (char *)crtc->rotatedData - (char *)info->FB;
}
@@ -838,7 +851,7 @@
OUTREG(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location);
OUTREG(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, fb_location);
OUTREG(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format);
-@@ -459,26 +496,27 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
+@@ -459,26 +500,27 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
crtc->scrn->displayWidth);
OUTREG(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);
@@ -874,7 +887,7 @@
if (tilingChanged) {
/* need to redraw front buffer, I guess this can be considered a hack ? */
/* if this is called during ScreenInit() we don't have pScrn->pScreen yet */
-@@ -492,3 +530,126 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
+@@ -492,3 +534,126 @@ atombios_crtc_mode_set(xf86CrtcPtr crtc,
}
@@ -1137,7 +1150,7 @@
dac_data.sDacload.ucDacType = ATOM_DAC_A;
else if (radeon_output->DACType == DAC_TVDAC)
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
-index 3df61a7..334194a 100644
+index 3df61a7..8995679 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -625,6 +625,9 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
@@ -1500,6 +1513,23 @@
legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
DisplayModePtr adjusted_mode, int x, int y)
{
+@@ -1729,10 +1705,15 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ int i = 0;
+ double dot_clock = 0;
+- int pll_flags = RADEON_PLL_LEGACY | RADEON_PLL_PREFER_LOW_REF_DIV;
++ int pll_flags = RADEON_PLL_LEGACY;
+ Bool update_tv_routing = FALSE;
+ Bool tilingChanged = FALSE;
+
++ if (adjusted_mode->Clock > 120000) /* range limits??? */
++ pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
++ else
++ pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
++
+ if (info->allowColorTiling) {
+ radeon_crtc->can_tile = (adjusted_mode->Flags & (V_DBLSCAN | V_INTERLACE)) ? FALSE : TRUE;
+ tilingChanged = RADEONSetTiling(pScrn);
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 9c9ebb9..e5ddf1f 100644
--- a/src/legacy_output.c
@@ -1644,7 +1674,7 @@
"0x9581","RV630_9581","RV630",1,,,,,"ATI Mobility Radeon HD 2600"
"0x9583","RV630_9583","RV630",1,,,,,"ATI Mobility Radeon HD 2600 XT"
diff --git a/src/radeon.h b/src/radeon.h
-index 4f77c3b..975e5d1 100644
+index 4f77c3b..2348e7c 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -98,6 +98,36 @@
@@ -1684,7 +1714,21 @@
/* Provide substitutes for gcc's __FUNCTION__ on other compilers */
#if !defined(__GNUC__) && !defined(__FUNCTION__)
# define __FUNCTION__ __func__ /* C99 */
-@@ -287,6 +317,7 @@ typedef enum {
+@@ -220,7 +250,12 @@ typedef struct {
+ #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
+ #define RADEON_PLL_USE_REF_DIV (1 << 2)
+ #define RADEON_PLL_LEGACY (1 << 3)
+-#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
++#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
++#define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
++#define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
++#define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
++#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
++#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
+
+ typedef struct {
+ uint16_t reference_freq;
+@@ -287,6 +322,7 @@ typedef enum {
CHIP_FAMILY_RV620,
CHIP_FAMILY_RV635,
CHIP_FAMILY_RS780,
@@ -1692,7 +1736,7 @@
CHIP_FAMILY_LAST
} RADEONChipFamily;
-@@ -567,7 +598,6 @@ typedef struct {
+@@ -567,7 +603,6 @@ typedef struct {
Bool CPRuns; /* CP is running */
Bool CPInUse; /* CP has been used by X server */
Bool CPStarted; /* CP has started */
@@ -1700,7 +1744,7 @@
int CPFifoSize; /* Size of the CP command FIFO */
int CPusecTimeout; /* CP timeout in usecs */
Bool needCacheFlush;
-@@ -640,17 +670,6 @@ typedef struct {
+@@ -640,17 +675,6 @@ typedef struct {
FBAreaPtr depthTexArea;
#endif
@@ -1718,7 +1762,7 @@
int irq;
Bool DMAForXv;
-@@ -787,7 +806,6 @@ do { \
+@@ -787,7 +811,6 @@ do { \
extern void legacy_crtc_dpms(xf86CrtcPtr crtc, int mode);
extern void legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
DisplayModePtr adjusted_mode, int x, int y);
@@ -1726,7 +1770,7 @@
extern void RADEONRestoreCommonRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore);
extern void RADEONRestoreCrtcRegisters(ScrnInfoPtr pScrn,
-@@ -872,6 +890,7 @@ extern Bool RADEONGetTMDSInfoFromBIOS(xf86OutputPtr output);
+@@ -872,6 +895,7 @@ extern Bool RADEONGetTMDSInfoFromBIOS(xf86OutputPtr output);
extern Bool RADEONGetTVInfoFromBIOS(xf86OutputPtr output);
extern Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output);
extern Bool RADEONPostCardFromBIOSTables(ScrnInfoPtr pScrn);
@@ -1734,7 +1778,7 @@
/* radeon_commonfuncs.c */
#ifdef XF86DRI
-@@ -894,6 +913,7 @@ extern DisplayModePtr RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
+@@ -894,6 +918,7 @@ extern DisplayModePtr RADEONCrtcFindClosestMode(xf86CrtcPtr crtc,
DisplayModePtr pMode);
extern void RADEONUnblank(ScrnInfoPtr pScrn);
extern Bool RADEONSetTiling(ScrnInfoPtr pScrn);
@@ -1742,7 +1786,7 @@
/* radeon_cursor.c */
extern Bool RADEONCursorInit(ScreenPtr pScreen);
-@@ -983,6 +1003,8 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
+@@ -983,6 +1008,8 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
extern void RADEONSetOutputType(ScrnInfoPtr pScrn,
RADEONOutputPrivatePtr radeon_output);
extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
@@ -1751,7 +1795,7 @@
/* radeon_tv.c */
extern void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save);
-@@ -1046,13 +1068,11 @@ do { \
+@@ -1046,13 +1073,11 @@ do { \
#define RADEONCP_RESET(pScrn, info) \
do { \
@@ -1765,7 +1809,7 @@
} while (0)
#define RADEONCP_REFRESH(pScrn, info) \
-@@ -1064,18 +1084,6 @@ do { \
+@@ -1064,18 +1089,6 @@ do { \
info->needCacheFlush = FALSE; \
} \
RADEON_WAIT_UNTIL_IDLE(); \
@@ -2699,7 +2743,7 @@
else
vap_cntl |= (4 << R300_PVS_NUM_FPUS_SHIFT);
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
-index c63b650..1316669 100644
+index c63b650..5ab00c1 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -58,6 +58,14 @@ extern void atombios_crtc_mode_set(xf86CrtcPtr crtc,
@@ -2717,7 +2761,21 @@
void
radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
-@@ -567,6 +575,43 @@ static const xf86CrtcFuncsRec radeon_crtc_funcs = {
+@@ -220,7 +228,12 @@ RADEONComputePLL(RADEONPLLPtr pll,
+ best_freq = current_freq;
+ best_error = error;
+ best_vco_diff = vco_diff;
+- } else if ((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) {
++ } else if (((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) ||
++ ((flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) ||
++ ((flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) ||
++ ((flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) ||
++ ((flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) ||
++ ((flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) {
+ best_post_div = post_div;
+ best_ref_div = ref_div;
+ best_feedback_div = feedback_div;
+@@ -567,6 +580,43 @@ static const xf86CrtcFuncsRec radeon_crtc_funcs = {
.destroy = NULL, /* XXX */
};
@@ -4336,3 +4394,49 @@
#ifndef RADEON_VERSION_EXTRA
#define RADEON_VERSION_EXTRA ""
+diff --git a/src/radeon_video.c b/src/radeon_video.c
+index ac60166..57dcd8a 100644
+--- a/src/radeon_video.c
++++ b/src/radeon_video.c
+@@ -2586,6 +2586,7 @@ RADEONDisplayVideo(
+ RADEONOutputPrivatePtr radeon_output;
+ xf86OutputPtr output;
+ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
++ int base_offset;
+
+ is_rgb=0; is_planar=0;
+ switch(id){
+@@ -2715,6 +2716,22 @@ RADEONDisplayVideo(
+ }
+ #endif
+
++ /* Make the overlay base address as close to the buffers as possible to
++ * prevent the buffer offsets from exceeding the hardware limit of 128 MB.
++ * The base address must be aligned to a multiple of 4 MB.
++ */
++ base_offset = ((info->fbLocation +
++ min(offset1, min(offset2, min(offset3, min(offset4,
++ min(offset5, offset6)))))) & (~0 << 22)) -
++ info->fbLocation;
++
++ offset1 -= base_offset;
++ offset2 -= base_offset;
++ offset3 -= base_offset;
++ offset4 -= base_offset;
++ offset5 -= base_offset;
++ offset6 -= base_offset;
++
+ /* keep everything in 16.16 */
+
+ if (is_planar) {
+@@ -2846,6 +2863,10 @@ RADEONDisplayVideo(
+ src_w >>= 1;
+ OUTREG(RADEON_OV0_P2_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
+ OUTREG(RADEON_OV0_P3_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
++ if (info->ModeReg->ov0_base_addr != (info->fbLocation + base_offset)) {
++ info->ModeReg->ov0_base_addr = info->fbLocation + base_offset;
++ OUTREG(RADEON_OV0_BASE_ADDR, info->ModeReg->ov0_base_addr);
++ }
+ OUTREG(RADEON_OV0_VID_BUF0_BASE_ADRS, offset1);
+ OUTREG(RADEON_OV0_VID_BUF1_BASE_ADRS, offset2);
+ OUTREG(RADEON_OV0_VID_BUF2_BASE_ADRS, offset3);
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- radeon-modeset.patch 14 Aug 2008 06:57:39 -0000 1.9
+++ radeon-modeset.patch 15 Aug 2008 03:16:09 -0000 1.10
@@ -46,10 +46,10 @@
+ drmmode_display.h
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
new file mode 100644
-index 0000000..89b1a22
+index 0000000..07a5349
--- /dev/null
+++ b/src/drmmode_display.c
-@@ -0,0 +1,681 @@
+@@ -0,0 +1,680 @@
+/*
+ * Copyright © 2007 Red Hat, Inc.
+ *
@@ -381,10 +381,6 @@
+ .shadow_destroy = drmmode_crtc_shadow_destroy,
+#if 0
+ .gamma_set = i830_crtc_gamma_set,
-+ .shadow_create = i830_crtc_shadow_create,
-+ .shadow_allocate = i830_crtc_shadow_allocate,
-+ .shadow_destroy = i830_crtc_shadow_destroy,
-+ .set_cursor_colors = i830_crtc_set_cursor_colors,
+#endif
+ .destroy = NULL, /* XXX */
+};
@@ -668,6 +664,9 @@
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
+ int i;
+
++ if (pPixData == NULL)
++ return FALSE;
++
+ for (i = 0; i < config->num_crtc; i++) {
+ xf86CrtcPtr crtc = config->crtc[i];
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
@@ -812,7 +811,7 @@
+#endif
+#endif
diff --git a/src/radeon.h b/src/radeon.h
-index 975e5d1..fd4e514 100644
+index 2348e7c..4082aac 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -46,6 +46,8 @@
@@ -832,7 +831,7 @@
/* Render support */
#ifdef RENDER
#include "picturestr.h"
-@@ -398,6 +401,9 @@ typedef enum {
+@@ -403,6 +406,9 @@ typedef enum {
typedef struct _atomBiosHandle *atomBiosHandlePtr;
@@ -842,7 +841,7 @@
typedef struct {
uint32_t pci_device_id;
RADEONChipFamily chip_family;
-@@ -408,6 +414,25 @@ typedef struct {
+@@ -413,6 +419,25 @@ typedef struct {
int singledac;
} RADEONCardInfo;
@@ -868,7 +867,7 @@
typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
-@@ -607,13 +632,13 @@ typedef struct {
+@@ -612,13 +637,13 @@ typedef struct {
drm_handle_t ringHandle; /* Handle from drmAddMap */
drmSize ringMapSize; /* Size of map */
int ringSize; /* Size of ring (in MB) */
@@ -884,7 +883,7 @@
/* CP vertex/indirect buffer data */
unsigned long bufStart; /* Offset into GART space */
-@@ -636,6 +661,9 @@ typedef struct {
+@@ -641,6 +666,9 @@ typedef struct {
drmBufPtr indirectBuffer;
int indirectStart;
@@ -894,7 +893,7 @@
/* DRI screen private data */
int fbX;
int fbY;
-@@ -793,6 +821,45 @@ typedef struct {
+@@ -798,6 +826,45 @@ typedef struct {
int num_gb_pipes;
Bool has_tcl;
@@ -940,7 +939,7 @@
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
-@@ -1025,6 +1092,22 @@ extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode);
+@@ -1030,6 +1097,22 @@ extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode);
extern void RADEONInitVideo(ScreenPtr pScreen);
extern void RADEONResetVideo(ScrnInfoPtr pScrn);
@@ -963,7 +962,7 @@
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
-@@ -1043,7 +1126,9 @@ do { \
+@@ -1048,7 +1131,9 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
@@ -974,7 +973,7 @@
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
-@@ -1077,7 +1162,7 @@ do { \
+@@ -1082,7 +1167,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
@@ -983,7 +982,7 @@
if (info->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
-@@ -1104,6 +1189,13 @@ do { \
+@@ -1109,6 +1194,13 @@ do { \
#define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0
#define BEGIN_RING(n) do { \
@@ -997,7 +996,7 @@
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
-@@ -1116,13 +1208,6 @@ do { \
+@@ -1121,13 +1213,6 @@ do { \
} \
info->dma_debug_func = __FILE__; \
info->dma_debug_lineno = __LINE__; \
@@ -1011,7 +1010,7 @@
__expected = n; \
__head = (pointer)((char *)info->indirectBuffer->address + \
info->indirectBuffer->used); \
-@@ -1165,6 +1250,14 @@ do { \
+@@ -1170,6 +1255,14 @@ do { \
OUT_RING(val); \
} while (0)
@@ -1399,10 +1398,10 @@
#endif
diff --git a/src/radeon_bufmgr_exa.c b/src/radeon_bufmgr_exa.c
new file mode 100644
-index 0000000..5e84a89
+index 0000000..400b426
--- /dev/null
+++ b/src/radeon_bufmgr_exa.c
-@@ -0,0 +1,294 @@
+@@ -0,0 +1,295 @@
+/**************************************************************************
+ *
+ * Copyright © 2007-2008 Red Hat Inc.
@@ -1592,7 +1591,8 @@
+ exa_buf->bo.virtual = exa_buf->mem->map;
+ exa_buf->next = NULL;
+ exa_buf->reloc_count = 0;
-+ exa_buf->map_count = 0;
++ /* get map count right */
++ exa_buf->map_count = 1;
+
+ return &exa_buf->bo;
+}
@@ -3681,7 +3681,7 @@
pScrn->vtSema = FALSE;
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
-index 02fd4fc..0edd951 100644
+index 02fd4fc..bc489fc 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -47,6 +47,13 @@
@@ -3792,7 +3792,7 @@
/* Front buffer is always set with proper swappers */
if (offset == 0)
return;
-@@ -294,13 +348,99 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
+@@ -294,13 +348,97 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index)
OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, 0);
OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, 0);
swapper_surfaces[index] = 0;
@@ -3851,13 +3851,12 @@
+
+
+ if (info->drm_mode_setting && drmmode_is_rotate_pixmap(pScrn, pPixData, &driver_priv->bo)){
-+ ErrorF("bo %p\n", driver_priv->bo);
+ dri_bo_unmap(driver_priv->bo);
+ dri_bo_reference(driver_priv->bo);
+ miModifyPixmapHeader(pPixmap, width, height, depth,
+ bitsPerPixel, devKind, NULL);
+
-+
++ return TRUE;
+ }
+
+ if (pPixData == info->mm.front_buffer->map) {
@@ -3883,7 +3882,6 @@
+ return FALSE;
+ if (driver_priv->bo)
+ return TRUE;
-+ assert(0);
+ return FALSE;
+}
@@ -3894,7 +3892,7 @@
BEGIN_ACCEL(1); \
switch (info->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
-@@ -317,7 +457,7 @@ do { \
+@@ -317,7 +455,7 @@ do { \
#define RADEON_SWITCH_TO_3D() \
do { \
@@ -3903,7 +3901,7 @@
BEGIN_ACCEL(1); \
switch (info->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
-@@ -341,6 +481,7 @@ do { \
+@@ -341,6 +479,7 @@ do { \
#define BEGIN_ACCEL(n) RADEONWaitForFifo(pScrn, (n))
#define OUT_ACCEL_REG(reg, val) OUTREG(reg, val)
#define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val))
@@ -3911,7 +3909,7 @@
#define FINISH_ACCEL()
#ifdef RENDER
-@@ -353,6 +494,7 @@ do { \
+@@ -353,6 +492,7 @@ do { \
#undef BEGIN_ACCEL
#undef OUT_ACCEL_REG
#undef FINISH_ACCEL
@@ -3919,7 +3917,7 @@
#ifdef XF86DRI
-@@ -363,6 +505,7 @@ do { \
+@@ -363,6 +503,7 @@ do { \
#define BEGIN_ACCEL(n) BEGIN_RING(2*(n))
#define OUT_ACCEL_REG(reg, val) OUT_RING_REG(reg, val)
#define FINISH_ACCEL() ADVANCE_RING()
@@ -3927,7 +3925,7 @@
#define OUT_RING_F(x) OUT_RING(F_TO_DW(x))
-@@ -373,6 +516,8 @@ do { \
+@@ -373,6 +514,8 @@ do { \
#endif /* XF86DRI */
@@ -3936,7 +3934,7 @@
/*
* Once screen->off_screen_base is set, this function
* allocates the remaining memory appropriately
-@@ -394,125 +539,124 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
+@@ -394,125 +537,124 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
if (info->exa == NULL)
return FALSE;
@@ -5283,7 +5281,7 @@
RADEON_COLOR_ARG_A_ZERO |
RADEON_COLOR_ARG_B_ZERO |
diff --git a/src/radeon_video.c b/src/radeon_video.c
-index ac60166..eca7846 100644
+index 57dcd8a..ecd34a1 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
@@ -275,7 +275,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.103
retrieving revision 1.104
diff -u -r1.103 -r1.104
--- xorg-x11-drv-ati.spec 14 Aug 2008 06:07:29 -0000 1.103
+++ xorg-x11-drv-ati.spec 15 Aug 2008 03:16:09 -0000 1.104
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.9.0
-Release: 3%{?dist}
+Release: 4%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -67,6 +67,9 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Fri Aug 15 2008 Dave Airlie <airlied at redhat.com> 6.9.0-4
+- fix bugs in modesetting and bring PLL fixes in from master
+
* Thu Aug 14 2008 Dave Airlie <airlied at redhat.com> 6.9.0-3
- bring back modesetting
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