rpms/kernel/F-9 drm-radeon-update.patch, 1.2, 1.3 kernel.spec, 1.686, 1.687

Dave Airlie (airlied) fedora-extras-commits at redhat.com
Sun Jun 22 07:51:40 UTC 2008


Author: airlied

Update of /cvs/pkgs/rpms/kernel/F-9
In directory cvs-int.fedora.redhat.com:/tmp/cvs-serv10078

Modified Files:
	drm-radeon-update.patch kernel.spec 
Log Message:
* Sun Jun 22 2008 Dave Airlie <airlied at redhat.com> 2.6.25.7-68
- update drm update to fix a bug.


drm-radeon-update.patch:

View full diff with command:
/usr/bin/cvs -f diff  -kk -u -N -r 1.2 -r 1.3 drm-radeon-update.patch
Index: drm-radeon-update.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-9/drm-radeon-update.patch,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- drm-radeon-update.patch	19 Jun 2008 03:47:35 -0000	1.2
+++ drm-radeon-update.patch	22 Jun 2008 07:50:52 -0000	1.3
@@ -1,444 +1,39 @@
-commit 21efa2bac91b8d12064617c5a35492ec982544eb
-Author: Dave Airlie <airlied at redhat.com>
-Date:   Thu Jun 19 13:01:58 2008 +1000
-
-    drm/radeon: add hier-z registers for r300 and r500 chipsets
-
-commit 5e35eff13f7dd0f5c1d82b3b4708b2f7a5f44113
-Author: Alex Deucher <alex at botchco.com>
-Date:   Thu Jun 19 12:39:23 2008 +1000
-
-    drm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
-    
-    According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
-    the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 5cfb6956073a9e42d44a26790b7800980634d037
-Author: Alex Deucher <alex at botchco.com>
-Date:   Thu Jun 19 12:38:29 2008 +1000
-
-    drm/radeon: switch IGP gart to use radeon_write_agp_base()
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 7ecabc53a29bb31689fa1852a926e021179a64a6
-Author: Dennis Kasprzyk <onestone at opencompositing.org>
-Date:   Thu Jun 19 12:36:55 2008 +1000
-
-    drm/radeon: Restore sw interrupt on resume
-    
-    Fixes performance drop after suspend/resume on some systems.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 70b13d510fc9d137e362b7db3ac5b14b50d78477
-Author: Dave Airlie <airlied at redhat.com>
-Date:   Thu Jun 19 11:40:44 2008 +1000
-
-    drm/r500: add support for AGP based cards.
-    
-    AGP registers weren't programmed properly for r500 cards.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 9156cf09f56150ed89f77eaa4c386a07789776a0
-Author: Roland Scheidegger <sroland at tungstengraphics.com>
-Date:   Thu Jun 19 11:36:04 2008 +1000
-
-    drm/radeon: fix texture uploads with large 3d textures (bug 13980)
-    
-    Texture uploads could hit the blitter coordinate limit, adjust the texture
-    offset when uploading the pieces. Make sure to check the end address of the
-    upload too.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit c0beb2a723d69934a53f51a9d664c5b1dbbf634b
-Author: Dave Airlie <airlied at redhat.com>
-Date:   Wed May 28 13:52:28 2008 +1000
-
-    drm/radeon: add initial r500 support.
-    
-    This contains all the command buffer processing for the r500 cards.
-    It doesn't yet contain vblank support.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 5b92c4045eaa42441b7ec249a406e4110ea400d4
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 11:57:40 2008 +1000
-
-    drm/radeon: init pipe setup in kernel code.
-    
-    This inits the card pipes in the kernel and lets userspace getparam
-    the correct setup.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit d396db321bcaec54345e7e9e87cea8482d6ae3a8
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 11:54:06 2008 +1000
-
-    drm/radeon: fixup radeon_do_engine_reset
-    
-    Cleanup do engine reset for different chip families.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 259434acccbc823ee8bc00b2d2689ccccd25e1fd
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 11:51:12 2008 +1000
-
-    drm/radeon: fix pixcache and purge/cache flushing registers
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit d7463eb41d88a39de2653fd41857c4ccddb8707b
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 11:46:36 2008 +1000
-
-    drm/radeon: write AGP_BASE_2 on chips that support it.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 45e519052e8f583a709edd442a23f59581d3fe42
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 13:28:59 2008 +1000
-
-    drm/radeon: merge IGP chip setup and fixup RS400 vs RS480 support
-    
-    We only support RS480 (AMD based IGP) at the moment not
-    RS400 (Intel based IGP) ones.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 2735977b12cb0f113aae24afff04747b6d0f5bf1
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 12:54:16 2008 +1000
-
-    drm/radeon: IGP clean up register and magic numbers.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 3722bfc607d46275369865c02fe8694486d640b5
-Author: Dave Airlie <airlied at linux.ie>
-Date:   Wed May 28 11:28:27 2008 +1000
-
-    drm/rs690: set base 2 to 0.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit fa0d71b967506031f7cb08ced6095d1c4f988594
-Author: Dave Airlie <airlied at linux.ie>
-Date:   Wed May 28 11:27:01 2008 +1000
-
-    drm/rs690: set all of gart base address.
-    
-    Docs state bits 4-11 maps to bits 32-39 of the 40-bit range
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 9f18409ea3d778a171a9505c0a849d846f352bd0
-Author: Alex Deucher <alexdeucher at gmail.com>
-Date:   Wed May 28 11:21:25 2008 +1000
-
-    radeon: add production microcode from AMD
-    
-    This adds production microcode for r100->r500 from AMD.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 7ec700fcaf4f01ae72956df74a9e0d08938fd26e
-Author: Dave Airlie <airlied at redhat.com>
-Date:   Thu Jun 19 11:27:23 2008 +1000
-
-    drm: pcigart use proper pci map interfaces.
-    
-    Switch to using more correct pci dma mapping interfaces.
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit b554305905d9bc2184b424aa67712119d5c9fb99
-Author: Dave Airlie <airlied at redhat.com>
-Date:   Fri Jun 13 15:06:31 2008 +1000
-
-    drm: the sg alloc ioctl should write back the handle to userspace
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-
-commit 41ee2ff404ec76194315aeed57ac973b010abe1d
-Author: Johannes Weiner <hannes at saeurebad.de>
-Date:   Fri Jun 13 15:04:40 2008 +1000
-
-    drm: use drms ioctl cmd not what we get passed from userspace.
-    
-    This enforces us to use the drm ioctl types so read/write works correctly and not believe
-    what userspace tells us.
-    
-    It does this hopefully without breaking the drm api.
-    
-    Fixes bug from thread: BUG: unable to handle kernel NULL pointer dereference (drm_getunique)
-    
-    Signed-off-by: Dave Airlie <airlied at redhat.com>
-diff --git a/drivers/char/drm/ati_pcigart.c b/drivers/char/drm/ati_pcigart.c
-index b710426..c533d0c 100644
---- a/drivers/char/drm/ati_pcigart.c
-+++ b/drivers/char/drm/ati_pcigart.c
-@@ -76,7 +76,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
- 		for (i = 0; i < pages; i++) {
- 			if (!entry->busaddr[i])
[...4103 lines suppressed...]
+-		temp = RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_ENABLE);
+-		RADEON_WRITE_IGPGART(RADEON_IGPGART_ENABLE, temp);
+-
+-		RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
+-		RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1);
+-		RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
+-		RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0);
+-       }
+-}
+-
+-/* Enable or disable RS690 GART on the chip */
+-static void radeon_set_rs690gart(drm_radeon_private_t *dev_priv, int on)
+-{
+ 	u32 temp;
  
- 	if (radeon_check_and_fixup_offset(dev_priv, file_priv, &tex->offset)) {
-@@ -1727,6 +1727,13 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
- 	} else
- 		microtile = 0;
+ 	if (on) {
+-		DRM_DEBUG("programming rs690 gart %08X %08lX %08X\n",
++		DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
+ 			  dev_priv->gart_vm_start,
+ 			  (long)dev_priv->gart_info.bus_addr,
+ 			  dev_priv->gart_size);
  
-+	/* this might fail for zero-sized uploads - are those illegal? */
-+	if (!radeon_check_offset(dev_priv, tex->offset + image->height *
-+				blit_width - 1)) {
-+		DRM_ERROR("Invalid final destination offset\n");
-+		return -EINVAL;
-+	}
+-		temp = RS690_READ_MCIND(dev_priv, RS690_MC_MISC_CNTL);
+-		RS690_WRITE_MCIND(RS690_MC_MISC_CNTL, 0x5000);
+-
+-		RS690_WRITE_MCIND(RS690_MC_AGP_SIZE,
+-				  RS690_MC_GART_EN | RS690_MC_AGP_SIZE_32MB);
+-
+-		temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_FEATURE_ID);
+-		RS690_WRITE_MCIND(RS690_MC_GART_FEATURE_ID, 0x42040800);
+-
+-		RS690_WRITE_MCIND(RS690_MC_GART_BASE,
+-				  dev_priv->gart_info.bus_addr);
++		temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
++		if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
++			IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
++							     RS690_BLOCK_GFX_D3_EN));
++		else
++			IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN);
 +
- 	DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width);
++		IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
++							       RS480_VA_SIZE_32MB));
++
++		temp = IGP_READ_MCIND(dev_priv, RS480_GART_FEATURE_ID);
++		IGP_WRITE_MCIND(RS480_GART_FEATURE_ID, (RS480_HANG_EN |
++							RS480_TLB_ENABLE |
++							RS480_GTW_LAC_EN |
++							RS480_1LEVEL_GART));
++
++		temp = dev_priv->gart_info.bus_addr & 0xfffff000;
++		temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4;
++		IGP_WRITE_MCIND(RS480_GART_BASE, temp);
++
++		temp = IGP_READ_MCIND(dev_priv, RS480_AGP_MODE_CNTL);
++		IGP_WRITE_MCIND(RS480_AGP_MODE_CNTL, ((1 << RS480_REQ_TYPE_SNOOP_SHIFT) |
++						      RS480_REQ_TYPE_SNOOP_DIS));
  
- 	do {
-@@ -1840,6 +1847,7 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
+-		temp = RS690_READ_MCIND(dev_priv, RS690_MC_AGP_MODE_CONTROL);
+-		RS690_WRITE_MCIND(RS690_MC_AGP_MODE_CONTROL, 0x01400000);
+-
+-		RS690_WRITE_MCIND(RS690_MC_AGP_BASE,
+-				  (unsigned int)dev_priv->gart_vm_start);
++		radeon_write_agp_base(dev_priv, dev_priv->gart_vm_start);
+ 
+ 		dev_priv->gart_size = 32*1024*1024;
+ 		temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) &
+ 			 0xffff0000) | (dev_priv->gart_vm_start >> 16));
+ 
+-		RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, temp);
++		radeon_write_agp_location(dev_priv, temp);
+ 
+-		temp = RS690_READ_MCIND(dev_priv, RS690_MC_AGP_SIZE);
+-		RS690_WRITE_MCIND(RS690_MC_AGP_SIZE,
+-				  RS690_MC_GART_EN | RS690_MC_AGP_SIZE_32MB);
++		temp = IGP_READ_MCIND(dev_priv, RS480_AGP_ADDRESS_SPACE_SIZE);
++		IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
++							       RS480_VA_SIZE_32MB));
+ 
+ 		do {
+-			temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_CACHE_CNTL);
+-			if ((temp & RS690_MC_GART_CLEAR_STATUS) ==
+-			    RS690_MC_GART_CLEAR_DONE)
++			temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
++			if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
+ 				break;
+ 			DRM_UDELAY(1);
+ 		} while (1);
+ 
+-		RS690_WRITE_MCIND(RS690_MC_GART_CACHE_CNTL,
+-				  RS690_MC_GART_CC_CLEAR);
++		IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL,
++				RS480_GART_CACHE_INVALIDATE);
++
+ 		do {
+-			temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_CACHE_CNTL);
+-			if ((temp & RS690_MC_GART_CLEAR_STATUS) ==
+-				   RS690_MC_GART_CLEAR_DONE)
++			temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
++			if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
+ 				break;
+ 			DRM_UDELAY(1);
+ 		} while (1);
+ 
+-		RS690_WRITE_MCIND(RS690_MC_GART_CACHE_CNTL,
+-				  RS690_MC_GART_CC_NO_CHANGE);
++		IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, 0);
+ 	} else {
+-		RS690_WRITE_MCIND(RS690_MC_AGP_SIZE, RS690_MC_GART_DIS);
++		IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, 0);
+ 	}
+ }
+ 
+@@ -1474,12 +815,8 @@ static void radeon_set_pcigart(drm_radeo
+ {
+ 	u32 tmp;
+ 
+-	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
+-		radeon_set_rs690gart(dev_priv, on);
+-		return;
+-	}
+-
+-	if (dev_priv->flags & RADEON_IS_IGPGART) {
++	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
++	    (dev_priv->flags & RADEON_IS_IGPGART)) {
+ 		radeon_set_igpgart(dev_priv, on);
+ 		return;
+ 	}
+@@ -1953,6 +1290,7 @@ static int radeon_do_resume_cp(struct dr
+ 	radeon_cp_init_ring_buffer(dev, dev_priv);
+ 
+ 	radeon_do_engine_reset(dev);
++	radeon_enable_interrupt(dev);
+ 
+ 	DRM_DEBUG("radeon_do_resume_cp() complete\n");
+ 
+diff -up linux-2.6.25.noarch/drivers/char/drm/ati_pcigart.c.dave linux-2.6.25.noarch/drivers/char/drm/ati_pcigart.c
+--- linux-2.6.25.noarch/drivers/char/drm/ati_pcigart.c.dave	2008-06-22 17:41:38.000000000 +1000
++++ linux-2.6.25.noarch/drivers/char/drm/ati_pcigart.c	2008-06-22 17:41:51.000000000 +1000
+@@ -75,7 +75,7 @@ int drm_ati_pcigart_cleanup(struct drm_d
+ 		for (i = 0; i < pages; i++) {
+ 			if (!entry->busaddr[i])
+ 				break;
+-			pci_unmap_single(dev->pdev, entry->busaddr[i],
++			pci_unmap_page(dev->pdev, entry->busaddr[i],
+ 					 PAGE_SIZE, PCI_DMA_TODEVICE);
  		}
  
- #undef RADEON_COPY_MT
-+		byte_offset = (image->y & ~2047) * blit_width;
- 		buf->file_priv = file_priv;
- 		buf->used = size;
- 		offset = dev_priv->gart_buffers_offset + buf->offset;
-@@ -1854,9 +1862,9 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
- 			 RADEON_DP_SRC_SOURCE_MEMORY |
- 			 RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
- 		OUT_RING((spitch << 22) | (offset >> 10));
--		OUT_RING((texpitch << 22) | (tex->offset >> 10));
-+		OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10)));
- 		OUT_RING(0);
--		OUT_RING((image->x << 16) | image->y);
-+		OUT_RING((image->x << 16) | (image->y % 2048));
- 		OUT_RING((image->width << 16) | height);
- 		RADEON_WAIT_UNTIL_2D_IDLE();
- 		ADVANCE_RING();
-@@ -3037,6 +3045,9 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
- 	case RADEON_PARAM_FB_LOCATION:
- 		value = radeon_read_fb_location(dev_priv);
- 		break;
-+	case RADEON_PARAM_NUM_GB_PIPES:
-+		value = dev_priv->num_gb_pipes;
-+		break;
- 	default:
- 		DRM_DEBUG("Invalid parameter %d\n", param->param);
- 		return -EINVAL;
+@@ -136,10 +136,8 @@ int drm_ati_pcigart_init(struct drm_devi
+ 
+ 	for (i = 0; i < pages; i++) {
+ 		/* we need to support large memory configurations */
+-		entry->busaddr[i] = pci_map_single(dev->pdev,
+-						   page_address(entry->
+-								pagelist[i]),
+-						   PAGE_SIZE, PCI_DMA_TODEVICE);
++		entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
++						 0, PAGE_SIZE, PCI_DMA_TODEVICE);
+ 		if (entry->busaddr[i] == 0) {
+ 			DRM_ERROR("unable to map PCIGART pages!\n");
+ 			drm_ati_pcigart_cleanup(dev, gart_info);


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/F-9/kernel.spec,v
retrieving revision 1.686
retrieving revision 1.687
diff -u -r1.686 -r1.687
--- kernel.spec	21 Jun 2008 02:38:43 -0000	1.686
+++ kernel.spec	22 Jun 2008 07:50:52 -0000	1.687
@@ -1852,7 +1852,10 @@
 %kernel_variant_files -a /%{image_install_path}/xen*-%{KVERREL}.xen -e /etc/ld.so.conf.d/kernelcap-%{KVERREL}.xen.conf %{with_xen} xen
 
 %changelog
-* Fri Jun 20 2008 Dave Jones <davej at redhat.com>
+* Sun Jun 22 2008 Dave Airlie <airlied at redhat.com> 2.6.25.7-68
+- update drm update to fix a bug.
+
+* Fri Jun 20 2008 Dave Jones <davej at redhat.com> 2.6.25.7-67
 - Fix hpwdt driver to not oops on init. (452183)
 
 * Fri Jun 20 2008 Jarod Wilson <jwilson at redhat.com> 2.6.25.7-66




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