rpms/xorg-x11-drv-ati/devel copy-fb-contents.patch, 1.1, 1.2 radeon-6.9.0-to-git.patch, 1.3, 1.4 radeon-modeset.patch, 1.13, 1.14 xorg-x11-drv-ati.spec, 1.115, 1.116 radeon-fix-pipe-config.patch, 1.1, NONE radeon-suspend-fix.patch, 1.1, NONE
Dave Airlie
airlied at fedoraproject.org
Fri Sep 26 00:53:39 UTC 2008
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Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv16741
Modified Files:
copy-fb-contents.patch radeon-6.9.0-to-git.patch
radeon-modeset.patch xorg-x11-drv-ati.spec
Removed Files:
radeon-fix-pipe-config.patch radeon-suspend-fix.patch
Log Message:
* Fri Sep 26 2008 Dave Airlie <airlied at redhat.com> 6.9.0-16
- rebase to a later tree - still not fully up to git master
- add some fixes to the resize stuff - not fully done
copy-fb-contents.patch:
Index: copy-fb-contents.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/copy-fb-contents.patch,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- copy-fb-contents.patch 22 Sep 2008 19:01:10 -0000 1.1
+++ copy-fb-contents.patch 26 Sep 2008 00:53:39 -0000 1.2
@@ -1,6 +1,7 @@
-diff -up xf86-video-ati-6.9.0/src/drmmode_display.c.copy-fb-contents xf86-video-ati-6.9.0/src/drmmode_display.c
---- xf86-video-ati-6.9.0/src/drmmode_display.c.copy-fb-contents 2008-09-19 15:46:48.000000000 -0400
-+++ xf86-video-ati-6.9.0/src/drmmode_display.c 2008-09-22 14:05:15.000000000 -0400
+diff --git a/src/drmmode_display.c b/src/drmmode_display.c
+index 25e6183..a22cd62 100644
+--- a/src/drmmode_display.c
++++ b/src/drmmode_display.c
@@ -31,8 +31,11 @@
#ifdef XF86DRM_MODE
@@ -13,7 +14,7 @@
static Bool drmmode_resize_fb(ScrnInfoPtr scrn, drmmode_ptr drmmode, int width, int height);
static Bool
-@@ -119,6 +122,76 @@ drmmode_crtc_dpms(xf86CrtcPtr drmmode_cr
+@@ -119,6 +122,76 @@ drmmode_crtc_dpms(xf86CrtcPtr drmmode_crtc, int mode)
}
@@ -90,28 +91,34 @@
static Bool
drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
Rotation rotation, int x, int y)
-@@ -170,15 +243,14 @@ drmmode_set_mode_major(xf86CrtcPtr crtc,
-
- drmmode_ConvertToKMode(crtc->scrn, &kmode, mode);
-
--
+@@ -174,7 +247,8 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
fb_id = drmmode->fb_id;
if (drmmode_crtc->rotate_fb_id)
fb_id = drmmode_crtc->rotate_fb_id;
- ErrorF("fb id is %d\n", fb_id);
-+ copy_fb_contents (drmmode, crtc->scrn, fb_id, x, y,
-+ drmmode_crtc->mode_crtc->buffer_id);
++ copy_fb_contents (drmmode, crtc->scrn, fb_id, x, y,
++ drmmode_crtc->mode_crtc->buffer_id);
drmModeSetCrtc(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
fb_id, x, y, output_ids, output_count, &kmode);
--
- done:
- if (!ret) {
- crtc->x = saved_x;
-diff -up xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.c.copy-fb-contents xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.c
---- xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.c.copy-fb-contents 2008-09-19 15:46:48.000000000 -0400
-+++ xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.c 2008-09-19 15:46:48.000000000 -0400
-@@ -353,6 +353,27 @@ void radeon_bufmgr_gem_wait_rendering(dr
+diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h
+index a16ad9a..b3034d7 100644
+--- a/src/radeon_bufmgr.h
++++ b/src/radeon_bufmgr.h
+@@ -16,6 +16,8 @@ struct radeon_bufmgr {
+ dri_bufmgr *radeon_bufmgr_gem_init(int fd);
+ dri_bo *radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name,
+ unsigned int handle);
++dri_bo *radeon_bo_gem_create_from_handle(dri_bufmgr *bufmgr,
++ uint32_t handle, unsigned long size);
+
+ void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
+
+diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c
+index db28edc..75cff8e 100644
+--- a/src/radeon_bufmgr_gem.c
++++ b/src/radeon_bufmgr_gem.c
+@@ -353,6 +353,27 @@ void radeon_bufmgr_gem_wait_rendering(dri_bo *buf)
return;
}
@@ -139,7 +146,7 @@
/**
* Returns a dri_bo wrapping the given buffer object handle.
*
-@@ -364,32 +385,20 @@ radeon_bo_gem_create_from_name(dri_bufmg
+@@ -364,32 +385,20 @@ radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name,
unsigned int handle)
{
dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bufmgr;
@@ -174,23 +181,11 @@
}
#define BUF_OUT_RING(x) do { \
-diff -up xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.h.copy-fb-contents xf86-video-ati-6.9.0/src/radeon_bufmgr_gem.h
-diff -up xf86-video-ati-6.9.0/src/radeon_bufmgr.h.copy-fb-contents xf86-video-ati-6.9.0/src/radeon_bufmgr.h
---- xf86-video-ati-6.9.0/src/radeon_bufmgr.h.copy-fb-contents 2008-09-19 15:46:48.000000000 -0400
-+++ xf86-video-ati-6.9.0/src/radeon_bufmgr.h 2008-09-19 15:46:48.000000000 -0400
-@@ -16,6 +16,8 @@ struct radeon_bufmgr {
- dri_bufmgr *radeon_bufmgr_gem_init(int fd);
- dri_bo *radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name,
- unsigned int handle);
-+dri_bo *radeon_bo_gem_create_from_handle(dri_bufmgr *bufmgr,
-+ uint32_t handle, unsigned long size);
-
- void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
-
-diff -up xf86-video-ati-6.9.0/src/radeon_driver.c.copy-fb-contents xf86-video-ati-6.9.0/src/radeon_driver.c
---- xf86-video-ati-6.9.0/src/radeon_driver.c.copy-fb-contents 2008-09-19 15:46:48.000000000 -0400
-+++ xf86-video-ati-6.9.0/src/radeon_driver.c 2008-09-19 15:46:48.000000000 -0400
-@@ -3644,6 +3644,24 @@ Bool RADEONScreenInit(int scrnIndex, Scr
+diff --git a/src/radeon_driver.c b/src/radeon_driver.c
+index d5bb24d..070cc56 100644
+--- a/src/radeon_driver.c
++++ b/src/radeon_driver.c
+@@ -3640,6 +3640,24 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* xf86CrtcRotate() accesses pScrn->pScreen */
pScrn->pScreen = pScreen;
@@ -215,7 +210,7 @@
if (!xf86SetDesiredModes (pScrn))
return FALSE;
-@@ -3714,25 +3732,6 @@ Bool RADEONScreenInit(int scrnIndex, Scr
+@@ -3710,25 +3728,6 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
RADEONChangeSurfaces(pScrn);
}
radeon-6.9.0-to-git.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -N -r 1.3 -r 1.4 radeon-6.9.0-to-git.patch
Index: radeon-6.9.0-to-git.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-6.9.0-to-git.patch,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- radeon-6.9.0-to-git.patch 15 Aug 2008 03:16:09 -0000 1.3
+++ radeon-6.9.0-to-git.patch 26 Sep 2008 00:53:39 -0000 1.4
@@ -1149,6 +1149,736 @@
if (radeon_output->DACType == DAC_PRIMARY)
dac_data.sDacload.ucDacType = ATOM_DAC_A;
else if (radeon_output->DACType == DAC_TVDAC)
+diff --git a/src/bicubic_table.h b/src/bicubic_table.h
+new file mode 100644
+index 0000000..765cfff
+--- /dev/null
++++ b/src/bicubic_table.h
+@@ -0,0 +1,646 @@
++static const uint16_t bicubic_tex_512[] = {
++ 0xb266, 0x3c00, 0x3aaa, 0x3155,
++ 0xb287, 0x3bf0, 0x3aa2, 0x3175,
++ 0xb2a9, 0x3be0, 0x3a9a, 0x3196,
++ 0xb2cc, 0x3bd0, 0x3a92, 0x31b7,
++ 0xb2ee, 0x3bc0, 0x3a89, 0x31d9,
++ 0xb312, 0x3bb0, 0x3a81, 0x31fb,
++ 0xb335, 0x3ba0, 0x3a78, 0x321e,
++ 0xb359, 0x3b90, 0x3a6f, 0x3241,
++ 0xb37d, 0x3b80, 0x3a66, 0x3264,
++ 0xb3a2, 0x3b70, 0x3a5d, 0x3288,
++ 0xb3c7, 0x3b60, 0x3a54, 0x32ad,
++ 0xb3ed, 0x3b51, 0x3a4b, 0x32d1,
++ 0xb409, 0x3b41, 0x3a42, 0x32f7,
++ 0xb41c, 0x3b31, 0x3a38, 0x331c,
++ 0xb42f, 0x3b21, 0x3a2f, 0x3342,
++ 0xb443, 0x3b12, 0x3a25, 0x3369,
++ 0xb456, 0x3b02, 0x3a1c, 0x3390,
++ 0xb46a, 0x3af3, 0x3a12, 0x33b7,
++ 0xb47e, 0x3ae3, 0x3a08, 0x33de,
++ 0xb492, 0x3ad4, 0x39fe, 0x3403,
++ 0xb4a6, 0x3ac5, 0x39f4, 0x3417,
++ 0xb4bb, 0x3ab5, 0x39ea, 0x342b,
++ 0xb4cf, 0x3aa6, 0x39df, 0x3440,
++ 0xb4e4, 0x3a97, 0x39d5, 0x3454,
++ 0xb4f9, 0x3a88, 0x39cb, 0x3469,
++ 0xb50e, 0x3a79, 0x39c0, 0x347e,
++ 0xb523, 0x3a6a, 0x39b6, 0x3493,
++ 0xb539, 0x3a5a, 0x39ab, 0x34a8,
++ 0xb54e, 0x3a4c, 0x39a0, 0x34be,
++ 0xb564, 0x3a3d, 0x3996, 0x34d3,
++ 0xb57a, 0x3a2e, 0x398b, 0x34e9,
++ 0xb590, 0x3a1f, 0x3980, 0x34ff,
++ 0xb5a6, 0x3a10, 0x3975, 0x3515,
++ 0xb5bc, 0x3a02, 0x396a, 0x352b,
++ 0xb5d2, 0x39f3, 0x395f, 0x3541,
++ 0xb5e9, 0x39e4, 0x3954, 0x3557,
++ 0xb5ff, 0x39d6, 0x3948, 0x356e,
++ 0xb616, 0x39c7, 0x393d, 0x3584,
++ 0xb62d, 0x39b9, 0x3932, 0x359b,
++ 0xb644, 0x39ab, 0x3926, 0x35b2,
++ 0xb65b, 0x399c, 0x391b, 0x35c9,
++ 0xb672, 0x398e, 0x3910, 0x35df,
++ 0xb68a, 0x3980, 0x3904, 0x35f6,
++ 0xb6a1, 0x3972, 0x38f8, 0x360e,
++ 0xb6b9, 0x3964, 0x38ed, 0x3625,
++ 0xb6d1, 0x3956, 0x38e1, 0x363c,
++ 0xb6e8, 0x3948, 0x38d6, 0x3653,
++ 0xb700, 0x393a, 0x38ca, 0x366b,
++ 0xb719, 0x392c, 0x38be, 0x3682,
++ 0xb731, 0x391e, 0x38b2, 0x369a,
++ 0xb749, 0x3910, 0x38a7, 0x36b1,
++ 0xb762, 0x3902, 0x389b, 0x36c9,
++ 0xb77a, 0x38f5, 0x388f, 0x36e1,
++ 0xb793, 0x38e7, 0x3883, 0x36f8,
++ 0xb7ac, 0x38da, 0x3877, 0x3710,
++ 0xb7c5, 0x38cc, 0x386b, 0x3728,
++ 0xb7de, 0x38bf, 0x385f, 0x3740,
++ 0xb7f7, 0x38b1, 0x3853, 0x3758,
++ 0xb808, 0x38a4, 0x3847, 0x3770,
++ 0xb815, 0x3897, 0x383b, 0x3788,
++ 0xb821, 0x3889, 0x382f, 0x37a0,
++ 0xb82e, 0x387c, 0x3823, 0x37b8,
++ 0xb83b, 0x386f, 0x3817, 0x37d0,
++ 0xb848, 0x3862, 0x380b, 0x37e8,
++ 0xb855, 0x3855, 0x3800, 0x3800,
++ 0xb862, 0x3848, 0x37e8, 0x380b,
++ 0xb86f, 0x383b, 0x37d0, 0x3817,
++ 0xb87c, 0x382e, 0x37b8, 0x3823,
++ 0xb889, 0x3821, 0x37a0, 0x382f,
++ 0xb897, 0x3815, 0x3788, 0x383b,
++ 0xb8a4, 0x3808, 0x3770, 0x3847,
++ 0xb8b1, 0x37f7, 0x3758, 0x3853,
++ 0xb8bf, 0x37de, 0x3740, 0x385f,
++ 0xb8cc, 0x37c5, 0x3728, 0x386b,
++ 0xb8da, 0x37ac, 0x3710, 0x3877,
++ 0xb8e7, 0x3793, 0x36f8, 0x3883,
++ 0xb8f5, 0x377a, 0x36e1, 0x388f,
++ 0xb902, 0x3762, 0x36c9, 0x389b,
++ 0xb910, 0x3749, 0x36b1, 0x38a7,
++ 0xb91e, 0x3731, 0x369a, 0x38b2,
++ 0xb92c, 0x3719, 0x3682, 0x38be,
++ 0xb93a, 0x3700, 0x366b, 0x38ca,
++ 0xb948, 0x36e8, 0x3653, 0x38d6,
++ 0xb956, 0x36d1, 0x363c, 0x38e1,
++ 0xb964, 0x36b9, 0x3625, 0x38ed,
++ 0xb972, 0x36a1, 0x360e, 0x38f8,
++ 0xb980, 0x368a, 0x35f6, 0x3904,
++ 0xb98e, 0x3672, 0x35df, 0x3910,
++ 0xb99c, 0x365b, 0x35c9, 0x391b,
++ 0xb9ab, 0x3644, 0x35b2, 0x3926,
++ 0xb9b9, 0x362d, 0x359b, 0x3932,
++ 0xb9c7, 0x3616, 0x3584, 0x393d,
++ 0xb9d6, 0x35ff, 0x356e, 0x3948,
++ 0xb9e4, 0x35e9, 0x3557, 0x3954,
++ 0xb9f3, 0x35d2, 0x3541, 0x395f,
++ 0xba02, 0x35bc, 0x352b, 0x396a,
++ 0xba10, 0x35a6, 0x3515, 0x3975,
++ 0xba1f, 0x3590, 0x34ff, 0x3980,
++ 0xba2e, 0x357a, 0x34e9, 0x398b,
++ 0xba3d, 0x3564, 0x34d3, 0x3996,
++ 0xba4c, 0x354e, 0x34be, 0x39a0,
++ 0xba5a, 0x3539, 0x34a8, 0x39ab,
++ 0xba6a, 0x3523, 0x3493, 0x39b6,
++ 0xba79, 0x350e, 0x347e, 0x39c0,
++ 0xba88, 0x34f9, 0x3469, 0x39cb,
++ 0xba97, 0x34e4, 0x3454, 0x39d5,
++ 0xbaa6, 0x34cf, 0x3440, 0x39df,
++ 0xbab5, 0x34bb, 0x342b, 0x39ea,
++ 0xbac5, 0x34a6, 0x3417, 0x39f4,
++ 0xbad4, 0x3492, 0x3403, 0x39fe,
++ 0xbae3, 0x347e, 0x33de, 0x3a08,
++ 0xbaf3, 0x346a, 0x33b7, 0x3a12,
++ 0xbb02, 0x3456, 0x3390, 0x3a1c,
++ 0xbb12, 0x3443, 0x3369, 0x3a25,
++ 0xbb21, 0x342f, 0x3342, 0x3a2f,
++ 0xbb31, 0x341c, 0x331c, 0x3a38,
++ 0xbb41, 0x3409, 0x32f7, 0x3a42,
++ 0xbb51, 0x33ed, 0x32d1, 0x3a4b,
++ 0xbb60, 0x33c7, 0x32ad, 0x3a54,
++ 0xbb70, 0x33a2, 0x3288, 0x3a5d,
++ 0xbb80, 0x337d, 0x3264, 0x3a66,
++ 0xbb90, 0x3359, 0x3241, 0x3a6f,
++ 0xbba0, 0x3335, 0x321e, 0x3a78,
++ 0xbbb0, 0x3312, 0x31fb, 0x3a81,
++ 0xbbc0, 0x32ee, 0x31d9, 0x3a89,
++ 0xbbd0, 0x32cc, 0x31b7, 0x3a92,
++ 0xbbe0, 0x32a9, 0x3196, 0x3a9a,
++ 0xbbf0, 0x3287, 0x3175, 0x3aa2,
++ 0 };
++
++static const uint16_t bicubic_tex_2048[] = {
++ 0xb266, 0x3c00, 0x3aaa, 0x3155,
++ 0xb26e, 0x3bfc, 0x3aa8, 0x315d,
++ 0xb277, 0x3bf8, 0x3aa6, 0x3165,
++ 0xb27f, 0x3bf4, 0x3aa4, 0x316d,
++ 0xb287, 0x3bf0, 0x3aa2, 0x3175,
++ 0xb290, 0x3bec, 0x3aa0, 0x317d,
++ 0xb298, 0x3be8, 0x3a9e, 0x3185,
++ 0xb2a1, 0x3be4, 0x3a9c, 0x318e,
++ 0xb2a9, 0x3be0, 0x3a9a, 0x3196,
++ 0xb2b2, 0x3bdc, 0x3a98, 0x319e,
++ 0xb2ba, 0x3bd8, 0x3a96, 0x31a6,
++ 0xb2c3, 0x3bd4, 0x3a94, 0x31af,
++ 0xb2cc, 0x3bd0, 0x3a92, 0x31b7,
++ 0xb2d4, 0x3bcc, 0x3a90, 0x31bf,
++ 0xb2dd, 0x3bc8, 0x3a8d, 0x31c8,
++ 0xb2e6, 0x3bc4, 0x3a8b, 0x31d0,
++ 0xb2ee, 0x3bc0, 0x3a89, 0x31d9,
++ 0xb2f7, 0x3bbc, 0x3a87, 0x31e1,
++ 0xb300, 0x3bb8, 0x3a85, 0x31ea,
++ 0xb309, 0x3bb4, 0x3a83, 0x31f2,
++ 0xb312, 0x3bb0, 0x3a81, 0x31fb,
++ 0xb31a, 0x3bac, 0x3a7e, 0x3204,
++ 0xb323, 0x3ba8, 0x3a7c, 0x320c,
++ 0xb32c, 0x3ba4, 0x3a7a, 0x3215,
++ 0xb335, 0x3ba0, 0x3a78, 0x321e,
++ 0xb33e, 0x3b9c, 0x3a76, 0x3226,
++ 0xb347, 0x3b98, 0x3a74, 0x322f,
++ 0xb350, 0x3b94, 0x3a71, 0x3238,
++ 0xb359, 0x3b90, 0x3a6f, 0x3241,
++ 0xb362, 0x3b8c, 0x3a6d, 0x3249,
++ 0xb36b, 0x3b88, 0x3a6b, 0x3252,
++ 0xb374, 0x3b84, 0x3a69, 0x325b,
++ 0xb37d, 0x3b80, 0x3a66, 0x3264,
++ 0xb387, 0x3b7c, 0x3a64, 0x326d,
++ 0xb390, 0x3b78, 0x3a62, 0x3276,
++ 0xb399, 0x3b74, 0x3a60, 0x327f,
++ 0xb3a2, 0x3b70, 0x3a5d, 0x3288,
++ 0xb3ab, 0x3b6c, 0x3a5b, 0x3291,
++ 0xb3b5, 0x3b68, 0x3a59, 0x329a,
++ 0xb3be, 0x3b64, 0x3a57, 0x32a3,
++ 0xb3c7, 0x3b60, 0x3a54, 0x32ad,
++ 0xb3d0, 0x3b5c, 0x3a52, 0x32b6,
++ 0xb3da, 0x3b58, 0x3a50, 0x32bf,
++ 0xb3e3, 0x3b54, 0x3a4d, 0x32c8,
++ 0xb3ed, 0x3b51, 0x3a4b, 0x32d1,
++ 0xb3f6, 0x3b4d, 0x3a49, 0x32db,
++ 0xb3ff, 0x3b49, 0x3a46, 0x32e4,
++ 0xb404, 0x3b45, 0x3a44, 0x32ed,
++ 0xb409, 0x3b41, 0x3a42, 0x32f7,
++ 0xb40e, 0x3b3d, 0x3a3f, 0x3300,
[...2240 lines suppressed...]
++ xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0],
++ xFixedToFloat(srcBottomRight.x) + 0.5, xFixedToFloat(srcBottomRight.y) + 0.5);
++ VTX_OUT_FILTER((float)(dstX + dstw), (float)dstY,
++ xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0],
++ xFixedToFloat(srcTopRight.x) + 0.5, xFixedToFloat(srcTopRight.y) + 0.5);
++ } else {
++ if (info->ChipFamily >= CHIP_FAMILY_R200) {
++ VTX_OUT((float)dstX, (float)dstY,
++ xFixedToFloat(srcTopLeft.x) / info->texW[0], xFixedToFloat(srcTopLeft.y) / info->texH[0]);
++ }
++ VTX_OUT((float)dstX, (float)(dstY + dsth),
xFixedToFloat(srcBottomLeft.x) / info->texW[0], xFixedToFloat(srcBottomLeft.y) / info->texH[0]);
- VTX_OUT((float)(dstX + dstw), (float)(dstY + dsth),
+- VTX_OUT((float)(dstX + dstw), (float)(dstY + dsth),
++ VTX_OUT((float)(dstX + dstw), (float)(dstY + dsth),
+ xFixedToFloat(srcBottomRight.x) / info->texW[0], xFixedToFloat(srcBottomRight.y) / info->texH[0]);
+- VTX_OUT((float)(dstX + dstw), (float)dstY,
++ VTX_OUT((float)(dstX + dstw), (float)dstY,
+ xFixedToFloat(srcTopRight.x) / info->texW[0], xFixedToFloat(srcTopRight.y) / info->texH[0]);
++ }
+
+ if (IS_R300_3D || IS_R500_3D)
+ /* flushing is pipelined, free/finish is not */
+@@ -655,4 +1248,5 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ }
+
+ #undef VTX_OUT
++#undef VTX_OUT_FILTER
+ #undef FUNC_NAME
diff --git a/src/radeon_tv.c b/src/radeon_tv.c
index 90020b3..90d1ac9 100644
--- a/src/radeon_tv.c
@@ -4395,10 +6626,69 @@
#ifndef RADEON_VERSION_EXTRA
#define RADEON_VERSION_EXTRA ""
diff --git a/src/radeon_video.c b/src/radeon_video.c
-index ac60166..57dcd8a 100644
+index ac60166..e71f0f8 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
-@@ -2586,6 +2586,7 @@ RADEONDisplayVideo(
+@@ -89,10 +89,6 @@ static void RADEON_MSP_SetEncoding(RADEONPortPrivPtr pPriv);
+ static void RADEON_TDA9885_SetEncoding(RADEONPortPrivPtr pPriv);
+ static void RADEON_FI1236_SetEncoding(RADEONPortPrivPtr pPriv);
+
+-
+-
+-#define ClipValue(v,min,max) ((v) < (min) ? (min) : (v) > (max) ? (max) : (v))
+-
+ static Atom xvBrightness, xvColorKey, xvSaturation, xvDoubleBuffer;
+ static Atom xvRedIntensity, xvGreenIntensity, xvBlueIntensity;
+ static Atom xvContrast, xvHue, xvColor, xvAutopaintColorkey, xvSetDefaults;
+@@ -106,7 +102,6 @@ static Atom xvEncoding, xvFrequency, xvVolume, xvMute,
+
+ static Atom xvOvAlpha, xvGrAlpha, xvAlphaMode;
+
+-
+ #define GET_PORT_PRIVATE(pScrn) \
+ (RADEONPortPrivPtr)((RADEONPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
+
+@@ -1678,6 +1673,10 @@ RADEONStopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup)
+ RADEONFreeMemory(pScrn, pPriv->video_memory);
+ pPriv->video_memory = NULL;
+ }
++ if (pPriv->bicubic_memory != NULL) {
++ RADEONFreeMemory(pScrn, pPriv->bicubic_memory);
++ pPriv->bicubic_memory = NULL;
++ }
+ pPriv->videoStatus = 0;
+ } else {
+ if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
+@@ -1699,9 +1698,6 @@ RADEONSetPortAttribute(ScrnInfoPtr pScrn,
+ Bool setAlpha = FALSE;
+ unsigned char *RADEONMMIO = info->MMIO;
+
+- if (pPriv->textured)
+- return BadMatch;
+-
+ RADEON_SYNC(info, pScrn);
+
+ #define RTFSaturation(a) (1.0 + ((a)*1.0)/1000.0)
+@@ -1928,7 +1924,7 @@ RADEONSetPortAttribute(ScrnInfoPtr pScrn,
+ if(pPriv->fi1236!=NULL){
+ xf86_fi1236_dump_status(pPriv->fi1236);
+ }
+- }
++ }
+ else if(attribute == xvAdjustment)
+ {
+ pPriv->adjustment=value;
+@@ -1973,9 +1969,6 @@ RADEONGetPortAttribute(ScrnInfoPtr pScrn,
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ RADEONPortPrivPtr pPriv = (RADEONPortPrivPtr)data;
+
+- if (pPriv->textured)
+- return BadMatch;
+-
+ if (info->accelOn) RADEON_SYNC(info, pScrn);
+
+ if(attribute == xvAutopaintColorkey)
+@@ -2586,6 +2579,7 @@ RADEONDisplayVideo(
RADEONOutputPrivatePtr radeon_output;
xf86OutputPtr output;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
@@ -4406,7 +6696,7 @@
is_rgb=0; is_planar=0;
switch(id){
-@@ -2715,6 +2716,22 @@ RADEONDisplayVideo(
+@@ -2715,6 +2709,22 @@ RADEONDisplayVideo(
}
#endif
@@ -4429,7 +6719,7 @@
/* keep everything in 16.16 */
if (is_planar) {
-@@ -2846,6 +2863,10 @@ RADEONDisplayVideo(
+@@ -2846,6 +2856,10 @@ RADEONDisplayVideo(
src_w >>= 1;
OUTREG(RADEON_OV0_P2_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
OUTREG(RADEON_OV0_P3_X_START_END, (src_w + leftuv - 1) | (leftuv << 16));
@@ -4440,3 +6730,77 @@
OUTREG(RADEON_OV0_VID_BUF0_BASE_ADRS, offset1);
OUTREG(RADEON_OV0_VID_BUF1_BASE_ADRS, offset2);
OUTREG(RADEON_OV0_VID_BUF2_BASE_ADRS, offset3);
+@@ -3236,6 +3250,10 @@ RADEONVideoTimerCallback(ScrnInfoPtr pScrn, Time now)
+ RADEONFreeMemory(pScrn, pPriv->video_memory);
+ pPriv->video_memory = NULL;
+ }
++ if (pPriv->bicubic_memory != NULL) {
++ RADEONFreeMemory(pScrn, pPriv->bicubic_memory);
++ pPriv->bicubic_memory = NULL;
++ }
+ pPriv->videoStatus = 0;
+ info->VideoTimerCallback = NULL;
+ }
+diff --git a/src/radeon_video.h b/src/radeon_video.h
+index 096de37..b9d900d 100644
+--- a/src/radeon_video.h
++++ b/src/radeon_video.h
+@@ -13,6 +13,10 @@
+
+ #include "xf86Crtc.h"
+
++#include "bicubic_table.h"
++
++#define ClipValue(v,min,max) ((v) < (min) ? (min) : (v) > (max) ? (max) : (v))
++
+ /* Xvideo port struct */
+ typedef struct {
+ uint32_t transform_index;
+@@ -37,7 +41,7 @@ typedef struct {
+ uint32_t radeon_N;
+ uint32_t i2c_status;
+ uint32_t i2c_cntl;
+-
++
+ FI1236Ptr fi1236;
+ uint8_t tuner_type;
+ MSP3430Ptr msp3430;
+@@ -46,7 +50,7 @@ typedef struct {
+
+ /* VIP bus and devices */
+ GENERIC_BUS_Ptr VIP;
+- TheatrePtr theatre;
++ TheatrePtr theatre;
+
+ Bool video_stream_active;
+ int encoding;
+@@ -56,7 +60,7 @@ typedef struct {
+ int sap_channel;
+ int v;
+ uint32_t adjustment; /* general purpose variable */
+-
++
+ #define METHOD_BOB 0
+ #define METHOD_SINGLE 1
+ #define METHOD_WEAVE 2
+@@ -89,6 +93,12 @@ typedef struct {
+ void *video_memory;
+ int video_offset;
+
++ /* bicubic filtering */
++ void *bicubic_memory;
++ int bicubic_offset;
++ Bool bicubic_enabled;
++ uint32_t bicubic_src_offset;
++
+ Atom device_id, location_id, instance_id;
+
+ /* textured video */
+@@ -106,7 +116,6 @@ typedef struct {
+ int drw_x, drw_y;
+ } RADEONPortPrivRec, *RADEONPortPrivPtr;
+
+-
+ void RADEONInitI2C(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv);
+ void RADEONResetI2C(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv);
+
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -r1.13 -r1.14
--- radeon-modeset.patch 9 Sep 2008 19:20:18 -0000 1.13
+++ radeon-modeset.patch 26 Sep 2008 00:53:39 -0000 1.14
@@ -2,7 +2,7 @@
index b8c18a6..a7e954d 100644
--- a/configure.ac
+++ b/configure.ac
-@@ -115,6 +115,15 @@ if test "$DRI" = yes; then
+@@ -115,6 +115,14 @@ if test "$DRI" = yes; then
if test "$have_damage_h" = yes; then
AC_DEFINE(DAMAGE,1,[Use Damage extension])
fi
@@ -14,7 +14,6 @@
+ if test "x$DRM_MODE" = xyes; then
+ AC_DEFINE(XF86DRM_MODE,1,[DRM kernel modesetting])
+ fi
-+ CFLAGS="$save_CFLAGS"
fi
save_CFLAGS="$CFLAGS"
@@ -47,10 +46,10 @@
+ drmmode_display.h
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
new file mode 100644
-index 0000000..97762ce
+index 0000000..25e6183
--- /dev/null
+++ b/src/drmmode_display.c
-@@ -0,0 +1,681 @@
+@@ -0,0 +1,685 @@
+/*
+ * Copyright © 2007 Red Hat, Inc.
+ *
@@ -100,7 +99,7 @@
+ ret = drmmode_resize_fb(scrn, drmmode, width, height);
+ scrn->virtualX = width;
+ scrn->virtualY = height;
-+ return ret;
++ return TRUE;
+}
+
+static void
@@ -184,7 +183,7 @@
+ DisplayModeRec saved_mode;
+ uint32_t *output_ids;
+ int output_count = 0;
-+ int ret = TRUE;
++ Bool ret = TRUE;
+ int i;
+ int fb_id;
+ struct drm_mode_modeinfo kmode;
@@ -231,6 +230,9 @@
+ drmModeSetCrtc(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
+ fb_id, x, y, output_ids, output_count, &kmode);
+
++ if (crtc->scrn->pScreen)
++ xf86CrtcSetScreenSubpixelOrder(crtc->scrn->pScreen);
++
+
+done:
+ if (!ret) {
@@ -583,6 +585,7 @@
+
+ output->possible_crtcs = kencoder->possible_crtcs;
+ output->possible_clones = kencoder->possible_clones;
++
+ return;
+}
+
@@ -1029,7 +1032,7 @@
do { \
if (RADEON_VERBOSE) \
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
-index e617fd5..09aa7f6 100644
+index e617fd5..dfb88a6 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -313,6 +313,9 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
@@ -1051,7 +1054,7 @@
drmRadeonGetParam np;
int num_pipes;
-@@ -391,60 +394,62 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
+@@ -391,60 +394,63 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
}
#endif
@@ -1125,7 +1128,8 @@
+
+ OUTREG(R300_GB_TILE_CONFIG, gb_tile_config);
+ OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
-+ OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
++ if (info->ChipFamily >= CHIP_FAMILY_R420)
++ OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
+ OUTREG(R300_RB2D_DSTCACHE_MODE, (INREG(R300_RB2D_DSTCACHE_MODE) |
+ R300_DC_AUTOFLUSH_ENABLE |
+ R300_DC_DC_DISABLE_IGNORE_PE));
@@ -1164,7 +1168,7 @@
switch (info->CurrentLayout.pixel_code) {
case 8: info->datatype = 2; break;
case 15: info->datatype = 3; break;
-@@ -556,6 +561,149 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info)
+@@ -556,6 +562,149 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info)
}
}
@@ -1314,7 +1318,7 @@
/* Get an indirect buffer for the CP 2D acceleration commands */
drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
{
-@@ -566,6 +714,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
+@@ -566,6 +715,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn)
int size = 0;
int i = 0;
int ret;
@@ -1324,7 +1328,7 @@
#if 0
/* FIXME: pScrn->pScreen has not been initialized when this is first
-@@ -631,6 +782,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
+@@ -631,6 +783,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard)
if (!buffer) return;
if (start == buffer->used && !discard) return;
@@ -1336,7 +1340,7 @@
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flushing buffer %d\n",
buffer->idx);
-@@ -665,10 +821,17 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
+@@ -665,10 +822,17 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn)
int start = info->indirectStart;
drmRadeonIndirect indirect;
@@ -1354,7 +1358,7 @@
if (RADEON_VERBOSE) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Releasing buffer %d\n",
-@@ -795,6 +958,7 @@ RADEONHostDataBlit(
+@@ -795,6 +959,7 @@ RADEONHostDataBlit(
ret = ( uint8_t* )&__head[__count];
__count += dwords;
@@ -1362,7 +1366,7 @@
ADVANCE_RING();
*y += *hpass;
-@@ -932,7 +1096,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
+@@ -932,7 +1097,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
#ifdef USE_EXA
if (info->useEXA) {
# ifdef XF86DRI
@@ -1371,7 +1375,7 @@
if (!RADEONDrawInitCP(pScreen))
return FALSE;
} else
-@@ -953,7 +1117,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
+@@ -953,7 +1118,7 @@ Bool RADEONAccelInit(ScreenPtr pScreen)
}
#ifdef XF86DRI
@@ -1380,7 +1384,7 @@
RADEONAccelInitCP(pScreen, a);
else
#endif /* XF86DRI */
-@@ -975,11 +1139,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
+@@ -975,11 +1140,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn)
RADEONInfoPtr info = RADEONPTR (pScrn);
#ifdef XF86DRI
@@ -2370,12 +2374,14 @@
+typedef drm_radeon_setparam_t drmRadeonSetParam;
+#endif
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
-index d0c5229..15a3beb 100644
+index 1de6bf8..6ead191 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
-@@ -62,11 +62,13 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+@@ -61,12 +61,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+ info->texW[0] = info->texH[0] = info->texW[1] = info->texH[1] = 1;
if (IS_R300_3D || IS_R500_3D) {
++ int size;
- BEGIN_ACCEL(3);
- OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
@@ -2392,7 +2398,22 @@
gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
-@@ -688,7 +690,7 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
+@@ -78,10 +81,12 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
+ case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
+ }
+
+- BEGIN_ACCEL(5);
++ size = (info->ChipFamily >= CHIP_FAMILY_R420) ? 5 : 4;
++ BEGIN_ACCEL(size);
+ OUT_ACCEL_REG(R300_GB_TILE_CONFIG, gb_tile_config);
+ OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
+- OUT_ACCEL_REG(R300_DST_PIPE_CONFIG, R300_PIPE_AUTO_CONFIG);
++ if (info->ChipFamily >= CHIP_FAMILY_R420)
++ OUT_ACCEL_REG(R300_DST_PIPE_CONFIG, R300_PIPE_AUTO_CONFIG);
+ OUT_ACCEL_REG(R300_GB_SELECT, 0);
+ OUT_ACCEL_REG(R300_GB_ENABLE, 0);
+ FINISH_ACCEL();
+@@ -686,7 +691,7 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn)
#ifdef ACCEL_CP
/* Make sure the CP is idle first */
@@ -2490,7 +2511,7 @@
FBAreaPtr fbarea;
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
-index a192811..9fa0add 100644
+index a192811..45414b4 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -40,6 +40,8 @@
@@ -2545,7 +2566,7 @@
static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num);
#endif
#endif
-@@ -345,6 +363,120 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
+@@ -345,6 +363,125 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
#endif
}
@@ -2629,6 +2650,7 @@
+ if (!info->drm_mm)
+ return TRUE;
+
++
+ fb_addr = info->mm.front_buffer->offset + info->LinearAddr;
+ fb_size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes);
+
@@ -2653,6 +2675,10 @@
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ Bool success;
+ RADEONSAREAPrivPtr sarea = DRIGetSAREAPrivate(pScrn->pScreen);
++
++ if (info->ChipFamily >= CHIP_FAMILY_R600)
++ return TRUE;
++
+ success = radeon_update_dri_mappings(pScrn, sarea);
+
+ if (!success)
@@ -2666,7 +2692,7 @@
/* Called when the X server is woken up to allow the last client's
* context to be saved and the X server's context to be loaded. This is
* not necessary for the Radeon since the client detects when it's
-@@ -362,7 +494,7 @@ static void RADEONEnterServer(ScreenPtr pScreen)
+@@ -362,7 +499,7 @@ static void RADEONEnterServer(ScreenPtr pScreen)
RADEON_MARK_SYNC(info, pScrn);
pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
@@ -2675,7 +2701,7 @@
info->XInited3D = FALSE;
info->needCacheFlush = (info->ChipFamily >= CHIP_FAMILY_R300);
}
-@@ -694,25 +826,37 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
+@@ -694,25 +831,37 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
info->gartOffset = 0;
@@ -2729,7 +2755,7 @@
}
/* Set AGP transfer mode according to requests and constraints */
-@@ -884,6 +1028,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -884,6 +1033,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] ring handle = 0x%08x\n", info->ringHandle);
@@ -2737,7 +2763,7 @@
if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
&info->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n");
-@@ -892,7 +1037,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -892,7 +1042,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring mapped at 0x%08lx\n",
(unsigned long)info->ring);
@@ -2746,7 +2772,7 @@
if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
DRM_AGP, DRM_READ_ONLY, &info->ringReadPtrHandle) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -903,6 +1048,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -903,6 +1053,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[agp] ring read ptr handle = 0x%08x\n",
info->ringReadPtrHandle);
@@ -2754,7 +2780,7 @@
if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
&info->ringReadPtr) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -912,7 +1058,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -912,7 +1063,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring read ptr mapped at 0x%08lx\n",
(unsigned long)info->ringReadPtr);
@@ -2763,7 +2789,7 @@
if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
DRM_AGP, 0, &info->bufHandle) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -986,7 +1132,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -986,7 +1137,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
}
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] ring handle = 0x%08x\n", info->ringHandle);
@@ -2772,7 +2798,7 @@
if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
&info->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n");
-@@ -998,6 +1144,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -998,6 +1149,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring contents 0x%08lx\n",
*(unsigned long *)(pointer)info->ring);
@@ -2780,7 +2806,7 @@
if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
-@@ -1008,7 +1155,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1008,7 +1160,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] ring read ptr handle = 0x%08x\n",
info->ringReadPtrHandle);
@@ -2789,7 +2815,7 @@
if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
&info->ringReadPtr) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -1021,6 +1168,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1021,6 +1173,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring read ptr contents 0x%08lx\n",
*(unsigned long *)(pointer)info->ringReadPtr);
@@ -2797,7 +2823,7 @@
if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
-@@ -1073,6 +1221,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1073,6 +1226,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
*/
static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen)
{
@@ -2807,7 +2833,7 @@
/* Map registers */
info->registerSize = info->MMIOSize;
if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize,
-@@ -1094,12 +1245,12 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1094,12 +1250,12 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
memset(&drmInfo, 0, sizeof(drmRadeonInit));
if ( info->ChipFamily >= CHIP_FAMILY_R300 )
@@ -2823,7 +2849,7 @@
drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
drmInfo.is_pci = (info->cardType!=CARD_AGP);
-@@ -1111,19 +1262,22 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1111,19 +1267,22 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drmInfo.fb_bpp = info->CurrentLayout.pixel_code;
drmInfo.depth_bpp = (info->depthBits - 8) * 2;
@@ -2859,7 +2885,7 @@
if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
&drmInfo, sizeof(drmRadeonInit)) < 0)
-@@ -1133,7 +1287,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1133,7 +1292,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
* registers back to their default values, so we need to restore
* those engine register here.
*/
@@ -2869,7 +2895,7 @@
return TRUE;
}
-@@ -1329,12 +1484,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1329,12 +1489,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
/* Get DRM version & close DRM */
info->pKernelDRMVersion = drmGetVersion(fd);
@@ -2883,7 +2909,7 @@
}
/* Now check if we qualify */
-@@ -1368,10 +1522,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1368,10 +1527,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
req_patch);
drmFreeVersion(info->pKernelDRMVersion);
info->pKernelDRMVersion = NULL;
@@ -2914,7 +2940,7 @@
}
Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
-@@ -1380,6 +1553,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1380,6 +1558,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int value = 0;
@@ -2924,7 +2950,7 @@
if (!info->want_vblank_interrupts)
on = FALSE;
-@@ -1399,6 +1575,44 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1399,6 +1580,48 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
return TRUE;
}
@@ -2937,6 +2963,10 @@
+ * common mappings. Add additional
+ * mappings here.
+ */
++
++ if (info->ChipFamily >= CHIP_FAMILY_R600)
++ return TRUE;
++
+ if (!RADEONDRIMapInit(info, pScreen)) {
+ RADEONDRICloseScreen(pScreen);
+ return FALSE;
@@ -2969,7 +2999,7 @@
/* Initialize the screen-specific data structures for the DRI and the
* Radeon. This is the main entry point to the device-specific
-@@ -1462,10 +1676,23 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1462,10 +1685,23 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4;
pDRIInfo->ddxDriverMinorVersion = 3;
pDRIInfo->ddxDriverPatchVersion = 0;
@@ -2997,7 +3027,7 @@
pDRIInfo->ddxDrawableTableEntry = RADEON_MAX_DRAWABLES;
pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES
< RADEON_MAX_DRAWABLES
-@@ -1518,9 +1745,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1518,9 +1754,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d;
pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d;
@@ -3008,7 +3038,7 @@
pDRIInfo->ClipNotify = RADEONDRIClipNotify;
#endif
-@@ -1552,57 +1777,61 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1552,57 +1786,61 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo = NULL;
return FALSE;
}
@@ -3113,7 +3143,7 @@
static Bool RADEONDRIDoCloseScreen(int scrnIndex, ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-@@ -1644,14 +1873,18 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1644,14 +1882,18 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
return FALSE;
}
@@ -3138,7 +3168,7 @@
/* Initialize kernel GART memory manager */
RADEONDRIGartHeapInit(info, pScreen);
-@@ -1663,6 +1896,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1663,6 +1905,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
@@ -3149,7 +3179,7 @@
pRADEONDRI = (RADEONDRIPtr)info->pDRIInfo->devPrivate;
pRADEONDRI->deviceID = info->Chipset;
-@@ -1806,7 +2043,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1806,7 +2052,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
/* De-allocate all kernel resources */
memset(&drmInfo, 0, sizeof(drmRadeonInit));
@@ -3158,7 +3188,7 @@
drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
&drmInfo, sizeof(drmRadeonInit));
-@@ -1819,6 +2056,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1819,6 +2065,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->buf, info->bufMapSize);
info->buf = NULL;
}
@@ -3166,7 +3196,7 @@
if (info->ringReadPtr) {
drmUnmap(info->ringReadPtr, info->ringReadMapSize);
info->ringReadPtr = NULL;
-@@ -1827,6 +2065,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1827,6 +2074,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->ring, info->ringMapSize);
info->ring = NULL;
}
@@ -3174,7 +3204,7 @@
if (info->agpMemHandle != DRM_AGP_NO_HANDLE) {
drmAgpUnbind(info->drmFD, info->agpMemHandle);
drmAgpFree(info->drmFD, info->agpMemHandle);
-@@ -1903,7 +2142,7 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
+@@ -1903,7 +2151,7 @@ static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg)
/* Don't want to do this when no 3d is active and pages are
* right-way-round
*/
@@ -3183,7 +3213,7 @@
return;
REGION_NULL(pScreen, ®ion);
-@@ -1992,7 +2231,7 @@ static void RADEONEnablePageFlip(ScreenPtr pScreen)
+@@ -1992,7 +2240,7 @@ static void RADEONEnablePageFlip(ScreenPtr pScreen)
.y2 = pScrn->virtualY - 1 };
RegionPtr pReg = REGION_CREATE(pScreen, &box, 1);
@@ -3192,7 +3222,7 @@
RADEONDRIRefreshArea(pScrn, pReg);
REGION_DESTROY(pScreen, pReg);
}
-@@ -2007,7 +2246,7 @@ static void RADEONDisablePageFlip(ScreenPtr pScreen)
+@@ -2007,7 +2255,7 @@ static void RADEONDisablePageFlip(ScreenPtr pScreen)
*/
RADEONSAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
@@ -3201,7 +3231,7 @@
}
static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen)
-@@ -2232,3 +2471,16 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
+@@ -2232,3 +2480,16 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
&radeonsetparam, sizeof(drmRadeonSetParam));
return ret;
}
@@ -3219,10 +3249,22 @@
+
+}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
-index 45d2c2f..8fa32ab 100644
+index 45d2c2f..d5bb24d 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
-@@ -1621,6 +1621,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
+@@ -224,7 +224,10 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode,
+ stride = (pScrn->displayWidth * pScrn->bitsPerPixel) / 8;
+ *size = stride;
+
+- return ((uint8_t *)info->FB + row * stride + offset);
++ if (info->drm_mm)
++ return ((uint8_t *)info->mm.front_buffer->map + row * stride + offset);
++ else
++ return ((uint8_t *)info->FB + row * stride + offset);
+ }
+ static Bool
+ RADEONCreateScreenResources (ScreenPtr pScreen)
+@@ -1621,6 +1624,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
}
pScrn->videoRam &= ~1023;
@@ -3230,7 +3272,7 @@
info->FbMapSize = pScrn->videoRam * 1024;
/* if the card is PCI Express reserve the last 32k for the gart table */
-@@ -1748,56 +1749,62 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
+@@ -1748,56 +1752,62 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
from = X_PROBED;
info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL;
pScrn->memPhysBase = info->LinearAddr;
@@ -3335,7 +3377,7 @@
#ifdef XF86DRI
/* AGP/PCI */
-@@ -1985,6 +1992,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
+@@ -1985,6 +1995,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
int errmaj = 0, errmin = 0;
@@ -3345,7 +3387,7 @@
from = X_DEFAULT;
#if defined(USE_EXA)
#if defined(USE_XAA)
-@@ -1995,6 +2005,7 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
+@@ -1995,6 +2008,7 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn)
info->useEXA = TRUE;
} else if (xf86NameCmp(optstr, "XAA") == 0) {
from = X_CONFIG;
@@ -3353,7 +3395,7 @@
}
}
#else /* USE_XAA */
-@@ -2664,6 +2675,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = {
+@@ -2664,6 +2678,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = {
RADEONCRTCResize
};
@@ -3391,7 +3433,7 @@
Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
{
xf86CrtcConfigPtr xf86_config;
-@@ -2684,6 +2726,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2684,6 +2729,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
info = RADEONPTR(pScrn);
info->MMIO = NULL;
@@ -3400,7 +3442,7 @@
info->IsSecondary = FALSE;
info->IsPrimary = FALSE;
-@@ -2718,59 +2762,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2718,59 +2765,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
}
info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
@@ -3508,7 +3550,7 @@
if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive))
goto fail;
-@@ -2780,10 +2828,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2780,10 +2831,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR;
pScrn->monitor = pScrn->confScreen->monitor;
@@ -3525,7 +3567,7 @@
if (!RADEONPreInitVisual(pScrn))
goto fail;
-@@ -2797,136 +2847,192 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2797,136 +2850,194 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options);
@@ -3806,10 +3848,12 @@
+ info->fbLocation = (value & 0xffff) << 16;
+ }
+ }
-+ info->useEXA = TRUE;
-+ info->drm_mm = TRUE;
-+ info->directRenderingEnabled = TRUE;
++ if (info->ChipFamily < CHIP_FAMILY_R600) {
++ info->useEXA = TRUE;
++ info->directRenderingEnabled = TRUE;
++ }
+ info->new_cs = TRUE;
++ info->drm_mm = TRUE;
+ // info->directRenderingDisabled = FALSE;
+#endif
+ }
@@ -3823,7 +3867,7 @@
/* Get ScreenInit function */
if (!xf86LoadSubModule(pScrn, "fb")) return FALSE;
-@@ -2941,10 +3047,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
+@@ -2941,10 +3052,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
if (!RADEONPreInitXv(pScrn)) goto fail;
}
@@ -3840,7 +3884,7 @@
}
if (pScrn->modes == NULL) {
-@@ -3185,7 +3293,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3185,7 +3298,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
int subPixelOrder = SubPixelUnknown;
char* s;
#endif
@@ -3849,7 +3893,7 @@
info->accelOn = FALSE;
#ifdef USE_XAA
-@@ -3205,52 +3313,55 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3205,52 +3318,55 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
"RADEONScreenInit %lx %ld\n",
pScrn->memPhysBase, pScrn->fbOffset);
#endif
@@ -3939,7 +3983,7 @@
/* Visual setup */
miClearVisualTypes();
if (!miSetVisualTypes(pScrn->depth,
-@@ -3284,19 +3395,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3284,19 +3400,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
hasDRI = info->directRenderingEnabled;
#endif /* XF86DRI */
@@ -3973,7 +4017,7 @@
}
}
-@@ -3341,6 +3454,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3341,6 +3459,9 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
from = X_CONFIG;
}
@@ -3983,7 +4027,25 @@
/* Reserve approx. half of offscreen memory for local textures by
* default, can be overridden with Option "FBTexPercent".
* Round down to a whole number of texture regions.
-@@ -3407,7 +3523,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3369,7 +3490,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+ #endif
+
+ #if defined(XF86DRI) && defined(USE_XAA)
+- if (!info->useEXA && hasDRI) {
++ if (!info->useEXA && hasDRI && !info->drm_mm) {
+ info->textureSize = -1;
+ if (xf86GetOptValInteger(info->Options, OPTION_FBTEX_PERCENT,
+ &(info->textureSize))) {
+@@ -3387,7 +3508,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+ #endif
+
+ #ifdef USE_XAA
+- if (!info->useEXA && !hasDRI && !RADEONSetupMemXAA(scrnIndex, pScreen))
++ if (!info->useEXA && !hasDRI && !info->drm_mm && !RADEONSetupMemXAA(scrnIndex, pScreen))
+ return FALSE;
+ #endif
+
+@@ -3407,7 +3528,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->CurrentLayout.pixel_bytes);
int maxy = info->FbMapSize / width_bytes;
@@ -3992,7 +4054,7 @@
xf86DrvMsg(scrnIndex, X_ERROR,
"Static buffer allocation failed. Disabling DRI.\n");
xf86DrvMsg(scrnIndex, X_ERROR,
-@@ -3421,15 +3537,39 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3421,15 +3542,39 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
}
}
@@ -4035,7 +4097,7 @@
#endif
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Initializing fb layer\n");
-@@ -3453,7 +3593,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3453,7 +3598,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
if (info->r600_shadow_fb == FALSE) {
/* Init fb layer */
@@ -4044,7 +4106,7 @@
pScrn->virtualX, pScrn->virtualY,
pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth,
pScrn->bitsPerPixel))
-@@ -3508,7 +3648,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3508,7 +3653,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
/* DRI finalisation */
#ifdef XF86DRI
@@ -4053,7 +4115,7 @@
info->pKernelDRMVersion->version_minor >= 19)
{
if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_LOCATION, info->pciGartOffset) < 0)
-@@ -3527,15 +3667,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
+@@ -3527,15 +3672,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
info->directRenderingEnabled = RADEONDRIFinishScreenInit(pScreen);
}
if (info->directRenderingEnabled) {
@@ -4079,7 +4141,7 @@
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
-@@ -5355,6 +5501,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
+@@ -5355,6 +5506,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags)
xf86OutputPtr output = config->output[config->compat_output];
xf86CrtcPtr crtc = output->crtc;
@@ -4091,7 +4153,7 @@
#ifdef XF86DRI
if (info->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0);
#endif
-@@ -5390,67 +5541,76 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
+@@ -5390,67 +5546,80 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"RADEONEnterVT\n");
@@ -4100,37 +4162,53 @@
- rhdAtomASICInit(info->atomBIOS);
- } else {
- xf86Int10InfoPtr pInt;
--
-- pInt = xf86InitInt10 (info->pEnt->index);
-- if (pInt) {
-- pInt->num = 0xe6;
-- xf86ExecX86int10 (pInt);
-- xf86FreeInt10 (pInt);
+ if (!info->drm_mode_setting) {
+ if (!radeon_card_posted(pScrn)) { /* Softboot V_BIOS */
-+ if (info->IsAtomBios) {
++ if (info->IsAtomBios) {
+ rhdAtomASICInit(info->atomBIOS);
- } else {
-- RADEONGetBIOSInitTableOffsets(pScrn);
-- RADEONPostCardFromBIOSTables(pScrn);
-+ xf86Int10InfoPtr pInt;
-+ pInt = xf86InitInt10 (info->pEnt->index);
-+ if (pInt) {
++ } else {
++ xf86Int10InfoPtr pInt;
++
++ pInt = xf86InitInt10 (info->pEnt->index);
++ if (pInt) {
+ pInt->num = 0xe6;
+ xf86ExecX86int10 (pInt);
+ xf86FreeInt10 (pInt);
-+ } else {
++ } else {
+ RADEONGetBIOSInitTableOffsets(pScrn);
+ RADEONPostCardFromBIOSTables(pScrn);
-+ }
++ }
++ }
++ }
++ /* Makes sure the engine is idle before doing anything */
++ RADEONWaitForIdleMMIO(pScrn);
+
+- pInt = xf86InitInt10 (info->pEnt->index);
+- if (pInt) {
+- pInt->num = 0xe6;
+- xf86ExecX86int10 (pInt);
+- xf86FreeInt10 (pInt);
++ if (info->IsMobility && !IS_AVIVO_VARIANT) {
++ if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
++ RADEONSetDynamicClock(pScrn, 1);
+ } else {
+- RADEONGetBIOSInitTableOffsets(pScrn);
+- RADEONPostCardFromBIOSTables(pScrn);
++ RADEONSetDynamicClock(pScrn, 0);
++ }
++ } else if (IS_AVIVO_VARIANT) {
++ if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
++ atombios_static_pwrmgt_setup(pScrn, 1);
++ atombios_dyn_clk_setup(pScrn, 1);
}
}
- }
-
- /* Makes sure the engine is idle before doing anything */
- RADEONWaitForIdleMMIO(pScrn);
-+ /* Makes sure the engine is idle before doing anything */
-+ RADEONWaitForIdleMMIO(pScrn);
++
++ if (IS_R300_VARIANT || IS_RV100_VARIANT)
++ RADEONForceSomeClocks(pScrn);
- if (info->IsMobility && !IS_AVIVO_VARIANT) {
- if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
@@ -4142,28 +4220,16 @@
- if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
- atombios_static_pwrmgt_setup(pScrn, 1);
- atombios_dyn_clk_setup(pScrn, 1);
-+ if (info->IsMobility && !IS_AVIVO_VARIANT) {
-+ if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
-+ RADEONSetDynamicClock(pScrn, 1);
-+ } else {
-+ RADEONSetDynamicClock(pScrn, 0);
-+ }
-+ } else if (IS_AVIVO_VARIANT) {
-+ if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) {
-+ atombios_static_pwrmgt_setup(pScrn, 1);
-+ atombios_dyn_clk_setup(pScrn, 1);
-+ }
- }
-+
-+ if (IS_R300_VARIANT || IS_RV100_VARIANT)
-+ RADEONForceSomeClocks(pScrn);
-+
+- }
}
- if (IS_R300_VARIANT || IS_RV100_VARIANT)
- RADEONForceSomeClocks(pScrn);
-+ if (info->drm_mm)
++ if (info->drm_mm) {
+ radeon_bind_all_memory(pScrn);
++ info->XInited3D = FALSE;
++ info->engineMode = EXA_ENGINEMODE_UNKNOWN;
++ }
- for (i = 0; i < config->num_crtc; i++)
- radeon_crtc_modeset_ioctl(config->crtc[i], TRUE);
@@ -4214,7 +4280,7 @@
}
#endif
/* this will get XVideo going again, but only if XVideo was initialised
-@@ -5462,7 +5622,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
+@@ -5462,7 +5631,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
RADEONEngineRestore(pScrn);
#ifdef XF86DRI
@@ -4223,7 +4289,7 @@
RADEONCP_START(pScrn, info);
DRIUnlock(pScrn->pScreen);
}
-@@ -5485,24 +5645,26 @@ void RADEONLeaveVT(int scrnIndex, int flags)
+@@ -5485,24 +5654,26 @@ void RADEONLeaveVT(int scrnIndex, int flags)
"RADEONLeaveVT\n");
#ifdef XF86DRI
if (RADEONPTR(pScrn)->directRenderingInited) {
@@ -4263,7 +4329,7 @@
i = 0;
-@@ -5531,10 +5693,15 @@ void RADEONLeaveVT(int scrnIndex, int flags)
+@@ -5531,10 +5702,15 @@ void RADEONLeaveVT(int scrnIndex, int flags)
xf86_hide_cursors (pScrn);
@@ -4282,7 +4348,7 @@
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Ok, leaving now...\n");
-@@ -5579,7 +5746,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
+@@ -5579,7 +5755,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
#endif /* USE_XAA */
if (pScrn->vtSema) {
@@ -4292,7 +4358,7 @@
}
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
-@@ -5614,6 +5782,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
+@@ -5614,6 +5791,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen)
info->DGAModes = NULL;
xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
"Unmapping memory\n");
@@ -4820,10 +4886,10 @@
}
#endif
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
-index 56de23e..628d2c7 100644
+index 56de23e..b8b6602 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
-@@ -74,21 +74,69 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
+@@ -74,21 +74,78 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -4856,8 +4922,17 @@
+
+ qwords = info->new_cs ? 11 : 9;
+ qwords += (has_src ? (info->new_cs ? 3 : 1) : 0);
++ qwords += (info->ChipFamily <= CHIP_FAMILY_RV280 ? 3 : 2);
+
+ BEGIN_ACCEL(qwords);
++ if (info->ChipFamily <= CHIP_FAMILY_RV280) {
++ OUT_ACCEL_REG(RADEON_RE_TOP_LEFT, 0);
++ OUT_ACCEL_REG(RADEON_RE_WIDTH_HEIGHT, 0x7ff07ff);
++ OUT_ACCEL_REG(RADEON_AUX_SC_CNTL, 0);
++ } else {
++ OUT_ACCEL_REG(R300_SC_SCISSOR0, 0);
++ OUT_ACCEL_REG(R300_SC_SCISSOR1, 0x7ff07ff);
++ }
+ OUT_ACCEL_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right);
+ OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_master_cntl);
+ OUT_ACCEL_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr);
@@ -4894,7 +4969,7 @@
ACCEL_PREAMBLE();
TRACE;
-@@ -97,25 +145,35 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
+@@ -97,25 +154,35 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
RADEON_FALLBACK(("24bpp unsupported\n"));
if (!RADEONGetDatatypeBpp(pPix->drawable.bitsPerPixel, &datatype))
RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n"));
@@ -4945,7 +5020,7 @@
return TRUE;
}
-@@ -148,8 +206,10 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
+@@ -148,8 +215,10 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
FINISH_ACCEL();
@@ -4956,7 +5031,7 @@
void
FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
uint32_t dst_pitch_offset, uint32_t datatype, int rop,
-@@ -160,23 +220,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
+@@ -160,23 +229,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
RADEON_SWITCH_TO_2D();
@@ -5002,7 +5077,7 @@
}
static Bool
-@@ -187,7 +252,7 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
+@@ -187,7 +261,7 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
{
RINFO_FROM_SCREEN(pDst->drawable.pScreen);
uint32_t datatype, src_pitch_offset, dst_pitch_offset;
@@ -5011,7 +5086,7 @@
TRACE;
info->xdir = xdir;
-@@ -197,10 +262,19 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
+@@ -197,10 +271,19 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
RADEON_FALLBACK(("24bpp unsupported"));
if (!RADEONGetDatatypeBpp(pDst->drawable.bitsPerPixel, &datatype))
RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n"));
@@ -5033,7 +5108,7 @@
FUNC_NAME(RADEONDoPrepareCopy)(pScrn, src_pitch_offset, dst_pitch_offset,
datatype, rop, planemask);
-@@ -250,6 +324,8 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
+@@ -250,6 +333,8 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE);
FINISH_ACCEL();
@@ -5042,7 +5117,7 @@
}
static Bool
-@@ -260,6 +336,8 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -260,6 +345,8 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
uint8_t *dst = info->FB + exaGetPixmapOffset(pDst);
unsigned int dst_pitch = exaGetPixmapPitch(pDst);
unsigned int bpp = pDst->drawable.bitsPerPixel;
@@ -5051,7 +5126,7 @@
#ifdef ACCEL_CP
unsigned int hpass;
uint32_t buf_pitch, dst_pitch_off;
-@@ -276,10 +354,47 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -276,10 +363,47 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
if (bpp < 8)
return FALSE;
@@ -5102,7 +5177,7 @@
int cpp = bpp / 8;
ACCEL_PREAMBLE();
-@@ -294,9 +409,10 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -294,9 +418,10 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h,
exaMarkSync(pDst->drawable.pScreen);
return TRUE;
@@ -5115,7 +5190,7 @@
/* Do we need that sync here ? probably not .... */
exaWaitSync(pDst->drawable.pScreen);
-@@ -388,13 +504,17 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h,
+@@ -388,13 +513,17 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h,
TRACE;
@@ -5134,7 +5209,7 @@
RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) &&
(scratch = RADEONCPGetBuffer(pScrn)))
{
-@@ -540,17 +660,23 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+@@ -540,17 +669,23 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
info->exa->MarkSync = FUNC_NAME(RADEONMarkSync);
info->exa->WaitMarker = FUNC_NAME(RADEONSync);
@@ -5162,7 +5237,7 @@
#ifdef RENDER
if (info->RenderAccel) {
-@@ -560,7 +686,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+@@ -560,7 +695,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
else if (IS_R300_3D || IS_R500_3D) {
if ((info->ChipFamily < CHIP_FAMILY_RS400)
#ifdef XF86DRI
@@ -5171,7 +5246,7 @@
#endif
) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
-@@ -595,6 +721,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+@@ -595,6 +730,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
}
#endif
@@ -5189,7 +5264,7 @@
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n");
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
-index 5d28d80..6426736 100644
+index 043b0d4..456cefe 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -410,19 +410,22 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
@@ -5295,7 +5370,7 @@
dst_pitch = exaGetPixmapPitch(pDst);
colorpitch = dst_pitch >> pixel_shift;
-@@ -1830,9 +1851,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
+@@ -1832,9 +1853,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
FINISH_ACCEL();
}
@@ -5318,10 +5393,10 @@
blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format);
diff --git a/src/radeon_memory.c b/src/radeon_memory.c
new file mode 100644
-index 0000000..ccc3bb8
+index 0000000..8a23ccd
--- /dev/null
+++ b/src/radeon_memory.c
-@@ -0,0 +1,424 @@
+@@ -0,0 +1,428 @@
+
+#include <errno.h>
+#include <sys/ioctl.h>
@@ -5345,6 +5420,10 @@
+
+ int ret;
+
++ if (mem->pool == RADEON_POOL_VRAM)
++ pin.pin_domain = RADEON_GEM_DOMAIN_VRAM;
++ else
++ pin.pin_domain = RADEON_GEM_DOMAIN_GTT;
+ pin.handle = mem->kernel_bo_handle;
+ pin.alignment = mem->alignment;
+
@@ -5807,7 +5886,7 @@
+typedef drm_radeon_sarea_t RADEONSAREAPriv, *RADEONSAREAPrivPtr;
+#endif
diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c
-index cfa349d..ef05c72 100644
+index da1d60f..9682ad8 100644
--- a/src/radeon_textured_video.c
+++ b/src/radeon_textured_video.c
@@ -85,6 +85,7 @@ static __inline__ uint32_t F_TO_DW(float val)
@@ -5818,23 +5897,23 @@
#define FINISH_VIDEO()
#include "radeon_textured_videofuncs.c"
-@@ -93,6 +94,7 @@ static __inline__ uint32_t F_TO_DW(float val)
- #undef VIDEO_PREAMBLE
+@@ -94,6 +95,7 @@ static __inline__ uint32_t F_TO_DW(float val)
#undef BEGIN_VIDEO
#undef OUT_VIDEO_REG
+ #undef OUT_VIDEO_REG_F
+#undef OUT_RELOC
#undef FINISH_VIDEO
#ifdef XF86DRI
-@@ -105,6 +107,7 @@ static __inline__ uint32_t F_TO_DW(float val)
- #define OUT_VIDEO_REG(reg, val) OUT_RING_REG(reg, val)
+@@ -107,6 +109,7 @@ static __inline__ uint32_t F_TO_DW(float val)
+ #define OUT_VIDEO_REG_F(reg, val) OUT_VIDEO_REG(reg, F_TO_DW(val))
#define FINISH_VIDEO() ADVANCE_RING()
#define OUT_VIDEO_RING_F(x) OUT_RING(F_TO_DW(x))
+#define OUT_RELOC(x, read, write) OUT_RING_RELOC(x, read, write)
#include "radeon_textured_videofuncs.c"
-@@ -179,7 +182,8 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
+@@ -181,7 +184,8 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
}
#ifdef XF86DRI
@@ -5844,7 +5923,7 @@
/* The upload blit only supports multiples of 64 bytes */
dstPitch = (dstPitch + 63) & ~63;
else
-@@ -226,8 +230,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
+@@ -240,8 +244,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
left = (x1 >> 16) & ~1;
npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left;
@@ -5859,7 +5938,7 @@
pPriv->src_pitch = dstPitch;
pPriv->size = size;
pPriv->pDraw = pDraw;
-@@ -283,7 +291,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
+@@ -301,7 +309,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn,
pPriv->h = height;
#ifdef XF86DRI
@@ -5869,11 +5948,11 @@
else
#endif
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
-index d39f74d..56d71b1 100644
+index b53e114..1e9f3b1 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
-@@ -82,19 +82,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
- int dstxoff, dstyoff, pixel_shift;
+@@ -103,19 +103,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ int dstxoff, dstyoff, pixel_shift, vtx_count;
BoxPtr pBox = REGION_RECTS(&pPriv->clip);
int nBox = REGION_NUM_RECTS(&pPriv->clip);
+ int qwords;
@@ -5895,7 +5974,7 @@
dst_pitch = pPixmap->devKind;
}
-@@ -183,13 +183,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+@@ -210,13 +210,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
txoffset = pPriv->src_offset;
@@ -5919,12 +5998,12 @@
FINISH_VIDEO();
txenable = R300_TEX_0_ENABLE;
-@@ -408,11 +416,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
- FINISH_VIDEO();
+@@ -980,11 +988,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ }
}
-- BEGIN_VIDEO(5);
-+ qwords = info->new_cs ? 7 : 5;
+- BEGIN_VIDEO(6);
++ qwords = info->new_cs ? 8 : 6;
+ BEGIN_VIDEO(qwords);
OUT_VIDEO_REG(R300_TX_INVALTAGS, 0);
OUT_VIDEO_REG(R300_TX_ENABLE, txenable);
@@ -5940,16 +6019,16 @@
OUT_VIDEO_REG(R300_RB3D_COLORPITCH0, colorpitch);
blendcntl = RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO;
-@@ -459,6 +474,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
- RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
+@@ -1029,6 +1044,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE);
OUT_VIDEO_REG(RADEON_RB3D_CNTL,
- dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ dst_format | RADEON_ALPHA_BLEND_ENABLE);
+ dst_offset += info->fbLocation + pScrn->fbOffset;
OUT_VIDEO_REG(RADEON_RB3D_COLOROFFSET, dst_offset);
OUT_VIDEO_REG(RADEON_RB3D_COLORPITCH, colorpitch);
-@@ -496,7 +512,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
- ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT));
+@@ -1066,7 +1082,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT));
OUT_VIDEO_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32);
- OUT_VIDEO_REG(R200_PP_TXOFFSET_0, pPriv->src_offset);
@@ -5957,22 +6036,22 @@
+ info->fbLocation + pScrn->fbOffset);
OUT_VIDEO_REG(R200_PP_TXCBLEND_0,
- R200_TXC_ARG_A_ZERO |
-@@ -530,7 +547,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
- RADEON_CLAMP_T_CLAMP_LAST |
- RADEON_YUV_TO_RGB);
+ R200_TXC_ARG_A_ZERO |
+@@ -1100,7 +1117,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
+ RADEON_CLAMP_T_CLAMP_LAST |
+ RADEON_YUV_TO_RGB);
OUT_VIDEO_REG(RADEON_PP_TXFORMAT_0, txformat);
- OUT_VIDEO_REG(RADEON_PP_TXOFFSET_0, pPriv->src_offset);
+ OUT_VIDEO_REG(RADEON_PP_TXOFFSET_0, pPriv->src_offset +
+ info->fbLocation + pScrn->fbOffset);
OUT_VIDEO_REG(RADEON_PP_TXCBLEND_0,
- RADEON_COLOR_ARG_A_ZERO |
- RADEON_COLOR_ARG_B_ZERO |
+ RADEON_COLOR_ARG_A_ZERO |
+ RADEON_COLOR_ARG_B_ZERO |
diff --git a/src/radeon_video.c b/src/radeon_video.c
-index 57dcd8a..ecd34a1 100644
+index e71f0f8..a7ea788 100644
--- a/src/radeon_video.c
+++ b/src/radeon_video.c
-@@ -275,7 +275,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
+@@ -270,7 +270,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr));
adaptors = newAdaptors;
@@ -5981,7 +6060,7 @@
overlayAdaptor = RADEONSetupImageVideo(pScreen);
if (overlayAdaptor != NULL) {
adaptors[num_adaptors++] = overlayAdaptor;
-@@ -288,7 +288,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
+@@ -283,7 +283,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
if (info->ChipFamily != CHIP_FAMILY_RV250) {
if ((info->ChipFamily < CHIP_FAMILY_RS400)
#ifdef XF86DRI
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.115
retrieving revision 1.116
diff -u -r1.115 -r1.116
--- xorg-x11-drv-ati.spec 22 Sep 2008 19:01:10 -0000 1.115
+++ xorg-x11-drv-ati.spec 26 Sep 2008 00:53:39 -0000 1.116
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.9.0
-Release: 15%{?dist}
+Release: 16%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -16,8 +16,6 @@
Patch0: radeon-6.9.0-to-git.patch
Patch1: radeon-modeset.patch
-Patch2: radeon-suspend-fix.patch
-Patch3: radeon-fix-pipe-config.patch
Patch4: radeon-6.9.0-remove-limit-heuristics.patch
Patch5: radeon-6.9.0-panel-size-sanity.patch
Patch6: copy-fb-contents.patch
@@ -41,8 +39,6 @@
%setup -q -n %{tarball}-%{version}
%patch0 -p1 -b .git
%patch1 -p1 -b .modeset
-%patch2 -p1 -b .suspend
-%patch3 -p1 -b .pipe-config
%patch4 -p1 -b .remove-limit-heuristics
%patch5 -p1 -b .panel-size
%patch6 -p1 -b .copy-fb-contents
@@ -77,6 +73,10 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Fri Sep 26 2008 Dave Airlie <airlied at redhat.com> 6.9.0-16
+- rebase to a later tree - still not fully up to git master
+- add some fixes to the resize stuff - not fully done
+
* Fri Sep 19 2008 Kristian Høgsberg <krh at redhat.com> - 6.9.0-15
- Add copy-fb-contents.patch to initialize the root window contents
with the fbdev contents for slick startup.
--- radeon-fix-pipe-config.patch DELETED ---
--- radeon-suspend-fix.patch DELETED ---
- Previous message (by thread): rpms/trac-bazaar-plugin/F-9 sources, 1.3, 1.4 trac-bazaar-extra-return.patch, 1.1, 1.2 trac-bazaar-plugin.spec, 1.4, 1.5 trac-bazaar-escape.patch, 1.1, NONE trac-bazaar-timestamp.patch, 1.1, NONE
- Next message (by thread): rpms/kernel/devel patch-2.6.27-rc7-git4.bz2.sign, NONE, 1.1 .cvsignore, 1.931, 1.932 kernel.spec, 1.986, 1.987 sources, 1.893, 1.894 upstream, 1.805, 1.806 patch-2.6.27-rc7-git3.bz2.sign, 1.1, NONE
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