rpms/xorg-x11-drv-intel/devel rc1-to-2.7.patch, NONE, 1.1 xorg-x11-drv-intel.spec, 1.10, 1.11 no-legacy3d.patch, 1.1, NONE
Kristian Høgsberg
krh at fedoraproject.org
Tue Apr 7 13:42:02 UTC 2009
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Author: krh
Update of /cvs/pkgs/rpms/xorg-x11-drv-intel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv9361
Modified Files:
xorg-x11-drv-intel.spec
Added Files:
rc1-to-2.7.patch
Removed Files:
no-legacy3d.patch
Log Message:
* Mon Apr 6 2009 Kristian Høgsberg <krh at redhat.com> - 2.6.99.902-1
- Update to newer 2.7 snapshot, drop no-legacy3d.patch.
rc1-to-2.7.patch:
--- NEW FILE rc1-to-2.7.patch ---
diff --git a/configure.ac b/configure.ac
index aeb675c..7d38cad 100644
--- a/configure.ac
+++ b/configure.ac
@@ -206,7 +206,7 @@ if test "x$GCC" = "xyes"; then
-Wnested-externs -fno-strict-aliasing"
fi
-PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.5])
+PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.6])
AM_CONDITIONAL(DRI, test x$DRI = xyes)
if test "$DRI" = yes; then
PKG_CHECK_MODULES(DRI, [xf86driproto glproto])
diff --git a/man/Makefile.am b/man/Makefile.am
index 7432d5a..ac08621 100644
--- a/man/Makefile.am
+++ b/man/Makefile.am
@@ -25,21 +25,12 @@
#
drivermandir = $(DRIVER_MAN_DIR)
+driverman_DATA = $(DRIVER_NAME).$(DRIVER_MAN_SUFFIX)
-DRIVER_MAN_DIR_SUFFIX = $(DRIVER_MAN_DIR:@mandir@/man%=%)
-
-driverman_PRE = @DRIVER_NAME at .man
-
-driverman_DATA = \
- $(driverman_PRE:man=@DRIVER_MAN_SUFFIX@) \
- i810. at DRIVER_MAN_SUFFIX@
-
-EXTRA_DIST = @DRIVER_NAME at .man
+EXTRA_DIST = $(DRIVER_NAME).man
CLEANFILES = $(driverman_DATA)
-SED = sed
-
# Strings to replace in man pages
XORGRELSTRING = @PACKAGE_STRING@
XORGMANNAME = X Version 11
@@ -60,10 +51,3 @@ SUFFIXES = .$(DRIVER_MAN_SUFFIX) .man
.man.$(DRIVER_MAN_SUFFIX):
sed $(MAN_SUBSTS) < $< > $@
-
-BUILT_SOURCES = shadows.DONE
-
-shadows.DONE:
- -rm -f i810. at DRIVER_MAN_SUFFIX@
- echo .so man$(DRIVER_MAN_DIR_SUFFIX)/intel.$(DRIVER_MAN_SUFFIX) > \
- i810. at DRIVER_MAN_SUFFIX@
diff --git a/man/intel.man b/man/intel.man
index ee237f8..ffe69a1 100644
--- a/man/intel.man
+++ b/man/intel.man
@@ -146,15 +146,6 @@ have options for selecting adaptors.
.IP
Default: Textured video adaptor is preferred.
.TP
-.BI "Option \*qLegacy3D\*q \*q" boolean \*q
-Enable support for the non-GEM mode of the 3D driver on i830 and newer.
-This will allocate a large static area for older Mesa to use for its texture
-pool. On systems with a working GEM environment, this can be disabled to
-increase the memory pool available to other graphics tasks.
-.IP
-Default for i830 and newer: Enabled.
-.IP
-Default for i810: this option is not used.
.BI "Option \*qAccelMethod\*q \*q" string \*q
Choose acceleration architecture, either "XAA", "EXA", or "UXA". XAA is the old
XFree86 based acceleration architecture. EXA is a simpler
@@ -322,7 +313,7 @@ This property allows you to control the output standard used on your TV output p
.B TV_Connector
- connector type
.TP 2
-This config option should be added to xorg.conf TV monitor's section, it allows you to control the TV output connector type, which bypass load detect. You can select between S-Video, Composite and Component.
+This config option should be added to xorg.conf TV monitor's section, it allows you to force the TV output connector type, which bypass load detect and TV will always be taken as connected. You can select between S-Video, Composite and Component.
.SS "TMDS-1"
First DVI SDVO output
diff --git a/src/Makefile.am b/src/Makefile.am
index e05dbab..ad87afc 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -220,9 +220,3 @@ if XVMC
intel_drv_la_SOURCES += \
$(INTEL_XVMC_SRCS)
endif
-
-install-data-local: install-intel_drv_laLTLIBRARIES
- (cd $(DESTDIR)$(intel_drv_ladir) && rm -f i810_drv.so && ln -s intel_drv.so i810_drv.so)
-
-uninstall-local:
- (cd $(DESTDIR)$(intel_drv_ladir) && rm -f i810_drv.so)
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index 141c027..a276ff7 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -60,6 +60,9 @@ typedef struct {
} drmmode_output_private_rec, *drmmode_output_private_ptr;
static void
+drmmode_output_dpms(xf86OutputPtr output, int mode);
+
+static void
drmmode_ConvertFromKMode(ScrnInfoPtr scrn,
drmModeModeInfoPtr kmode,
DisplayModePtr mode)
@@ -210,6 +213,16 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
else
ret = TRUE;
+ /* Turn on any outputs on this crtc that may have been disabled */
+ for (i = 0; i < xf86_config->num_output; i++) {
+ xf86OutputPtr output = xf86_config->output[i];
+
+ if (output->crtc != crtc)
+ continue;
+
+ drmmode_output_dpms(output, DPMSModeOn);
+ }
+
done:
if (!ret) {
crtc->x = saved_x;
@@ -359,7 +372,7 @@ drmmode_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *dat
* unbound. */
drmModeRmFB(drmmode->fd, drmmode_crtc->rotate_fb_id);
drmmode_crtc->rotate_fb_id = 0;
- drm_intel_bo_unmap(drmmode_crtc->rotate_bo);
+ drm_intel_gem_bo_unmap_gtt(drmmode_crtc->rotate_bo);
dri_bo_unreference(drmmode_crtc->rotate_bo);
drmmode_crtc->rotate_bo = NULL;
}
diff --git a/src/i810.h b/src/i810.h
index 7ea2043..c88771e 100644
--- a/src/i810.h
+++ b/src/i810.h
@@ -70,7 +70,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define I810_VERSION 4000
#define I810_NAME "intel"
#define I810_DRIVER_NAME "intel"
-#define I810_LEGACY_DRIVER_NAME "i810"
#define INTEL_VERSION_MAJOR PACKAGE_VERSION_MAJOR
#define INTEL_VERSION_MINOR PACKAGE_VERSION_MINOR
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 6ae388d..fe4bd62 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -472,21 +472,6 @@ static XF86ModuleVersionInfo intelVersRec = {
_X_EXPORT XF86ModuleData intelModuleData = { &intelVersRec, i810Setup, NULL };
-static XF86ModuleVersionInfo i810VersRec = {
- "i810",
- MODULEVENDORSTRING,
- MODINFOSTRING1,
- MODINFOSTRING2,
- XORG_VERSION_CURRENT,
- INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
- ABI_CLASS_VIDEODRV,
- ABI_VIDEODRV_VERSION,
- MOD_CLASS_VIDEODRV,
- {0, 0, 0, 0}
-};
-
-_X_EXPORT XF86ModuleData i810ModuleData = { &i810VersRec, i810Setup, NULL };
-
static pointer
i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
{
@@ -681,9 +666,7 @@ I810Probe(DriverPtr drv, int flags)
* driver, and return if there are none.
*/
if ((numDevSections =
- xf86MatchDevice(I810_DRIVER_NAME, &devSections)) <= 0 &&
- (numDevSections =
- xf86MatchDevice(I810_LEGACY_DRIVER_NAME, &devSections)) <= 0) {
+ xf86MatchDevice(I810_DRIVER_NAME, &devSections)) <= 0 ) {
return FALSE;
}
diff --git a/src/i830_bios.c b/src/i830_bios.c
index 7f20553..4f2355d 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -161,7 +161,7 @@ parse_general_features(I830Ptr pI830, struct bdb_header *bdb)
pI830->tv_present = general->int_tv_support;
pI830->lvds_use_ssc = general->enable_ssc;
if (pI830->lvds_use_ssc) {
- if (IS_I855(pI830))
+ if (IS_I85X(pI830))
pI830->lvds_ssc_freq = general->ssc_freq ? 66 : 48;
else
pI830->lvds_ssc_freq = general->ssc_freq ? 100 : 96;
@@ -181,6 +181,12 @@ parse_driver_feature(I830Ptr pI830, struct bdb_header *bdb)
if (!IS_I9XX(pI830))
return;
+ /* XXX Disable this parsing, as it looks doesn't work for all
+ VBIOS. Reenable it if we could find out the reliable VBT parsing
+ for LVDS config later. */
+ if (1)
+ return;
+
feature = find_section(bdb, BDB_DRIVER_FEATURES);
if (!feature)
return;
diff --git a/src/i830_display.c b/src/i830_display.c
index ca55906..43ea4d4 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -865,6 +865,9 @@ i830_disable_vga_plane (xf86CrtcPtr crtc)
sr01 = INREG8(SRX + 1);
OUTREG8(SRX + 1, sr01 | (1 << 5));
usleep(30);
+ /* disable center mode on 965GM and G4X platform */
+ if (IS_I965GM(pI830) || IS_G4X(pI830))
+ vgacntrl &= ~(3 << 24);
vgacntrl |= VGA_DISP_DISABLE;
@@ -873,14 +876,8 @@ i830_disable_vga_plane (xf86CrtcPtr crtc)
}
-/**
- * Sets the power management mode of the pipe and plane.
- *
- * This code should probably grow support for turning the cursor off and back
- * on appropriately at the same time as we're turning the pipe off/on.
- */
-static void
-i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
+void
+i830_crtc_enable(xf86CrtcPtr crtc)
{
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
@@ -893,112 +890,148 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
int dspbase_reg = (plane == 0) ? DSPABASE : DSPBBASE;
uint32_t temp;
- /* XXX: When our outputs are all unaware of DPMS modes other than off and
- * on, we should map those modes to DPMSModeOff in the CRTC.
- */
- switch (mode) {
- case DPMSModeOn:
- case DPMSModeStandby:
- case DPMSModeSuspend:
- /* Enable the DPLL */
- temp = INREG(dpll_reg);
- if ((temp & DPLL_VCO_ENABLE) == 0)
- {
- OUTREG(dpll_reg, temp);
- POSTING_READ(dpll_reg);
- /* Wait for the clocks to stabilize. */
- usleep(150);
- OUTREG(dpll_reg, temp | DPLL_VCO_ENABLE);
- POSTING_READ(dpll_reg);
- /* Wait for the clocks to stabilize. */
- usleep(150);
- OUTREG(dpll_reg, temp | DPLL_VCO_ENABLE);
- POSTING_READ(dpll_reg);
- /* Wait for the clocks to stabilize. */
- usleep(150);
- }
+ /* Enable the DPLL */
+ temp = INREG(dpll_reg);
+ if ((temp & DPLL_VCO_ENABLE) == 0)
+ {
+ OUTREG(dpll_reg, temp);
+ POSTING_READ(dpll_reg);
+ /* Wait for the clocks to stabilize. */
+ usleep(150);
+ OUTREG(dpll_reg, temp | DPLL_VCO_ENABLE);
+ POSTING_READ(dpll_reg);
+ /* Wait for the clocks to stabilize. */
+ usleep(150);
+ OUTREG(dpll_reg, temp | DPLL_VCO_ENABLE);
+ POSTING_READ(dpll_reg);
+ /* Wait for the clocks to stabilize. */
+ usleep(150);
+ }
- /* Enable the pipe */
- temp = INREG(pipeconf_reg);
- if ((temp & PIPEACONF_ENABLE) == 0)
- OUTREG(pipeconf_reg, temp | PIPEACONF_ENABLE);
+ /* Enable the pipe */
+ temp = INREG(pipeconf_reg);
+ if ((temp & PIPEACONF_ENABLE) == 0)
+ OUTREG(pipeconf_reg, temp | PIPEACONF_ENABLE);
- /* Enable the plane */
- temp = INREG(dspcntr_reg);
- if ((temp & DISPLAY_PLANE_ENABLE) == 0)
- {
- OUTREG(dspcntr_reg, temp | DISPLAY_PLANE_ENABLE);
- /* Flush the plane changes */
- OUTREG(dspbase_reg, INREG(dspbase_reg));
- }
+ /* Enable the plane */
+ temp = INREG(dspcntr_reg);
+ if ((temp & DISPLAY_PLANE_ENABLE) == 0)
+ {
+ OUTREG(dspcntr_reg, temp | DISPLAY_PLANE_ENABLE);
+ /* Flush the plane changes */
+ OUTREG(dspbase_reg, INREG(dspbase_reg));
+ }
- i830_crtc_load_lut(crtc);
+ i830_crtc_load_lut(crtc);
- /* Give the overlay scaler a chance to enable if it's on this pipe */
- i830_crtc_dpms_video(crtc, TRUE);
+ /* Give the overlay scaler a chance to enable if it's on this pipe */
+ i830_crtc_dpms_video(crtc, TRUE);
- /* Reenable compression if needed */
- if (i830_use_fb_compression(crtc))
- i830_enable_fb_compression(crtc);
- i830_modeset_ctl(crtc, 0);
- break;
- case DPMSModeOff:
- i830_modeset_ctl(crtc, 1);
- /* Shut off compression if in use */
- if (i830_use_fb_compression(crtc))
- i830_disable_fb_compression(crtc);
+ /* Reenable compression if needed */
+ if (i830_use_fb_compression(crtc))
+ i830_enable_fb_compression(crtc);
+ i830_modeset_ctl(crtc, 0);
+}
- /* Give the overlay scaler a chance to disable if it's on this pipe */
- i830_crtc_dpms_video(crtc, FALSE);
+void
+i830_crtc_disable(xf86CrtcPtr crtc, Bool disable_pipe)
+{
+ ScrnInfoPtr pScrn = crtc->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+ int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
+ int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
+ int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
+ int dspbase_reg = (plane == 0) ? DSPABASE : DSPBBASE;
+ uint32_t temp;
- /*
- * The documentation says :
- * - Disable planes (VGA or hires)
- * - Disable pipe
- * - Disable VGA display
- */
+ i830_modeset_ctl(crtc, 1);
+ /* Shut off compression if in use */
+ if (i830_use_fb_compression(crtc))
+ i830_disable_fb_compression(crtc);
- /* Disable display plane */
- temp = INREG(dspcntr_reg);
- if ((temp & DISPLAY_PLANE_ENABLE) != 0)
- {
- OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
- /* Flush the plane changes */
- OUTREG(dspbase_reg, INREG(dspbase_reg));
- POSTING_READ(dspbase_reg);
- }
+ /* Give the overlay scaler a chance to disable if it's on this pipe */
+ i830_crtc_dpms_video(crtc, FALSE);
- if (!IS_I9XX(pI830)) {
- /* Wait for vblank for the disable to take effect */
- i830WaitForVblank(pScrn);
- }
+ /*
+ * The documentation says :
+ * - Disable planes (VGA or hires)
+ * - Disable pipe
+ * - Disable VGA display
+ */
- /* May need to leave pipe A on */
- if ((pipe != 0) || !(pI830->quirk_flag & QUIRK_PIPEA_FORCE))
- {
- /* Next, disable display pipes */
- temp = INREG(pipeconf_reg);
- if ((temp & PIPEACONF_ENABLE) != 0) {
- OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
- POSTING_READ(pipeconf_reg);
- }
+ /* Disable display plane */
+ temp = INREG(dspcntr_reg);
+ if ((temp & DISPLAY_PLANE_ENABLE) != 0)
+ {
+ OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
+ /* Flush the plane changes */
+ OUTREG(dspbase_reg, INREG(dspbase_reg));
+ POSTING_READ(dspbase_reg);
+ }
- /* Wait for vblank for the disable to take effect. */
- i830WaitForVblank(pScrn);
+ if (!IS_I9XX(pI830)) {
+ /* Wait for vblank for the disable to take effect */
+ i830WaitForVblank(pScrn);
+ }
- temp = INREG(dpll_reg);
- if ((temp & DPLL_VCO_ENABLE) != 0) {
- OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
- POSTING_READ(dpll_reg);
- }
+ /* May need to leave pipe A on */
+ if (disable_pipe)
+ {
+ /* Next, disable display pipes */
+ temp = INREG(pipeconf_reg);
+ if ((temp & PIPEACONF_ENABLE) != 0) {
+ OUTREG(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
+ POSTING_READ(pipeconf_reg);
+ }
- /* Wait for the clocks to turn off. */
- usleep(150);
+ /* Wait for vblank for the disable to take effect. */
+ i830WaitForVblank(pScrn);
+
+ temp = INREG(dpll_reg);
+ if ((temp & DPLL_VCO_ENABLE) != 0) {
+ OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
+ POSTING_READ(dpll_reg);
}
- /* Disable the VGA plane that we never use. */
- i830_disable_vga_plane (crtc);
+ /* Wait for the clocks to turn off. */
+ usleep(150);
+ }
+ /* Disable the VGA plane that we never use. */
+ i830_disable_vga_plane (crtc);
+}
+
+/**
+ * Sets the power management mode of the pipe and plane.
+ *
+ * This code should probably grow support for turning the cursor off and back
+ * on appropriately at the same time as we're turning the pipe off/on.
+ */
+static void
+i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
+{
+ ScrnInfoPtr pScrn = crtc->scrn;
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+ int pipe = intel_crtc->pipe;
+ Bool disable_pipe = TRUE;
+
+ /* XXX: When our outputs are all unaware of DPMS modes other than off and
+ * on, we should map those modes to DPMSModeOff in the CRTC.
+ */
+ switch (mode) {
+ case DPMSModeOn:
+ case DPMSModeStandby:
+ case DPMSModeSuspend:
+ i830_crtc_enable(crtc);
+ break;
+ case DPMSModeOff:
+ if ((pipe == 0) && (pI830->quirk_flag & QUIRK_PIPEA_FORCE))
+ disable_pipe = FALSE;
+ i830_crtc_disable(crtc, disable_pipe);
break;
}
diff --git a/src/i830_display.h b/src/i830_display.h
index 8d767b1..0ba196d 100644
--- a/src/i830_display.h
+++ b/src/i830_display.h
@@ -32,6 +32,8 @@ void i830PipeSetBase(xf86CrtcPtr crtc, int x, int y);
void i830WaitForVblank(ScrnInfoPtr pScrn);
void i830DescribeOutputConfiguration(ScrnInfoPtr pScrn);
void i830_set_new_crtc_bo(ScrnInfoPtr pScrn);
+void i830_crtc_disable(xf86CrtcPtr crtc, Bool disable_pipe);
+void i830_crtc_enable(xf86CrtcPtr crtc);
xf86CrtcPtr i830GetLoadDetectPipe(xf86OutputPtr output, DisplayModePtr mode, int *dpms_mode);
void i830ReleaseLoadDetectPipe(xf86OutputPtr output, int dpms_mode);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 6ec1a48..d7ee615 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -311,7 +311,6 @@ typedef enum {
OPTION_LVDS24BITMODE,
OPTION_FBC,
OPTION_TILING,
- OPTION_LEGACY3D,
OPTION_LVDSFIXEDMODE,
OPTION_FORCEENABLEPIPEA,
#ifdef INTEL_XVMC
@@ -332,9 +331,6 @@ static OptionInfoRec I830Options[] = {
{OPTION_LVDS24BITMODE, "LVDS24Bit", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_FBC, "FramebufferCompression", OPTV_BOOLEAN, {0}, TRUE},
{OPTION_TILING, "Tiling", OPTV_BOOLEAN, {0}, TRUE},
-#ifdef XF86DRI
- {OPTION_LEGACY3D, "Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
-#endif
{OPTION_LVDSFIXEDMODE, "LVDSFixedMode", OPTV_BOOLEAN, {0}, FALSE},
{OPTION_FORCEENABLEPIPEA, "ForceEnablePipeA", OPTV_BOOLEAN, {0}, FALSE},
#ifdef INTEL_XVMC
@@ -827,22 +823,40 @@ i830_update_front_offset(ScrnInfoPtr pScrn)
ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
int pitch = pScrn->displayWidth * pI830->cpp;
+ pointer data = NULL;
/* Update buffer locations, which may have changed as a result of
* i830_bind_all_memory().
*/
pScrn->fbOffset = pI830->front_buffer->offset;
+ if (pI830->starting || pI830->accel == ACCEL_UXA)
+ return;
+
/* If we are still in ScreenInit, there is no screen pixmap to be updated
* yet. We'll fix it up at CreateScreenResources.
*/
- if (!pI830->starting && pI830->accel != ACCEL_UXA) {
- if (!pScreen->ModifyPixmapHeader(pScreen->GetScreenPixmap(pScreen),
+ if (!pI830->memory_manager) {
+ data = pI830->FbBase + pScrn->fbOffset; /* default to legacy */
+ } else {
+ dri_bo *bo = pI830->front_buffer->bo;
+
+ if (bo) {
+ if (pI830->kernel_exec_fencing) {
+ if (drm_intel_gem_bo_map_gtt(bo))
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s: bo map failed\n",
+ __FUNCTION__);
+ } else {
+ /* Will already be pinned by bind_all_memory in this case */
+ drm_intel_gem_bo_start_gtt_access(bo, 1);
+ }
+ data = bo->virtual;
+ }
+ }
+ if (!pScreen->ModifyPixmapHeader(pScreen->GetScreenPixmap(pScreen),
pScrn->virtualX, pScrn->virtualY, -1, -1,
- pitch, (pointer)(pI830->FbBase +
- pScrn->fbOffset)))
+ pitch, data))
FatalError("Couldn't adjust screen pixmap\n");
- }
}
/**
@@ -1707,12 +1721,8 @@ I830DrmModeInit(ScrnInfoPtr pScrn)
pI830->accel = ACCEL_UXA;
if ((s = (char *)xf86GetOptValString(pI830->Options, OPTION_ACCELMETHOD))) {
- if (!xf86NameCmp(s, "EXA"))
- pI830->accel = ACCEL_EXA;
- else if (!xf86NameCmp(s, "UXA"))
- pI830->accel = ACCEL_UXA;
- else
- pI830->accel = ACCEL_UXA;
+ if (xf86NameCmp(s, "UXA"))
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "kernel mode setting active,overridding accelmethod and using UXA\n");
}
pI830->can_resize = FALSE;
@@ -2283,7 +2293,7 @@ RestoreHWState(ScrnInfoPtr pScrn)
/* Disable pipes */
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
- crtc->funcs->dpms(crtc, DPMSModeOff);
+ i830_crtc_disable(crtc, TRUE);
}
i830WaitForVblank(pScrn);
@@ -3019,11 +3029,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
*/
if (!pI830->can_resize && pI830->directRenderingType == DRI_NONE && I830DRIScreenInit(pScreen))
pI830->directRenderingType = DRI_XF86DRI;
-
- if (pI830->directRenderingType == DRI_XF86DRI) {
- pI830->allocate_classic_textures =
- xf86ReturnOptValBool(pI830->Options, OPTION_LEGACY3D, TRUE);
- }
#endif
/* Enable tiling by default */
@@ -3473,8 +3478,9 @@ static Bool
I830EnterVT(int scrnIndex, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
I830Ptr pI830 = I830PTR(pScrn);
- int ret;
+ int i, ret;
DPRINTF(PFX, "Enter VT\n");
@@ -3495,6 +3501,23 @@ I830EnterVT(int scrnIndex, int flags)
SaveHWState(pScrn);
}
+ /* Get the hardware into a known state if needed */
+ if (!pI830->use_drm_mode) {
+ /* Disable outputs */
+ for (i = 0; i < xf86_config->num_output; i++) {
+ xf86OutputPtr output = xf86_config->output[i];
+ output->funcs->dpms(output, DPMSModeOff);
+ }
+ i830WaitForVblank(pScrn);
+
+ /* Disable pipes */
+ for (i = 0; i < xf86_config->num_crtc; i++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[i];
+ i830_crtc_disable(crtc, TRUE);
+ }
+ i830WaitForVblank(pScrn);
+ }
+
pI830->leaving = FALSE;
if (!pI830->use_drm_mode)
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 0a22486..fc4e66c 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -37,6 +37,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i810_reg.h"
#include "i915_drm.h"
#include <string.h>
+#include <sys/mman.h>
#define ALWAYS_SYNC 0
#define ALWAYS_FLUSH 0
@@ -837,8 +838,6 @@ i830_uxa_set_pixmap_bo (PixmapPtr pixmap, dri_bo *bo)
static Bool
i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
{
- ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
dri_bo *bo = i830_get_pixmap_bo (pixmap);
if (bo) {
@@ -853,16 +852,27 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
i830->need_sync = FALSE;
}
- if (pScrn->vtSema && !pI830->use_drm_mode && pI830->memory_manager) {
- if (drm_intel_bo_pin(bo, 4096) != 0)
- return FALSE;
- drm_intel_gem_bo_start_gtt_access(bo, access == UXA_ACCESS_RW);
- pixmap->devPrivate.ptr = pI830->FbBase + bo->offset;
- } else {
+ /* No VT sema or GEM? No GTT mapping. */
+ if (!scrn->vtSema || !i830->memory_manager) {
if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0)
return FALSE;
pixmap->devPrivate.ptr = bo->virtual;
+ return TRUE;
+ }
+
+ /* Kernel manages fences at GTT map/fault time */
+ if (i830->kernel_exec_fencing) {
+ if (drm_intel_gem_bo_map_gtt(bo)) {
+ xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s: bo map failed\n",
+ __FUNCTION__);
+ return FALSE;
+ }
+ } else { /* or not... */
+ if (drm_intel_bo_pin(bo, 4096) != 0)
+ return FALSE;
+ drm_intel_gem_bo_start_gtt_access(bo, access == UXA_ACCESS_RW);
}
+ pixmap->devPrivate.ptr = bo->virtual;
}
return TRUE;
}
@@ -870,8 +880,6 @@ i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
static void
i830_uxa_finish_access (PixmapPtr pixmap)
{
- ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
- I830Ptr pI830 = I830PTR(pScrn);
dri_bo *bo = i830_get_pixmap_bo (pixmap);
if (bo) {
@@ -879,14 +887,20 @@ i830_uxa_finish_access (PixmapPtr pixmap)
ScrnInfoPtr scrn = xf86Screens[screen->myNum];
I830Ptr i830 = I830PTR(scrn);
- if (pScrn->vtSema && !pI830->use_drm_mode && pI830->memory_manager)
- drm_intel_bo_unpin(bo);
- else
+ if (bo == i830->front_buffer->bo)
+ i830->need_flush = TRUE;
+
+ if (!scrn->vtSema || !i830->memory_manager) {
dri_bo_unmap(bo);
+ pixmap->devPrivate.ptr = NULL;
+ return;
+ }
+ if (i830->kernel_exec_fencing)
+ drm_intel_gem_bo_unmap_gtt(bo);
+ else
+ drm_intel_bo_unpin(bo);
pixmap->devPrivate.ptr = NULL;
- if (bo == i830->front_buffer->bo)
- i830->need_flush = TRUE;
}
}
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 7569e99..7fc0bce 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -881,6 +881,13 @@ i830_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode,
static xf86OutputStatus
i830_lvds_detect(xf86OutputPtr output)
{
+ /* Fallback to origin, mark LVDS always connected.
+ * From wider tests, we have seen both broken cases with
+ * ACPI lid and SWF bit. So disable them for now until we
+ * get a reliable way for LVDS detect.
+ */
+ return XF86OutputStatusConnected;
+
enum lid_status lid;
lid = i830_lvds_acpi_lid_open(output);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 361fff7..e3314c5 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -253,7 +253,8 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
mem->bound = TRUE;
}
- if (mem->tiling != TILE_NONE && !pI830->use_drm_mode) {
+ if (mem->tiling != TILE_NONE && !pI830->use_drm_mode &&
+ !pI830->kernel_exec_fencing) {
mem->fence_nr = i830_set_tiling(pScrn, mem->offset, mem->pitch,
mem->allocated_size, mem->tiling);
}
@@ -269,7 +270,8 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem)
if (mem == NULL || !mem->bound)
return TRUE;
- if (mem->tiling != TILE_NONE && !pI830->use_drm_mode)
+ if (mem->tiling != TILE_NONE && !pI830->use_drm_mode &&
+ !pI830->kernel_exec_fencing)
i830_clear_tiling(pScrn, mem->fence_nr);
#ifdef XF86DRI
@@ -504,9 +506,6 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
mmsize -= ROUND_TO_PAGE(3 * pScrn->displayWidth * pI830->cpp *
pScrn->virtualY);
}
- /* Classic textures are fixed. */
- if (pI830->allocate_classic_textures)
- mmsize -= MB(32);
/* Overlay and cursors, if physical, need to be allocated outside
* of the kernel memory manager.
*/
@@ -535,12 +534,8 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
int ret;
sp.param = I915_SETPARAM_NUM_USED_FENCES;
- if (pI830->use_drm_mode)
- sp.value = 0; /* kernel gets them all */
- else if (pI830->directRenderingType == DRI_XF86DRI)
- sp.value = 3; /* front/back/depth */
- else
- sp.value = 2; /* just front for DRI2 (both old & new though) */
+ sp.value = 0; /* kernel gets them all */
+
ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM, &sp,
sizeof(sp));
if (ret == 0)
@@ -566,6 +561,8 @@ i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset, unsigned long size)
i830_free_memory(pScrn, pI830->memory_manager);
pI830->memory_manager = NULL;
}
+ } else {
+ pI830->allocate_classic_textures = TRUE;
}
#endif /* XF86DRI */
@@ -961,8 +958,6 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
}
}
- mem->tiling = TILE_NONE;
-
return mem;
}
@@ -1445,7 +1440,7 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
if (pI830->memory_manager == NULL) {
pI830->fake_bufmgr_mem = i830_allocate_memory(pScrn, "fake bufmgr",
- MB(1), PITCH_NONE, GTT_PAGE_SIZE, 0,
+ MB(8), PITCH_NONE, GTT_PAGE_SIZE, 0,
TILE_NONE);
if (pI830->fake_bufmgr_mem == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 1f2578e..254b866 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -1039,8 +1039,13 @@ i830_sdvo_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
ErrorF("input modeline:\n");
xf86PrintModeline(0, adjusted_mode);
+
+ /* adjust origin mode's clock for current input,
+ for correct pixel mulitiplier setting. */
+ mode->Clock = adjusted_mode->Clock;
+
/* Clock range is required to be in 100-200Mhz */
- adjusted_mode->Clock *= i830_sdvo_get_pixel_multiplier(adjusted_mode);
+ adjusted_mode->Clock *= i830_sdvo_get_pixel_multiplier(mode);
} else {
return FALSE;
}
@@ -1385,7 +1390,9 @@ i830_sdvo_ddc_i2c_start(I2CBusPtr b, int timeout)
xf86OutputPtr output = b->DriverPrivate.ptr;
I830OutputPrivatePtr intel_output = output->driver_private;
I2CBusPtr i2cbus = intel_output->pI2CBus;
+ struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
+ i830_sdvo_set_control_bus_switch(output, dev_priv->ddc_bus);
return i2cbus->I2CStart(i2cbus, timeout);
}
@@ -1539,6 +1546,10 @@ i830_sdvo_output_setup (xf86OutputPtr output, uint16_t flag)
else
name_suffix = "-2";
+ /* clear up privates */
+ dev_priv->is_tv = FALSE;
+ intel_output->needs_tv_clock = FALSE;
+
if (flag & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
{
if (flag & SDVO_OUTPUT_TMDS0)
@@ -1709,11 +1720,9 @@ i830_sdvo_get_ddc_modes(xf86OutputPtr output)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
DisplayModePtr modes = NULL;
xf86OutputPtr crt;
- I830OutputPrivatePtr intel_output = output->driver_private;
+ I830OutputPrivatePtr intel_output;
xf86MonPtr edid_mon = NULL;
- struct i830_sdvo_priv *dev_priv = intel_output->dev_priv;
-
- i830_sdvo_set_control_bus_switch(output, dev_priv->ddc_bus);
+ struct i830_sdvo_priv *dev_priv;
modes = i830_ddc_get_modes(output);
if (modes != NULL)
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 1e3cf7b..8eb3e26 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -1079,7 +1079,7 @@ i830_tv_update_contrast(I830Ptr pI830, uint8_t contrast)
c = float_to_fix_2_6(con);
} else {
/* 2.6 floating point */
- con = 8.875 * ((float) contrast / 255);
+ con = 2.65625 * ((float) contrast / 255);
c = float_to_float_2_6(con);
}
val |= (c << TV_CONTRAST_SHIFT) & TV_CONTRAST_MASK;
@@ -1098,7 +1098,7 @@ i830_tv_update_saturation(I830Ptr pI830, uint8_t saturation)
sat = 3.0 * ((float) saturation / 255);
s = float_to_fix_2_6(sat);
} else {
- sat = 8.875 * ((float) saturation / 255);
+ sat = 2.65625 * ((float) saturation / 255);
s = float_to_float_2_6(sat);
}
val |= (s << TV_SATURATION_SHIFT) & TV_SATURATION_MASK;
@@ -1458,6 +1458,10 @@ i830_tv_detect(xf86OutputPtr output)
int dpms_mode;
int type = dev_priv->type;
+ /* If TV connector type set by user, always return connected */
+ if (dev_priv->force_type)
+ return XF86OutputStatusConnected;
+
mode = reported_modes[0];
xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
crtc = i830GetLoadDetectPipe (output, &mode, &dpms_mode);
@@ -1467,13 +1471,6 @@ i830_tv_detect(xf86OutputPtr output)
i830ReleaseLoadDetectPipe (output, dpms_mode);
}
- if (dev_priv->force_type) {
- if (type == TV_TYPE_NONE)
- return XF86OutputStatusDisconnected;
- else
- return XF86OutputStatusConnected;
- }
-
if (type != dev_priv->type)
{
dev_priv->type = type;
diff --git a/src/i830_video.c b/src/i830_video.c
index daa2411..3f3aaac 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -1048,11 +1048,14 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
i830_overlay_off(pScrn);
}
- if (!pPriv->textured)
- drm_intel_bo_unpin(pPriv->buf);
- drm_intel_bo_unreference(pPriv->buf);
- pPriv->buf = NULL;
- pPriv->videoStatus = 0;
+
+ if (pPriv->buf) {
+ if (!pPriv->textured)
+ drm_intel_bo_unpin(pPriv->buf);
+ drm_intel_bo_unreference(pPriv->buf);
+ pPriv->buf = NULL;
+ pPriv->videoStatus = 0;
+ }
} else {
if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
pPriv->videoStatus |= OFF_TIMER;
@@ -1382,7 +1385,7 @@ I830CopyPlanarData(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
dst_base = pPriv->buf->virtual;
} else {
drm_intel_gem_bo_start_gtt_access(pPriv->buf, TRUE);
- dst_base = pI830->FbBase + pPriv->buf->offset;
+ dst_base = pI830->FbBase;
}
if (pPriv->currentBuf == 0)
diff --git a/src/xvmc/Makefile.am b/src/xvmc/Makefile.am
index 9e62683..a376eb7 100644
--- a/src/xvmc/Makefile.am
+++ b/src/xvmc/Makefile.am
@@ -1,5 +1,6 @@
if XVMC
lib_LTLIBRARIES=libI810XvMC.la libIntelXvMC.la
+endif
libI810XvMC_la_SOURCES = I810XvMC.c \
I810XvMC.h
@@ -123,4 +124,3 @@ BUILT_SOURCES= $(INTEL_G4B)
clean-local:
-rm -f $(INTEL_G4B)
endif
-endif
diff --git a/uxa/uxa-glyphs.c b/uxa/uxa-glyphs.c
index 5abd001..3cb03f5 100644
--- a/uxa/uxa-glyphs.c
+++ b/uxa/uxa-glyphs.c
@@ -353,9 +353,7 @@ uxa_glyph_cache_hash_remove(uxa_glyph_cache_t *cache,
#define CACHE_Y(pos) (cache->yOffset + ((pos) / cache->columns) * cache->glyphHeight)
/* The most efficient thing to way to upload the glyph to the screen
- * is to use the UploadToScreen() driver hook; this allows us to
- * pipeline glyph uploads and to avoid creating offscreen pixmaps for
- * glyphs that we'll never use again.
+ * is to use CopyArea; uxa pixmaps are always offscreen.
*/
static Bool
uxa_glyph_cache_upload_glyph(ScreenPtr pScreen,
@@ -363,37 +361,23 @@ uxa_glyph_cache_upload_glyph(ScreenPtr pScreen,
int pos,
GlyphPtr pGlyph)
{
- uxa_screen_t *uxa_screen = uxa_get_screen(pScreen);
PicturePtr pGlyphPicture = GlyphPicture(pGlyph)[pScreen->myNum];
PixmapPtr pGlyphPixmap = (PixmapPtr)pGlyphPicture->pDrawable;
PixmapPtr pCachePixmap = (PixmapPtr)cache->picture->pDrawable;
- int cacheXoff, cacheYoff;
-
- if (!uxa_screen->info->put_image || uxa_screen->swappedOut)
- return FALSE;
-
- /* If the glyph pixmap is already uploaded, no point in doing
- * things this way */
- if (uxa_pixmap_is_offscreen(pGlyphPixmap))
- return FALSE;
+ GCPtr pGC;
/* UploadToScreen only works if bpp match */
if (pGlyphPixmap->drawable.bitsPerPixel != pCachePixmap->drawable.bitsPerPixel)
return FALSE;
- pCachePixmap = uxa_get_offscreen_pixmap ((DrawablePtr)pCachePixmap, &cacheXoff, &cacheYoff);
- if (!pCachePixmap)
- return FALSE;
-
- if (!uxa_screen->info->put_image(pCachePixmap,
- CACHE_X(pos) + cacheXoff,
- CACHE_Y(pos) + cacheYoff,
- pGlyph->info.width,
- pGlyph->info.height,
- (char *)pGlyphPixmap->devPrivate.ptr,
- pGlyphPixmap->devKind))
- return FALSE;
-
+ pGC = GetScratchGC(pCachePixmap->drawable.depth, pScreen);
+ ValidateGC(&pCachePixmap->drawable, pGC);
+ (void) uxa_copy_area (&pGlyphPixmap->drawable,
+ &pCachePixmap->drawable,
+ pGC,
+ 0, 0, pGlyph->info.width, pGlyph->info.height,
+ CACHE_X(pos), CACHE_Y(pos));
+ FreeScratchGC (pGC);
return TRUE;
}
Index: xorg-x11-drv-intel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-intel/devel/xorg-x11-drv-intel.spec,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- xorg-x11-drv-intel.spec 12 Mar 2009 22:53:18 -0000 1.10
+++ xorg-x11-drv-intel.spec 7 Apr 2009 13:41:32 -0000 1.11
@@ -8,7 +8,7 @@
Summary: Xorg X11 Intel video driver(s)
Name: xorg-x11-drv-intel
Version: 2.6.99.902
-Release: 1%{?dist}
+Release: 2%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -21,7 +21,7 @@
#Source1: xf86-video-intel-%{batchbuffer_version}.tar.bz2
Source2: intel.xinf
-Patch1: no-legacy3d.patch
+Patch1: rc1-to-2.7.patch
Patch2: kill-svideo.patch
Patch3: copy-fb.patch
Patch4: intel-2.6.99.902-kms-get-crtc.patch
@@ -32,7 +32,7 @@
BuildRequires: xorg-x11-server-devel >= 1.4.99.1
BuildRequires: libXvMC-devel
BuildRequires: mesa-libGL-devel >= 6.5-9
-BuildRequires: libdrm-devel >= 2.4.5
+BuildRequires: libdrm-devel >= 2.4.6
BuildRequires: kernel-headers
Requires: hwdata
@@ -59,7 +59,7 @@
%prep
%setup -q -n xf86-video-intel-%{version}
-%patch1 -p1 -b .no-legacy3d
+%patch1 -p1 -b .rc1-to-2.7
%patch2 -p1 -b .svideo
%patch3 -p1 -b .copy-fb
%patch4 -p1 -b .get-crtc
@@ -84,7 +84,6 @@
%files
%defattr(-,root,root,-)
-%{driverdir}/i810_drv.so
%{driverdir}/intel_drv.so
%{driverdir}/ch7xxx.so
%{driverdir}/sil164.so
@@ -102,6 +101,9 @@
%{_libdir}/libIntelXvMC.so
%changelog
+* Mon Apr 6 2009 Kristian Høgsberg <krh at redhat.com> - 2.6.99.902-2
+- Update to newer 2.7 snapshot, drop no-legacy3d.patch.
+
* Thu Mar 12 2009 Adam Jackson <ajax at redhat.com> 2.6.99.902-1
- intel-2.6.99.902-kms-get-crtc.patch: Add drmmode_get_crtc() so we
blink less on VT switches.
--- no-legacy3d.patch DELETED ---
- Previous message (by thread): rpms/wine/F-11 winepulse-0.24.patch, NONE, 1.1 .cvsignore, 1.71, 1.72 sources, 1.72, 1.73 wine.spec, 1.100, 1.101 winepulse-0.20.patch, 1.1, NONE
- Next message (by thread): rpms/kernel/devel config-generic, 1.273, 1.274 kernel.spec, 1.1502, 1.1503
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