rpms/kernel/devel drm-nouveau.patch, 1.10, 1.11 kernel.spec, 1.1347, 1.1348
Ben Skeggs
bskeggs at fedoraproject.org
Fri Feb 27 06:12:49 UTC 2009
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Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv23741
Modified Files:
drm-nouveau.patch kernel.spec
Log Message:
* Fri Feb 27 2009 Ben Skeggs <bskeggs at redhat.com>
- nouveau/kms: hopefully fix dac outputs
drm-nouveau.patch:
Index: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- drm-nouveau.patch 27 Feb 2009 05:23:02 -0000 1.10
+++ drm-nouveau.patch 27 Feb 2009 06:12:48 -0000 1.11
@@ -17525,10 +17525,10 @@
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
new file mode 100644
-index 0000000..f385e43
+index 0000000..48aa0ca
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
-@@ -0,0 +1,709 @@
+@@ -0,0 +1,726 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -17581,13 +17581,17 @@
+ if (blanked) {
+ crtc->cursor->hide(crtc);
+
-+ OUT_MODE(NV50_CRTC0_CLUT_MODE + offset, NV50_CRTC0_CLUT_MODE_BLANK);
++ OUT_MODE(NV50_CRTC0_CLUT_MODE + offset,
++ NV50_CRTC0_CLUT_MODE_BLANK);
+ OUT_MODE(NV50_CRTC0_CLUT_OFFSET + offset, 0);
+ if (dev_priv->chipset != 0x50)
-+ OUT_MODE(NV84_CRTC0_BLANK_UNK1 + offset, NV84_CRTC0_BLANK_UNK1_BLANK);
-+ OUT_MODE(NV50_CRTC0_BLANK_CTRL + offset, NV50_CRTC0_BLANK_CTRL_BLANK);
++ OUT_MODE(NV84_CRTC0_BLANK_UNK1 + offset,
++ NV84_CRTC0_BLANK_UNK1_BLANK);
++ OUT_MODE(NV50_CRTC0_BLANK_CTRL + offset,
++ NV50_CRTC0_BLANK_CTRL_BLANK);
+ if (dev_priv->chipset != 0x50)
-+ OUT_MODE(NV84_CRTC0_BLANK_UNK2 + offset, NV84_CRTC0_BLANK_UNK2_BLANK);
++ OUT_MODE(NV84_CRTC0_BLANK_UNK2 + offset,
++ NV84_CRTC0_BLANK_UNK2_BLANK);
+ } else {
+ struct nouveau_framebuffer *fb = to_nouveau_framebuffer(crtc->base.fb);
+ uint32_t v_lut = crtc->lut->bo->offset - dev_priv->vm_vram_base;
@@ -17595,19 +17599,22 @@
+ crtc->cursor->set_offset(crtc);
+
+ if (dev_priv->chipset != 0x50)
-+ OUT_MODE(NV84_CRTC0_BLANK_UNK2 + offset, NV84_CRTC0_BLANK_UNK2_UNBLANK);
++ OUT_MODE(NV84_CRTC0_BLANK_UNK2 + offset,
++ NV84_CRTC0_BLANK_UNK2_UNBLANK);
+
+ if (crtc->cursor->visible)
+ crtc->cursor->show(crtc);
+ else
+ crtc->cursor->hide(crtc);
+
-+ OUT_MODE(NV50_CRTC0_CLUT_MODE + offset,
-+ fb->base.depth == 8 ? NV50_CRTC0_CLUT_MODE_OFF : NV50_CRTC0_CLUT_MODE_ON);
++ OUT_MODE(NV50_CRTC0_CLUT_MODE + offset, fb->base.depth == 8 ?
++ NV50_CRTC0_CLUT_MODE_OFF : NV50_CRTC0_CLUT_MODE_ON);
+ OUT_MODE(NV50_CRTC0_CLUT_OFFSET + offset, v_lut >> 8);
+ if (dev_priv->chipset != 0x50)
-+ OUT_MODE(NV84_CRTC0_BLANK_UNK1 + offset, NV84_CRTC0_BLANK_UNK1_UNBLANK);
-+ OUT_MODE(NV50_CRTC0_BLANK_CTRL + offset, NV50_CRTC0_BLANK_CTRL_UNBLANK);
++ OUT_MODE(NV84_CRTC0_BLANK_UNK1 + offset,
++ NV84_CRTC0_BLANK_UNK1_UNBLANK);
++ OUT_MODE(NV50_CRTC0_BLANK_CTRL + offset,
++ NV50_CRTC0_BLANK_CTRL_UNBLANK);
+ }
+
+ return 0;
@@ -17620,8 +17627,8 @@
+
+ DRM_DEBUG("\n");
+
-+ OUT_MODE(NV50_CRTC0_DITHERING_CTRL + offset, crtc->use_dithering ?
-+ NV50_CRTC0_DITHERING_CTRL_ON : NV50_CRTC0_DITHERING_CTRL_OFF);
++ OUT_MODE(NV50_CRTC0_DITHERING_CTRL + offset, crtc->use_dithering ?
++ NV50_CRTC0_DITHERING_CTRL_ON : NV50_CRTC0_DITHERING_CTRL_OFF);
+
+ return 0;
+}
@@ -17749,7 +17756,9 @@
+ DRM_DEBUG("\n");
+
+ /* These are in the g80 bios tables, at least in mine. */
-+ if (!get_pll_limits(crtc->base.dev, NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1(crtc->index), &limits))
++ if (!get_pll_limits(crtc->base.dev,
++ NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1(crtc->index),
++ &limits))
+ return -EINVAL;
+
+ minvco1 = limits.vco1.minfreq, maxvco1 = limits.vco1.maxfreq;
@@ -17764,8 +17773,8 @@
+ fixedgain2 = (minM2 == maxM2 && minN2 == maxN2);
+
+ vco2 = (maxvco2 - maxvco2/200) / 2;
-+ for (log2P = 0; clk && log2P < 6 && clk <= (vco2 >> log2P); log2P++) /* log2P is maximum of 6 */
-+ ;
++ /* log2P is maximum of 6 */
++ for (log2P = 0; clk && log2P < 6 && clk <= (vco2 >> log2P); log2P++);
+ clkP = clk << log2P;
+
+ if (maxvco2 < clk + clk/200) /* +0.5% */
@@ -17808,8 +17817,8 @@
+
+ calcclkout = calcclk2 >> log2P;
+ delta = abs(calcclkout - clk);
-+ /* we do an exhaustive search rather than terminating
-+ * on an optimality condition...
++ /* we do an exhaustive search rather than
++ * terminating on an optimality condition...
+ */
+ if (delta < bestdelta) {
+ bestdelta = delta;
@@ -18034,15 +18043,21 @@
+ }
+
+ OUT_MODE(NV50_CRTC0_CLOCK + offset, mode->clock | 0x800000);
-+ OUT_MODE(NV50_CRTC0_INTERLACE + offset, (mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 0);
++ OUT_MODE(NV50_CRTC0_INTERLACE + offset,
++ (mode->flags & DRM_MODE_FLAG_INTERLACE) ? 2 : 0);
+ OUT_MODE(NV50_CRTC0_DISPLAY_START + offset, 0);
+ OUT_MODE(NV50_CRTC0_UNK82C + offset, 0);
-+ OUT_MODE(NV50_CRTC0_DISPLAY_TOTAL + offset, mode->vtotal << 16 | mode->htotal);
-+ OUT_MODE(NV50_CRTC0_SYNC_DURATION + offset, (vsync_dur - 1) << 16 | (hsync_dur - 1));
-+ OUT_MODE(NV50_CRTC0_SYNC_START_TO_BLANK_END + offset, (vsync_start_to_end - 1) << 16 | (hsync_start_to_end - 1));
-+ OUT_MODE(NV50_CRTC0_MODE_UNK1 + offset, (vunk1 - 1) << 16 | (hunk1 - 1));
++ OUT_MODE(NV50_CRTC0_DISPLAY_TOTAL + offset,
++ mode->vtotal << 16 | mode->htotal);
++ OUT_MODE(NV50_CRTC0_SYNC_DURATION + offset,
++ (vsync_dur - 1) << 16 | (hsync_dur - 1));
++ OUT_MODE(NV50_CRTC0_SYNC_START_TO_BLANK_END + offset,
++ (vsync_start_to_end - 1) << 16 | (hsync_start_to_end - 1));
++ OUT_MODE(NV50_CRTC0_MODE_UNK1 + offset,
++ (vunk1 - 1) << 16 | (hunk1 - 1));
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
-+ OUT_MODE(NV50_CRTC0_MODE_UNK2 + offset, (vunk2b - 1) << 16 | (vunk2a - 1));
++ OUT_MODE(NV50_CRTC0_MODE_UNK2 + offset,
++ (vunk2b - 1) << 16 | (vunk2a - 1));
+ }
+
+ crtc->set_dither(crtc);
@@ -18163,7 +18178,8 @@
+ OUT_MODE(NV50_CRTC0_FB_OFFSET + offset, v_vram >> 8);
+ OUT_MODE(0x864 + offset, 0);
+
-+ OUT_MODE(NV50_CRTC0_FB_SIZE + offset, drm_fb->height << 16 | drm_fb->width);
++ OUT_MODE(NV50_CRTC0_FB_SIZE + offset,
++ drm_fb->height << 16 | drm_fb->width);
+
+ /* I suspect this flag indicates a linear fb. */
+ OUT_MODE(NV50_CRTC0_FB_PITCH + offset, drm_fb->pitch | 0x100000);
@@ -18183,7 +18199,8 @@
+ break;
+ }
+
-+ OUT_MODE(NV50_CRTC0_COLOR_CTRL + offset, NV50_CRTC_COLOR_CTRL_MODE_COLOR);
++ OUT_MODE(NV50_CRTC0_COLOR_CTRL + offset,
++ NV50_CRTC_COLOR_CTRL_MODE_COLOR);
+ OUT_MODE(NV50_CRTC0_FB_POS + offset, (y << 16) | x);
+
+ OUT_MODE(NV50_UPDATE_DISPLAY, 0);
@@ -18498,10 +18515,10 @@
+#endif /* __NV50_CURSOR_H__ */
diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
new file mode 100644
-index 0000000..408fda6
+index 0000000..98c378f
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_dac.c
-@@ -0,0 +1,284 @@
+@@ -0,0 +1,280 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -18550,43 +18567,6 @@
+}
+
+static int
-+nv50_dac_execute_mode(struct nouveau_encoder *encoder,
-+ struct drm_display_mode *mode)
-+{
-+ struct drm_encoder *drm_encoder = &encoder->base;
-+ struct drm_device *dev = drm_encoder->dev;
-+ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
-+ uint32_t offset = encoder->or * 0x80;
-+ uint32_t mode_ctl = NV50_DAC_MODE_CTRL_OFF;
-+ uint32_t mode_ctl2 = 0;
-+
-+ DRM_DEBUG("or %d\n", encoder->or);
-+
-+ if (crtc->index == 1)
-+ mode_ctl |= NV50_DAC_MODE_CTRL_CRTC1;
-+ else
-+ mode_ctl |= NV50_DAC_MODE_CTRL_CRTC0;
-+
-+ /* Lacking a working tv-out, this is not a 100% sure. */
-+ if (encoder->base.encoder_type == DRM_MODE_ENCODER_DAC) {
-+ mode_ctl |= 0x40;
-+ } else
-+ if (encoder->base.encoder_type == DRM_MODE_ENCODER_TVDAC) {
-+ mode_ctl |= 0x100;
-+ }
-+
-+ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
-+ mode_ctl2 |= NV50_DAC_MODE_CTRL2_NHSYNC;
-+
-+ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
-+ mode_ctl2 |= NV50_DAC_MODE_CTRL2_NVSYNC;
-+
-+ OUT_MODE(NV50_DAC0_MODE_CTRL + offset, mode_ctl);
-+ OUT_MODE(NV50_DAC0_MODE_CTRL2 + offset, mode_ctl2);
-+ return 0;
-+}
-+
-+static int
+nv50_dac_set_clock_mode(struct nouveau_encoder *encoder,
+ struct drm_display_mode *mode)
+{
@@ -18612,7 +18592,8 @@
+ nv_wr32(NV50_PDISPLAY_DAC_REGS_CLK_CTRL1(or), 0x00000001);
+ dpms_state = nv_rd32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or));
+
-+ nv_wr32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or), 0x00150000 | NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING);
++ nv_wr32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or),
++ 0x00150000 | NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING);
+ if (!nv_wait(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or),
+ NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING, 0)) {
+ DRM_ERROR("timeout: DAC_DPMS_CTRL_PENDING(%d) == 0\n", or);
@@ -18624,20 +18605,23 @@
+ /* Use bios provided value if possible. */
+ if (dev_priv->bios.dactestval) {
+ load_pattern = dev_priv->bios.dactestval;
-+ DRM_DEBUG("Using bios provided load_pattern of %d\n", load_pattern);
++ DRM_DEBUG("Using bios provided load_pattern of %d\n",
++ load_pattern);
+ } else {
+ load_pattern = 340;
+ DRM_DEBUG("Using default load_pattern of %d\n", load_pattern);
+ }
+
-+ nv_wr32(NV50_PDISPLAY_DAC_REGS_LOAD_CTRL(or), NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_ACTIVE | load_pattern);
++ nv_wr32(NV50_PDISPLAY_DAC_REGS_LOAD_CTRL(or),
++ NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_ACTIVE | load_pattern);
+ udelay(10000); /* give it some time to process */
+ load_state = nv_rd32(NV50_PDISPLAY_DAC_REGS_LOAD_CTRL(or));
+
+ nv_wr32(NV50_PDISPLAY_DAC_REGS_LOAD_CTRL(or), 0);
+ nv_wr32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or), dpms_state);
+
-+ if ((load_state & NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_PRESENT) == NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_PRESENT)
++ if ((load_state & NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_PRESENT) ==
++ NV50_PDISPLAY_DAC_REGS_LOAD_CTRL_PRESENT)
+ status = connector_status_connected;
+
+ if (status == connector_status_connected)
@@ -18688,7 +18672,8 @@
+ break;
+ }
+
-+ nv_wr32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or), val | NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING);
++ nv_wr32(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or),
++ val | NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING);
+}
+
+static void nv50_dac_save(struct drm_encoder *drm_encoder)
@@ -18726,8 +18711,36 @@
+ struct drm_display_mode *adjusted_mode)
+{
+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct drm_device *dev = drm_encoder->dev;
++ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
++ uint32_t offset = encoder->or * 0x80;
++ uint32_t mode_ctl = NV50_DAC_MODE_CTRL_OFF;
++ uint32_t mode_ctl2 = 0;
+
-+ nv50_dac_execute_mode(encoder, adjusted_mode);
++ DRM_DEBUG("or %d\n", encoder->or);
++
++ if (crtc->index == 1)
++ mode_ctl |= NV50_DAC_MODE_CTRL_CRTC1;
++ else
++ mode_ctl |= NV50_DAC_MODE_CTRL_CRTC0;
++
++ /* Lacking a working tv-out, this is not a 100% sure. */
++ if (encoder->base.encoder_type == DRM_MODE_ENCODER_DAC) {
++ mode_ctl |= 0x40;
++ } else
++ if (encoder->base.encoder_type == DRM_MODE_ENCODER_TVDAC) {
++ mode_ctl |= 0x100;
++ }
++
++ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
++ mode_ctl2 |= NV50_DAC_MODE_CTRL2_NHSYNC;
++
++ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
++ mode_ctl2 |= NV50_DAC_MODE_CTRL2_NVSYNC;
++
++ OUT_MODE(NV50_DAC0_MODE_CTRL + offset, mode_ctl);
++ OUT_MODE(NV50_DAC0_MODE_CTRL2 + offset, mode_ctl2);
++ OUT_MODE(NV50_UPDATE_DISPLAY, 0);
+}
+
+static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
@@ -42469,10 +42482,10 @@
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
new file mode 100644
-index 0000000..c59fb48
+index 0000000..179ca1a
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
-@@ -0,0 +1,283 @@
+@@ -0,0 +1,272 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -42523,43 +42536,6 @@
+}
+
+static int
-+nv50_sor_execute_mode(struct nouveau_encoder *encoder,
-+ struct drm_display_mode *mode)
-+{
-+ struct drm_encoder *drm_encoder = &encoder->base;
-+ struct drm_device *dev = drm_encoder->dev;
-+ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
-+ uint32_t offset = encoder->or * 0x40;
-+ uint32_t mode_ctl = NV50_SOR_MODE_CTRL_OFF;
-+
-+ DRM_DEBUG("or %d\n", encoder->or);
-+
-+ if (encoder->base.encoder_type == DRM_MODE_ENCODER_LVDS) {
-+ mode_ctl |= NV50_SOR_MODE_CTRL_LVDS;
-+ } else {
-+ mode_ctl |= NV50_SOR_MODE_CTRL_TMDS;
-+ if (mode->clock > 165000)
-+ mode_ctl |= NV50_SOR_MODE_CTRL_TMDS_DUAL_LINK;
-+ }
-+
-+ if (crtc->index == 1)
-+ mode_ctl |= NV50_SOR_MODE_CTRL_CRTC1;
-+ else
-+ mode_ctl |= NV50_SOR_MODE_CTRL_CRTC0;
-+
-+ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
-+ mode_ctl |= NV50_SOR_MODE_CTRL_NHSYNC;
-+
-+ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
-+ mode_ctl |= NV50_SOR_MODE_CTRL_NVSYNC;
-+
-+ OUT_MODE(NV50_SOR0_MODE_CTRL + offset, mode_ctl);
-+ OUT_MODE(NV50_UPDATE_DISPLAY, 0);
-+
-+ return 0;
-+}
-+
-+static int
+nv50_sor_set_clock_mode(struct nouveau_encoder *encoder,
+ struct drm_display_mode *mode)
+{
@@ -42673,8 +42649,34 @@
+ struct drm_display_mode *adjusted_mode)
+{
+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct drm_device *dev = drm_encoder->dev;
++ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
++ uint32_t offset = encoder->or * 0x40;
++ uint32_t mode_ctl = NV50_SOR_MODE_CTRL_OFF;
+
-+ nv50_sor_execute_mode(encoder, adjusted_mode);
++ DRM_DEBUG("or %d\n", encoder->or);
++
++ if (encoder->base.encoder_type == DRM_MODE_ENCODER_LVDS) {
++ mode_ctl |= NV50_SOR_MODE_CTRL_LVDS;
++ } else {
++ mode_ctl |= NV50_SOR_MODE_CTRL_TMDS;
++ if (mode->clock > 165000)
++ mode_ctl |= NV50_SOR_MODE_CTRL_TMDS_DUAL_LINK;
++ }
++
++ if (crtc->index == 1)
++ mode_ctl |= NV50_SOR_MODE_CTRL_CRTC1;
++ else
++ mode_ctl |= NV50_SOR_MODE_CTRL_CRTC0;
++
++ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
++ mode_ctl |= NV50_SOR_MODE_CTRL_NHSYNC;
++
++ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
++ mode_ctl |= NV50_SOR_MODE_CTRL_NVSYNC;
++
++ OUT_MODE(NV50_SOR0_MODE_CTRL + offset, mode_ctl);
++ OUT_MODE(NV50_UPDATE_DISPLAY, 0);
+}
+
+static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1347
retrieving revision 1.1348
diff -u -r1.1347 -r1.1348
--- kernel.spec 27 Feb 2009 05:42:11 -0000 1.1347
+++ kernel.spec 27 Feb 2009 06:12:48 -0000 1.1348
@@ -1788,6 +1788,9 @@
# and build.
%changelog
+* Fri Feb 27 2009 Ben Skeggs <bskeggs at redhat.com>
+- nouveau/kms: hopefully fix dac outputs
+
* Fri Feb 27 2009 Dave Airlie <airlied at redhat.com>
- radeon: disable r600 kms by default - we want accel to work
- Previous message (by thread): rpms/kernel/F-10 patch-2.6.29-rc6-git4.bz2.sign, NONE, 1.1 .cvsignore, 1.991, 1.992 kernel.spec, 1.1278, 1.1279 sources, 1.952, 1.953 upstream, 1.863, 1.864 patch-2.6.29-rc6-git3.bz2.sign, 1.1, NONE
- Next message (by thread): rpms/perl-Class-Autouse/F-9 Class-Autouse-1.29.diff, NONE, 1.1 perl-Class-Autouse.spec, 1.13, 1.14
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