rpms/kernel/devel drm-nouveau.patch, 1.34, 1.35 kernel.spec, 1.1628, 1.1629

[Ben Skeggs]

Author: bskeggs

Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv9351

Modified Files:
	drm-nouveau.patch kernel.spec 
Log Message:
* Mon Jul 13 2009 Ben Skeggs <bskeggs at redhat.com>
- drm-nouveau.patch: update from upstream



drm-nouveau.patch:

View full diff with command:
/usr/bin/cvs -f diff  -kk -u -p -N -r 1.34 -r 1.35 drm-nouveau.patch
Index: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.34
retrieving revision 1.35
diff -u -p -r1.34 -r1.35
--- drm-nouveau.patch	30 Jun 2009 03:47:25 -0000	1.34
+++ drm-nouveau.patch	13 Jul 2009 06:42:41 -0000	1.35
@@ -94,7 +94,7 @@ index 6246e3f..436e2fe 100644
  		if (map->type == _DRM_REGISTERS)
 diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
 new file mode 100644
-index 0000000..96688cf
+index 0000000..f5d93b5
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/Makefile
 @@ -0,0 +1,26 @@
@@ -105,7 +105,7 @@ index 0000000..96688cf
 +ccflags-y := -Iinclude/drm
 +nouveau-y := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
 +             nouveau_object.o nouveau_irq.o nouveau_notifier.o \
-+             nouveau_swmthd.o nouveau_sgdma.o nouveau_dma.o \
++             nouveau_sgdma.o nouveau_dma.o \
 +             nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
 +             nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
 +	     nouveau_display.o nouveau_fbcon.o nouveau_backlight.o \
@@ -286,10 +286,10 @@ index 0000000..395639b
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
 new file mode 100644
-index 0000000..f6628db
+index 0000000..f719eb4
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -0,0 +1,4852 @@
+@@ -0,0 +1,4861 @@
 +/*
 + * Copyright 2005-2006 Erik Waling
 + * Copyright 2006 Stephane Marchesin
@@ -341,10 +341,10 @@ index 0000000..f6628db
 +/* this will need remembering across a suspend */
 +static uint32_t saved_nv_pfb_cfg0;
 +
-+typedef struct {
++struct init_exec {
 +	bool execute;
 +	bool repeat;
-+} init_exec_t;
++};
 +
 +static bool nv_cksum(const uint8_t *data, unsigned int length)
 +{
@@ -531,22 +531,22 @@ index 0000000..f6628db
 +	return false;
 +}
 +
-+typedef struct {
++struct init_tbl_entry {
 +	char* name;
 +	uint8_t id;
 +	int length;
 +	int length_offset;
 +	int length_multiplier;
-+	bool (*handler)(struct drm_device *dev, struct nvbios *, uint16_t, init_exec_t *);
-+} init_tbl_entry_t;
++	bool (*handler)(struct drm_device *dev, struct nvbios *, uint16_t, struct init_exec *);
++};
 +
-+typedef struct {
++struct bit_entry {
 +	uint8_t id[2];
 +	uint16_t length;
 +	uint16_t offset;
-+} bit_entry_t;
++};
 +
-+static int parse_init_table(struct drm_device *dev, struct nvbios *bios, unsigned int offset, init_exec_t *iexec);
++static int parse_init_table(struct drm_device *dev, struct nvbios *bios, unsigned int offset, struct init_exec *iexec);
 +
 +#define MACRO_INDEX_SIZE	2
 +#define MACRO_SIZE		8
@@ -581,68 +581,22 @@ index 0000000..f6628db
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +
 +	/* C51 has misaligned regs on purpose. Marvellous */
-+	if (reg & 0x2 || (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51)) {
-+		NV_ERROR(dev, "========== misaligned reg 0x%08X ==========\n",
-+			 reg);
-+		return 0;
-+	}
-+	/* warn on C51 regs that haven't been verified accessible in mmiotracing */
++	if (reg & 0x2 ||
++	    (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51))
++		NV_ERROR(dev, "======= misaligned reg 0x%08X =======\n", reg);
++
++	/* warn on C51 regs that haven't been verified accessible in tracing */
 +	if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 &&
 +	    reg != 0x130d && reg != 0x1311 && reg != 0x60081d)
 +		NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n",
 +			reg);
 +
-+	#define WITHIN(x,y,z) ((x>=y)&&(x<=y+z))
-+	if (WITHIN(reg,NV_PMC_OFFSET,NV_PMC_SIZE))
-+		return 1;
-+	if (WITHIN(reg,NV_PBUS_OFFSET,NV_PBUS_SIZE))
-+		return 1;
-+	if (WITHIN(reg,NV_PFIFO_OFFSET,NV_PFIFO_SIZE))
-+		return 1;
-+	/* maybe a little large, but it will do for the moment. */
-+	if (nv_arch(dev) >= NV_50 && WITHIN(reg, 0x1000, 0xEFFF))
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version >= 0x30 && WITHIN(reg,0x4000,0x600))
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version >= 0x40 && WITHIN(reg,0xc000,0x48))
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0000d204)
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version >= 0x40) {
-+		if (reg == 0x00011014 || reg == 0x00020328)
-+			return 1;
-+		if (WITHIN(reg,0x88000,NV_PBUS_SIZE)) /* new PBUS */
-+			return 1;
-+	}
-+	if (nv_arch(dev) >= NV_50) {
-+		/* No clue what they do, but because they are outside normal
-+		 * ranges we'd better list them seperately. */
-+		if (reg == 0x00020018 || reg == 0x0002004C ||
-+		    reg == 0x00020060 || reg == 0x00021218 ||
-+		    reg == 0x0002130C || reg == 0x00089008 ||
-+		    reg == 0x00089028)
-+			return 1;
++	if (reg >= (8*1024*1024)) {
++		NV_ERROR(dev, "=== reg 0x%08x out of mapped bounds ===\n", reg);
++		return 0;
 +	}
-+	if (WITHIN(reg,NV_PFB_OFFSET,NV_PFB_SIZE))
-+		return 1;
-+	if (WITHIN(reg,NV_PEXTDEV_OFFSET,NV_PEXTDEV_SIZE))
-+		return 1;
-+	if (WITHIN(reg,NV_PCRTC0_OFFSET,NV_PCRTC0_SIZE * 2))
-+		return 1;
-+	if (nv_arch(dev) >= NV_50 &&
-+	    WITHIN(reg, NV50_DISPLAY_OFFSET, NV50_DISPLAY_SIZE))
-+		return 1;
-+	if (WITHIN(reg,NV_PRAMDAC0_OFFSET,NV_PRAMDAC0_SIZE * 2))
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0070fff0)
-+		return 1;
-+	if (dev_priv->VBIOS.pub.chip_version == 0x51 && WITHIN(reg,NV_PRAMIN_OFFSET,NV_PRAMIN_SIZE))
-+		return 1;
-+	#undef WITHIN
 +
-+	NV_ERROR(dev, "========== unknown reg 0x%08X ==========\n", reg);
-+
-+	return 0;
++	return 1;
 +}
 +
 +static bool valid_idx_port(struct drm_device *dev, uint16_t port)
@@ -992,7 +946,7 @@ index 0000000..f6628db
 +	}
 +}
 +
-+static bool init_io_restrict_prog(struct drm_device *dev, struct nvbios *bios, uint16_t offset, init_exec_t *iexec)
++static bool init_io_restrict_prog(struct drm_device *dev, struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
 +{
 +	/* INIT_IO_RESTRICT_PROG   opcode: 0x32 ('2')
 +	 *
@@ -1044,7 +998,7 @@ index 0000000..f6628db
 +	return true;
 +}
 +
-+static bool init_repeat(struct drm_device *dev, struct nvbios *bios, uint16_t offset, init_exec_t *iexec)
++static bool init_repeat(struct drm_device *dev, struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
 +{
 +	/* INIT_REPEAT   opcode: 0x33 ('3')
 +	 *
@@ -1078,7 +1032,7 @@ index 0000000..f6628db
 +	return true;
 +}
 +
-+static bool init_io_restrict_pll(struct drm_device *dev, struct nvbios *bios, uint16_t offset, init_exec_t *iexec)
++static bool init_io_restrict_pll(struct drm_device *dev, struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
 +{
 +	/* INIT_IO_RESTRICT_PLL   opcode: 0x34 ('4')
 +	 *
@@ -1142,7 +1096,7 @@ index 0000000..f6628db
 +	return true;
 +}
 +
-+static bool init_end_repeat(struct drm_device *dev, struct nvbios *bios, uint16_t offset, init_exec_t *iexec)
++static bool init_end_repeat(struct drm_device *dev, struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
 +{
 +	/* INIT_END_REPEAT   opcode: 0x36 ('6')
 +	 *
@@ -1162,7 +1116,7 @@ index 0000000..f6628db
 +	return true;
 +}
 +
-+static bool init_copy(struct drm_device *dev, struct nvbios *bios, uint16_t offset, init_exec_t *iexec)
[...4542 lines suppressed...]
++	0x00122503, 0x00162600, 0x00122607, 0x00112680, 0x00112700, 0x00112702,
++	0x00122780, 0x0011278b, 0x00112794, 0x0011279c, 0x0040d1e2, 0x00200298,
++	0x00600006, 0x00200044, 0x00102880, 0x001128c6, 0x001528c9, 0x001928d0,
++	0x00122900, 0x00122903, 0x00162a00, 0x00122a07, 0x00112a80, 0x00112b00,
++	0x00112b02, 0x00122b80, 0x00112b8b, 0x00112b94, 0x00112b9c, 0x0040eee3,
++	0x002002ff, 0x00600006, 0x00200044, 0x00102c80, 0x0040df0f, 0x0040df4b,
++	0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x0070008f, 0x0040df8c,
++	0x005000cb, 0x00000000, 0x00112cc6, 0x00152cc9, 0x00192cd0, 0x00122d00,
++	0x00122d03, 0x00162e00, 0x00122e07, 0x00112e80, 0x00112f00, 0x00112f02,
++	0x00122f80, 0x00112f8b, 0x00112f94, 0x00112f9c, 0x00000000, 0x0040f50f,
++	0x005000cb, 0x00217240, 0x00600007, 0x0020043f, 0x008800ff, 0x005000cb,
++	0x0040f887, 0x0060000a, 0x00000000, 0x00410700, 0x007000a0, 0x00700080,
++	0x00200380, 0x00600007, 0x00200004, 0x00c000ff, 0x008000ff, 0x005000cb,
++	0x00700000, 0x00200000, 0x00600006, 0x00111bfe, 0x0041294d, 0x00700000,
++	0x00200000, 0x00600006, 0x00111bfe, 0x00700080, 0x0070001d, 0x0040114d,
++	0x00700081, 0x00600004, 0x0050004a, 0x00411388, 0x0060000b, 0x00200000,
++	0x00600006, 0x00700000, 0x0041290b, 0x00111bfd, 0x0040424d, 0x00202dd2,
++	0x008000fd, 0x005000cb, 0x00c00002, 0x00200380, 0x00600007, 0x00200160,
++	0x00800002, 0x005000cb, 0x00c01802, 0x00202c72, 0x00800002, 0x005000cb,
++	0x00404e4d, 0x0060000b, 0x0041274d, 0x00700001, 0x00700003, 0x00412d06,
++	0x00412e05, 0x0060000d, 0x00700005, 0x0070000d, 0x00700006, 0x0070000b,
++	0x0070000e, 0x0070001c, 0x0060000c, ~0
++};
++
++static unsigned nv94_ctxvals[] = {
++	0x0043, 0x00000000,
++	0x0001, 0x00000030,
++	0x0008, 0x00000000,
++	0x0001, 0x00000002,
++	0x0028, 0x00000000,
++	0x0001, 0x00000003,
++	0x0001, 0x00001000,
++	0x000f, 0x00000000,
++	0x0001, 0x0000fe0c,
++	0x0004, 0x00000000,
++	0x0001, 0x00001000,
++	0x000a, 0x00000000,
++	0x0001, 0x00000187,
++	0x0004, 0x00000000,
++	0x0001, 0x00001018,
++	0x0001, 0x000000ff,
++	0x000e, 0x00000000,
++	0x0001, 0x00000004,
++	0x0001, 0x044d00df,
++	0x0001, 0x00000000,
++	0x0001, 0x00000600,
++	0x0005, 0x00000000,
++	0x0001, 0x01000000,
++	0x0001, 0x000000ff,
++	0x0001, 0x00000000,
++	0x0001, 0x00000400,
++	0x0005, 0x00000000,
++	0x0001, 0x00000001,
++	0x0001, 0x00000080,
++	0x0001, 0x00000004,
++	0x0006, 0x00000000,
++	0x0001, 0x00000002,
++	0x0001, 0x00000001,
++	0x0003, 0x00000000,
++	0x0001, 0x00000001,
++	0x0001, 0x00000100,
++	0x0005, 0x00000000,
++	0x0001, 0x00000002,
++	0x0002, 0x00000001,
 +	0x0003, 0x00000000,
 +	0x0001, 0x00000001,
 +	0x0001, 0x003fffff,
@@ -51203,10 +52720,10 @@ index 0000000..ca23454
 +#endif
 diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
 new file mode 100644
-index 0000000..a89926e
+index 0000000..9b5f802
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
-@@ -0,0 +1,451 @@
+@@ -0,0 +1,445 @@
 +/*
 + * Copyright (C) 2007 Ben Skeggs.
 + *
@@ -51636,9 +53153,6 @@ index 0000000..a89926e
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
 +
-+	BUG_ON(dev_priv->ramin_map != NULL);
-+	dev_priv->ramin_map = dev_priv->ramin;
-+
 +	priv->last_access_wr = write;
 +}
 +
@@ -51648,9 +53162,6 @@ index 0000000..a89926e
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +	struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
 +
-+	BUG_ON(dev_priv->ramin_map == NULL);
-+	dev_priv->ramin_map = NULL;
-+
 +	if (priv->last_access_wr) {
 +		nv_wr32(0x070000, 0x00000001);
 +		if (!nv_wait(0x070000, 0x00000001, 0x00000000))
@@ -51706,10 +53217,10 @@ index 0000000..6572f12
 +}
 diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
 new file mode 100644
-index 0000000..8977aa3
+index 0000000..5429266
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_sor.c
-@@ -0,0 +1,310 @@
+@@ -0,0 +1,304 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -51745,7 +53256,6 @@ index 0000000..8977aa3
 +#include "nouveau_connector.h"
 +#include "nouveau_crtc.h"
 +#include "nv50_display.h"
-+#include "nv50_display_commands.h"
 +
 +extern int nouveau_duallink;
 +
@@ -51755,7 +53265,6 @@ index 0000000..8977aa3
 +	struct drm_device *dev = encoder->base.dev;
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +	struct nouveau_channel *evo = &dev_priv->evo.chan;
-+	uint32_t offset = encoder->or * 0x40;
 +	int ret;
 +
 +	NV_DEBUG(dev, "Disconnecting SOR %d\n", encoder->or);
@@ -51765,8 +53274,8 @@ index 0000000..8977aa3
 +		NV_ERROR(dev, "no space while disconnecting SOR\n");
 +		return;
 +	}
-+	BEGIN_RING(evo, 0, NV50_SOR0_MODE_CTRL + offset, 1);
-+	OUT_RING  (evo, NV50_SOR_MODE_CTRL_OFF);
++	BEGIN_RING(evo, 0, NV50_EVO_SOR(encoder->or, MODE_CTRL), 1);
++	OUT_RING  (evo, 0);
 +}
 +
 +static int
@@ -51895,8 +53404,7 @@ index 0000000..8977aa3
 +	struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
 +	struct drm_device *dev = drm_encoder->dev;
 +	struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
-+	uint32_t offset = encoder->or * 0x40;
-+	uint32_t mode_ctl = NV50_SOR_MODE_CTRL_OFF;
++	uint32_t mode_ctl = 0;
 +	int ret;
 +
 +	NV_DEBUG(dev, "or %d\n", encoder->or);
@@ -51906,31 +53414,29 @@ index 0000000..8977aa3
 +	nv50_sor_dpms(drm_encoder, DRM_MODE_DPMS_ON);
 +	dev_priv->in_modeset = ret;
 +
-+	if (encoder->base.encoder_type == DRM_MODE_ENCODER_LVDS) {
-+		mode_ctl |= NV50_SOR_MODE_CTRL_LVDS;
-+	} else {
-+		mode_ctl |= NV50_SOR_MODE_CTRL_TMDS;
++	if (encoder->base.encoder_type != DRM_MODE_ENCODER_LVDS) {
++		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_TMDS;
 +		if (adjusted_mode->clock > 165000)
-+			mode_ctl |= NV50_SOR_MODE_CTRL_TMDS_DUAL_LINK;
++			mode_ctl |= NV50_EVO_SOR_MODE_CTRL_TMDS_DUAL_LINK;
 +	}
 +
 +	if (crtc->index == 1)
-+		mode_ctl |= NV50_SOR_MODE_CTRL_CRTC1;
++		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
 +	else
-+		mode_ctl |= NV50_SOR_MODE_CTRL_CRTC0;
++		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
 +
 +	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
-+		mode_ctl |= NV50_SOR_MODE_CTRL_NHSYNC;
++		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
 +
 +	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
-+		mode_ctl |= NV50_SOR_MODE_CTRL_NVSYNC;
++		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
 +
 +	ret = RING_SPACE(evo, 2);
 +	if (ret) {
 +		NV_ERROR(dev, "no space while connecting SOR\n");
 +		return;
 +	}
-+	BEGIN_RING(evo, 0, NV50_SOR0_MODE_CTRL + offset, 1);
++	BEGIN_RING(evo, 0, NV50_EVO_SOR(encoder->or, MODE_CTRL), 1);
 +	OUT_RING  (evo, mode_ctl);
 +}
 +
@@ -52004,8 +53510,7 @@ index 0000000..8977aa3
 +	drm_encoder_init(dev, &encoder->base, &nv50_sor_encoder_funcs, type);
 +	drm_encoder_helper_add(&encoder->base, &nv50_sor_helper_funcs);
 +
-+	/* I've never seen possible crtc's restricted. */
-+	encoder->base.possible_crtcs = 3;
++	encoder->base.possible_crtcs = entry->heads;
 +	encoder->base.possible_clones = 0;
 +
 +	/* Some default state, unknown what it precisely means. */


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1628
retrieving revision 1.1629
diff -u -p -r1.1628 -r1.1629
--- kernel.spec	11 Jul 2009 00:30:33 -0000	1.1628
+++ kernel.spec	13 Jul 2009 06:42:42 -0000	1.1629
@@ -1868,6 +1868,9 @@ fi
 # and build.
 
 %changelog
+* Mon Jul 13 2009 Ben Skeggs <bskeggs at redhat.com>
+- drm-nouveau.patch: update from upstream
+
 * Fri Jul 10 2009 Chuck Ebbert <cebbert at redhat.com>
 - 2.6.31-rc2-git6
 - Drop dmadebug-spinlock patch -- merged upstream.