rpms/kernel/devel drm-nouveau.patch, 1.35, 1.36 kernel.spec, 1.1644, 1.1645
Ben Skeggs
bskeggs at fedoraproject.org
Wed Jul 22 03:36:16 UTC 2009
Author: bskeggs
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv29331
Modified Files:
drm-nouveau.patch kernel.spec
Log Message:
* Wed Jul 22 2009 Ben Skeggs <bskeggs at redhat.com>
- Update nouveau from upstream (initial suspend/resume + misc bugfixes)
drm-nouveau.patch:
drivers/gpu/drm/Kconfig | 30
drivers/gpu/drm/Makefile | 1
drivers/gpu/drm/drm_bufs.c | 28
drivers/gpu/drm/nouveau/Makefile | 27
drivers/gpu/drm/nouveau/nouveau_backlight.c | 154
drivers/gpu/drm/nouveau/nouveau_bios.c | 5037 ++++++
drivers/gpu/drm/nouveau/nouveau_bios.h | 226
drivers/gpu/drm/nouveau/nouveau_bo.c | 567
drivers/gpu/drm/nouveau/nouveau_calc.c | 622
drivers/gpu/drm/nouveau/nouveau_connector.h | 55
drivers/gpu/drm/nouveau/nouveau_crtc.h | 89
drivers/gpu/drm/nouveau/nouveau_display.c | 115
drivers/gpu/drm/nouveau/nouveau_dma.c | 143
drivers/gpu/drm/nouveau/nouveau_dma.h | 136
drivers/gpu/drm/nouveau/nouveau_drv.c | 353
drivers/gpu/drm/nouveau/nouveau_drv.h | 1077 +
drivers/gpu/drm/nouveau/nouveau_encoder.h | 51
drivers/gpu/drm/nouveau/nouveau_fb.h | 43
drivers/gpu/drm/nouveau/nouveau_fbcon.c | 1018 +
drivers/gpu/drm/nouveau/nouveau_fbcon.h | 49
drivers/gpu/drm/nouveau/nouveau_fence.c | 261
drivers/gpu/drm/nouveau/nouveau_fifo.c | 664
drivers/gpu/drm/nouveau/nouveau_gem.c | 769
drivers/gpu/drm/nouveau/nouveau_hw.c | 1015 +
drivers/gpu/drm/nouveau/nouveau_hw.h | 427
drivers/gpu/drm/nouveau/nouveau_i2c.c | 273
drivers/gpu/drm/nouveau/nouveau_i2c.h | 46
drivers/gpu/drm/nouveau/nouveau_ioc32.c | 72
drivers/gpu/drm/nouveau/nouveau_irq.c | 667
drivers/gpu/drm/nouveau/nouveau_mem.c | 539
drivers/gpu/drm/nouveau/nouveau_notifier.c | 194
drivers/gpu/drm/nouveau/nouveau_object.c | 1259 +
drivers/gpu/drm/nouveau/nouveau_reg.h | 831 +
drivers/gpu/drm/nouveau/nouveau_sgdma.c | 329
drivers/gpu/drm/nouveau/nouveau_state.c | 1036 +
drivers/gpu/drm/nouveau/nouveau_swmthd.h | 33
drivers/gpu/drm/nouveau/nouveau_ttm.c | 116
drivers/gpu/drm/nouveau/nv04_crtc.c | 1025 +
drivers/gpu/drm/nouveau/nv04_cursor.c | 75
drivers/gpu/drm/nouveau/nv04_display.c | 245
drivers/gpu/drm/nouveau/nv04_fb.c | 21
drivers/gpu/drm/nouveau/nv04_fbcon.c | 291
drivers/gpu/drm/nouveau/nv04_fifo.c | 144
drivers/gpu/drm/nouveau/nv04_graph.c | 578
drivers/gpu/drm/nouveau/nv04_instmem.c | 182
drivers/gpu/drm/nouveau/nv04_mc.c | 20
drivers/gpu/drm/nouveau/nv04_output.c | 1194 +
drivers/gpu/drm/nouveau/nv04_timer.c | 50
drivers/gpu/drm/nouveau/nv10_fb.c | 24
drivers/gpu/drm/nouveau/nv10_fifo.c | 175
drivers/gpu/drm/nouveau/nv10_graph.c | 935 +
drivers/gpu/drm/nouveau/nv20_graph.c | 949 +
drivers/gpu/drm/nouveau/nv40_fb.c | 62
drivers/gpu/drm/nouveau/nv40_fifo.c | 216
drivers/gpu/drm/nouveau/nv40_graph.c | 2200 ++
drivers/gpu/drm/nouveau/nv40_mc.c | 38
drivers/gpu/drm/nouveau/nv50_connector.c | 495
drivers/gpu/drm/nouveau/nv50_crtc.c | 805 +
drivers/gpu/drm/nouveau/nv50_cursor.c | 153
drivers/gpu/drm/nouveau/nv50_dac.c | 284
drivers/gpu/drm/nouveau/nv50_display.c | 803 +
drivers/gpu/drm/nouveau/nv50_display.h | 46
drivers/gpu/drm/nouveau/nv50_evo.h | 113
drivers/gpu/drm/nouveau/nv50_fbcon.c | 254
drivers/gpu/drm/nouveau/nv50_fifo.c | 474
drivers/gpu/drm/nouveau/nv50_graph.c | 428
drivers/gpu/drm/nouveau/nv50_grctx.h |22284 ++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_instmem.c | 499
drivers/gpu/drm/nouveau/nv50_mc.c | 40
drivers/gpu/drm/nouveau/nv50_sor.c | 268
drivers/gpu/drm/nouveau/nvreg.h | 503
drivers/gpu/drm/ttm/ttm_bo.c | 4
include/drm/Kbuild | 1
include/drm/drmP.h | 2
include/drm/nouveau_drm.h | 298
75 files changed, 54509 insertions(+), 21 deletions(-)
View full diff with command:
/usr/bin/cvs -f diff -kk -u -p -N -r 1.35 -r 1.36 drm-nouveau.patchIndex: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.35
retrieving revision 1.36
diff -u -p -r1.35 -r1.36
--- drm-nouveau.patch 13 Jul 2009 06:42:41 -0000 1.35
+++ drm-nouveau.patch 22 Jul 2009 03:36:13 -0000 1.36
@@ -1,8 +1,8 @@
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index 39b393d..3339338 100644
+index 39b393d..5ea10e5 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
-@@ -143,3 +143,22 @@ config DRM_SAVAGE
+@@ -143,3 +143,33 @@ config DRM_SAVAGE
help
Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister
chipset. If M is selected the module will be called savage.
@@ -14,6 +14,9 @@ index 39b393d..3339338 100644
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
++ select FB
++ select FRAMEBUFFER_CONSOLE if !EMBEDDED
++ select FB_BACKLIGHT if DRM_NOUVEAU_BACKLIGHT
+ help
+ Choose this option for open-source nVidia support.
+
@@ -25,6 +28,14 @@ index 39b393d..3339338 100644
+ and you have a new enough userspace to support this. Running old
+ userspaces with this enabled will cause pain.
+
++config DRM_NOUVEAU_BACKLIGHT
++ bool "Support for backlight control"
++ depends on DRM_NOUVEAU
++ default y
++ help
++ Say Y here if you want to control the backlight of your display
++ (e.g. a laptop panel).
++
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index fe23f29..4c6a38d 100644
--- a/drivers/gpu/drm/Makefile
@@ -94,10 +105,10 @@ index 6246e3f..436e2fe 100644
if (map->type == _DRM_REGISTERS)
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
new file mode 100644
-index 0000000..f5d93b5
+index 0000000..67a9582
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/Makefile
-@@ -0,0 +1,26 @@
+@@ -0,0 +1,27 @@
+#
+# Makefile for the drm device driver. This driver provides support for the
+# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
@@ -108,7 +119,7 @@ index 0000000..f5d93b5
+ nouveau_sgdma.o nouveau_dma.o \
+ nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
+ nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
-+ nouveau_display.o nouveau_fbcon.o nouveau_backlight.o \
++ nouveau_display.o nouveau_fbcon.o \
+ nv04_timer.o \
+ nv04_mc.o nv40_mc.o nv50_mc.o \
+ nv04_fb.o nv10_fb.o nv40_fb.o \
@@ -119,14 +130,15 @@ index 0000000..f5d93b5
+ nv50_crtc.o nv50_dac.o nv50_sor.o nv50_connector.o \
+ nv50_cursor.o nv50_display.o nv50_fbcon.o \
+ nv04_display.o nv04_output.o nv04_crtc.o nv04_cursor.o \
-+ nv04_fbcon.o
++ nv04_fbcon.o
+
+nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
++nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
+
+obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c
new file mode 100644
-index 0000000..395639b
+index 0000000..4f4919e
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_backlight.c
@@ -0,0 +1,154 @@
@@ -199,7 +211,7 @@ index 0000000..395639b
+{
+ struct drm_device *dev = bl_get_data(bd);
+
-+ return nv_rd32(NV50_PDISPLAY_BACKLIGHT);
++ return nv_rd32(NV50_PDISPLAY_SOR_BACKLIGHT);
+}
+
+static int nv50_set_intensity(struct backlight_device *bd)
@@ -207,8 +219,8 @@ index 0000000..395639b
+ struct drm_device *dev = bl_get_data(bd);
+ int val = bd->props.brightness;
+
-+ nv_wr32(NV50_PDISPLAY_BACKLIGHT, val | NV50_PDISPLAY_BACKLIGHT_ENABLE);
-+
++ nv_wr32(NV50_PDISPLAY_SOR_BACKLIGHT, val |
++ NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE);
+ return 0;
+}
+
@@ -244,7 +256,7 @@ index 0000000..395639b
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct backlight_device *bd;
+
-+ if (!nv_rd32(NV50_PDISPLAY_BACKLIGHT))
++ if (!nv_rd32(NV50_PDISPLAY_SOR_BACKLIGHT))
+ return 0;
+
+ bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
@@ -286,10 +298,10 @@ index 0000000..395639b
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
new file mode 100644
-index 0000000..f719eb4
+index 0000000..e2a64c3
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -0,0 +1,4861 @@
+@@ -0,0 +1,5037 @@
+/*
+ * Copyright 2005-2006 Erik Waling
+ * Copyright 2006 Stephane Marchesin
@@ -601,14 +613,21 @@ index 0000000..f719eb4
+
+static bool valid_idx_port(struct drm_device *dev, uint16_t port)
+{
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
++
+ /* if adding more ports here, the read/write functions below will need
+ * updating so that the correct mmio range (PRMCIO, PRMDIO, PRMVIO) is
+ * used for the port in question
+ */
-+ if (port == NV_CIO_CRX__COLOR)
-+ return true;
-+ if (port == NV_VIO_SRX)
-+ return true;
++ if (dev_priv->card_type < NV_50) {
++ if (port == NV_CIO_CRX__COLOR)
++ return true;
++ if (port == NV_VIO_SRX)
++ return true;
++ } else {
++ if (port == NV_CIO_CRX__COLOR)
++ return true;
++ }
+
+ NV_ERROR(dev, "========== unknown indexed io port 0x%04X ==========\n",
+ port);
@@ -680,25 +699,36 @@ index 0000000..f719eb4
+ }
+}
+
-+static uint8_t bios_idxprt_rd(struct drm_device *dev, uint16_t port, uint8_t index)
++static uint8_t
++bios_idxprt_rd(struct drm_device *dev, uint16_t port, uint8_t index)
+{
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ uint8_t data;
+
+ if (!valid_idx_port(dev, port))
+ return 0;
+
-+ if (port == NV_VIO_SRX)
-+ data = NVReadVgaSeq(dev, crtchead, index);
-+ else /* assume NV_CIO_CRX__COLOR */
-+ data = NVReadVgaCrtc(dev, crtchead, index);
++ if (dev_priv->card_type < NV_50) {
++ if (port == NV_VIO_SRX)
++ data = NVReadVgaSeq(dev, crtchead, index);
++ else /* assume NV_CIO_CRX__COLOR */
++ data = NVReadVgaCrtc(dev, crtchead, index);
++ } else {
++ uint32_t data32;
+
-+ BIOSLOG(dev, " Indexed IO read: Port: 0x%04X, Index: 0x%02X, Head: 0x%02X, Data: 0x%02X\n",
-+ port, index, crtchead, data);
++ data32 = bios_rd32(dev, NV50_PDISPLAY_VGACRTC(index & ~3));
++ data = (data32 >> ((index & 3) << 3)) & 0xff;
++ }
+
++ BIOSLOG(dev, " Indexed IO read: Port: 0x%04X, Index: 0x%02X, "
++ "Head: 0x%02X, Data: 0x%02X\n",
++ port, index, crtchead, data);
+ return data;
+}
+
-+static void bios_idxprt_wr(struct drm_device *dev, uint16_t port, uint8_t index, uint8_t data)
++static void
++bios_idxprt_wr(struct drm_device *dev, uint16_t port,
++ uint8_t index, uint8_t data)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+
@@ -711,22 +741,35 @@ index 0000000..f719eb4
+ * As CR44 only exists on CRTC0, we update crtchead to head0 in advance
+ * of the write, and to head1 after the write
[...4197 lines suppressed...]
++ /* Poke the relevant regs, and pray it works :) */
++ nv_wr32(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12));
++ nv_wr32(NV50_PUNK_UNK1710, 0);
++ nv_wr32(NV50_PUNK_BAR_CFG_BASE, (chan->ramin->instance >> 12) |
++ NV50_PUNK_BAR_CFG_BASE_VALID);
++ nv_wr32(NV50_PUNK_BAR1_CTXDMA, (priv->fb_bar->instance >> 4) |
++ NV50_PUNK_BAR1_CTXDMA_VALID);
++ nv_wr32(NV50_PUNK_BAR3_CTXDMA, (priv->pramin_bar->instance >> 4) |
++ NV50_PUNK_BAR3_CTXDMA_VALID);
++
++ for (i = 0; i < 8; i++)
++ nv_wr32(0x1900 + (i*4), 0);
++}
++
++int
+nv50_instmem_populate(struct drm_device *dev, struct nouveau_gpuobj *gpuobj,
+ uint32_t *sz)
+{
@@ -53052,8 +53723,16 @@ index 0000000..9b5f802
+ true, false, &gpuobj->im_backing);
+ if (ret) {
+ NV_ERROR(dev, "error getting PRAMIN backing pages: %d\n", ret);
-+ return -ENOMEM;
++ return ret;
+ }
++
++ ret = nouveau_bo_pin(gpuobj->im_backing, TTM_PL_FLAG_VRAM);
++ if (ret) {
++ NV_ERROR(dev, "error pinning PRAMIN backing VRAM: %d\n", ret);
++ nouveau_bo_ref(NULL, &gpuobj->im_backing);
++ return ret;
++ }
++
+ gpuobj->im_backing_start = gpuobj->im_backing->bo.mem.mm_node->start;
+ gpuobj->im_backing_start <<= PAGE_SHIFT;
+
@@ -53217,10 +53896,10 @@ index 0000000..6572f12
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
new file mode 100644
-index 0000000..5429266
+index 0000000..23eb86d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
-@@ -0,0 +1,304 @@
+@@ -0,0 +1,268 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -53264,7 +53943,7 @@ index 0000000..5429266
+{
+ struct drm_device *dev = encoder->base.dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
-+ struct nouveau_channel *evo = &dev_priv->evo.chan;
++ struct nouveau_channel *evo = dev_priv->evo;
+ int ret;
+
+ NV_DEBUG(dev, "Disconnecting SOR %d\n", encoder->or);
@@ -53278,34 +53957,11 @@ index 0000000..5429266
+ OUT_RING (evo, 0);
+}
+
-+static int
-+nv50_sor_set_clock_mode(struct nouveau_encoder *encoder,
-+ struct drm_display_mode *mode)
-+{
-+ struct drm_device *dev = encoder->base.dev;
-+ uint32_t limit = encoder->dcb->type == OUTPUT_LVDS ? 112000 : 165000;
-+
-+ NV_DEBUG(dev, "or %d\n", encoder->or);
-+
-+ /* We don't yet know what to do, if anything at all. */
-+ if (encoder->dcb->type == OUTPUT_LVDS)
-+ return 0;
-+
-+ /* 0x70000 was a late addition to nv, mentioned as fixing tmds
-+ * initialisation on certain gpu's. I presume it's some kind of
-+ * clock setting, but what precisely i do not know.
-+ */
-+ nv_wr32(NV50_PDISPLAY_SOR_CLK_CTRL2(encoder->or),
-+ 0x70000 | ((mode->clock > limit) ? 0x101 : 0));
-+
-+ return 0;
-+}
-+
+static void nv50_sor_dpms(struct drm_encoder *drm_encoder, int mode)
+{
+ struct drm_device *dev = drm_encoder->dev;
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
-+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct nouveau_encoder *encoder = nouveau_encoder(drm_encoder);
+ uint32_t val;
+ int or = encoder->or;
+
@@ -53317,27 +53973,27 @@ index 0000000..5429266
+ }
+
+ /* wait for it to be done */
-+ if (!nv_wait(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or),
-+ NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_PENDING, 0)) {
++ if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
++ NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
+ NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
+ NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
-+ nv_rd32(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or)));
++ nv_rd32(NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
+ }
+
-+ val = nv_rd32(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or));
++ val = nv_rd32(NV50_PDISPLAY_SOR_DPMS_CTRL(or));
+
+ if (mode == DRM_MODE_DPMS_ON)
-+ val |= NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_ON;
++ val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
+ else
-+ val &= ~NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_ON;
++ val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
+
-+ nv_wr32(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or), val |
-+ NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_PENDING);
-+ if (!nv_wait(NV50_PDISPLAY_SOR_REGS_DPMS_STATE(or),
-+ NV50_PDISPLAY_SOR_REGS_DPMS_STATE_WAIT, 0)) {
++ nv_wr32(NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
++ NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
++ if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
++ NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
+ NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
+ NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
-+ nv_rd32(NV50_PDISPLAY_SOR_REGS_DPMS_STATE(or)));
++ nv_rd32(NV50_PDISPLAY_SOR_DPMS_STATE(or)));
+ }
+}
+
@@ -53359,7 +54015,7 @@ index 0000000..5429266
+
+ list_for_each_entry(drm_connector, &dev->mode_config.connector_list, head) {
+ if (drm_connector->encoder == &encoder->base)
-+ return to_nouveau_connector(drm_connector);
++ return nouveau_connector(drm_connector);
+ }
+
+ return NULL;
@@ -53369,7 +54025,7 @@ index 0000000..5429266
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
-+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct nouveau_encoder *encoder = nouveau_encoder(drm_encoder);
+ struct nouveau_connector *connector;
+
+ connector = nouveau_encoder_connector_get(encoder);
@@ -53400,10 +54056,10 @@ index 0000000..5429266
+ struct drm_display_mode *adjusted_mode)
+{
+ struct drm_nouveau_private *dev_priv = drm_encoder->dev->dev_private;
-+ struct nouveau_channel *evo = &dev_priv->evo.chan;
-+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct nouveau_channel *evo = dev_priv->evo;
++ struct nouveau_encoder *encoder = nouveau_encoder(drm_encoder);
+ struct drm_device *dev = drm_encoder->dev;
-+ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_encoder->crtc);
++ struct nouveau_crtc *crtc = nouveau_crtc(drm_encoder->crtc);
+ uint32_t mode_ctl = 0;
+ int ret;
+
@@ -53453,7 +54109,7 @@ index 0000000..5429266
+
+static void nv50_sor_destroy(struct drm_encoder *drm_encoder)
+{
-+ struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
++ struct nouveau_encoder *encoder = nouveau_encoder(drm_encoder);
+
+ NV_DEBUG(drm_encoder->dev, "\n");
+
@@ -53504,25 +54160,12 @@ index 0000000..5429266
+
+ encoder->dual_link = nouveau_duallink;
+
-+ /* Set function pointers. */
-+ encoder->set_clock_mode = nv50_sor_set_clock_mode;
-+
+ drm_encoder_init(dev, &encoder->base, &nv50_sor_encoder_funcs, type);
+ drm_encoder_helper_add(&encoder->base, &nv50_sor_helper_funcs);
+
+ encoder->base.possible_crtcs = entry->heads;
+ encoder->base.possible_clones = 0;
+
-+ /* Some default state, unknown what it precisely means. */
-+ if (encoder->base.encoder_type == DRM_MODE_ENCODER_TMDS) {
-+ int or = encoder->or;
-+
-+ nv_wr32(NV50_PDISPLAY_SOR_REGS_UNK_00C(or), 0x03010700);
-+ nv_wr32(NV50_PDISPLAY_SOR_REGS_UNK_010(or), 0x0000152f);
-+ nv_wr32(NV50_PDISPLAY_SOR_REGS_UNK_014(or), 0x00000000);
-+ nv_wr32(NV50_PDISPLAY_SOR_REGS_UNK_018(or), 0x00245af8);
-+ }
-+
+ return 0;
+}
diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1644
retrieving revision 1.1645
diff -u -p -r1.1644 -r1.1645
--- kernel.spec 20 Jul 2009 22:48:45 -0000 1.1644
+++ kernel.spec 22 Jul 2009 03:36:14 -0000 1.1645
@@ -1885,6 +1885,9 @@ fi
# and build.
%changelog
+* Wed Jul 22 2009 Ben Skeggs <bskeggs at redhat.com>
+- Update nouveau from upstream (initial suspend/resume + misc bugfixes)
+
* Mon Jul 20 2009 Adam Jackson <ajax at redhat.com>
- Disable VGA arbiter patches for a moment
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