rpms/kernel/devel drm-nouveau.patch, 1.36, 1.37 kernel.spec, 1.1662, 1.1663

Ben Skeggs bskeggs at fedoraproject.org
Tue Jul 28 11:24:17 UTC 2009


Author: bskeggs

Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv17520

Modified Files:
	drm-nouveau.patch kernel.spec 
Log Message:
* Tue Jul 28 2009 Ben Skeggs <bskeggs at redhat.com>
- drm-nouveau.patch: cleanup userspace API, various bugfixes.
  Looks worse than it is, register macros got cleaned up, which
  touches pretty much everywhere..



drm-nouveau.patch:
 drivers/gpu/drm/Kconfig                     |   30 
 drivers/gpu/drm/Makefile                    |    1 
 drivers/gpu/drm/drm_bufs.c                  |   28 
 drivers/gpu/drm/nouveau/Makefile            |   27 
 drivers/gpu/drm/nouveau/nouveau_backlight.c |  156 
 drivers/gpu/drm/nouveau/nouveau_bios.c      | 5050 ++++++
 drivers/gpu/drm/nouveau/nouveau_bios.h      |  226 
 drivers/gpu/drm/nouveau/nouveau_bo.c        |  567 
 drivers/gpu/drm/nouveau/nouveau_calc.c      |  622 
 drivers/gpu/drm/nouveau/nouveau_connector.h |   55 
 drivers/gpu/drm/nouveau/nouveau_crtc.h      |   90 
 drivers/gpu/drm/nouveau/nouveau_display.c   |  115 
 drivers/gpu/drm/nouveau/nouveau_dma.c       |  143 
 drivers/gpu/drm/nouveau/nouveau_dma.h       |  144 
 drivers/gpu/drm/nouveau/nouveau_drv.c       |  353 
 drivers/gpu/drm/nouveau/nouveau_drv.h       | 1145 +
 drivers/gpu/drm/nouveau/nouveau_encoder.h   |   51 
 drivers/gpu/drm/nouveau/nouveau_fb.h        |   43 
 drivers/gpu/drm/nouveau/nouveau_fbcon.c     | 1019 +
 drivers/gpu/drm/nouveau/nouveau_fbcon.h     |   49 
 drivers/gpu/drm/nouveau/nouveau_fence.c     |  261 
 drivers/gpu/drm/nouveau/nouveau_fifo.c      |  668 
 drivers/gpu/drm/nouveau/nouveau_gem.c       |  751 
 drivers/gpu/drm/nouveau/nouveau_hw.c        | 1019 +
 drivers/gpu/drm/nouveau/nouveau_hw.h        |  436 
 drivers/gpu/drm/nouveau/nouveau_i2c.c       |  274 
 drivers/gpu/drm/nouveau/nouveau_i2c.h       |   46 
 drivers/gpu/drm/nouveau/nouveau_ioc32.c     |   72 
 drivers/gpu/drm/nouveau/nouveau_irq.c       |  674 
 drivers/gpu/drm/nouveau/nouveau_mem.c       |  543 
 drivers/gpu/drm/nouveau/nouveau_notifier.c  |  192 
 drivers/gpu/drm/nouveau/nouveau_object.c    | 1258 +
 drivers/gpu/drm/nouveau/nouveau_reg.h       |  834 +
 drivers/gpu/drm/nouveau/nouveau_sgdma.c     |  331 
 drivers/gpu/drm/nouveau/nouveau_state.c     |  836 +
 drivers/gpu/drm/nouveau/nouveau_swmthd.h    |   33 
 drivers/gpu/drm/nouveau/nouveau_ttm.c       |  116 
 drivers/gpu/drm/nouveau/nv04_crtc.c         | 1126 +
 drivers/gpu/drm/nouveau/nv04_cursor.c       |   70 
 drivers/gpu/drm/nouveau/nv04_display.c      |  250 
 drivers/gpu/drm/nouveau/nv04_fb.c           |   21 
 drivers/gpu/drm/nouveau/nv04_fbcon.c        |  291 
 drivers/gpu/drm/nouveau/nv04_fifo.c         |  146 
 drivers/gpu/drm/nouveau/nv04_graph.c        |  586 
 drivers/gpu/drm/nouveau/nv04_instmem.c      |  182 
 drivers/gpu/drm/nouveau/nv04_mc.c           |   20 
 drivers/gpu/drm/nouveau/nv04_output.c       | 1193 +
 drivers/gpu/drm/nouveau/nv04_timer.c        |   51 
 drivers/gpu/drm/nouveau/nv10_fb.c           |   24 
 drivers/gpu/drm/nouveau/nv10_fifo.c         |  177 
 drivers/gpu/drm/nouveau/nv10_graph.c        |  945 +
 drivers/gpu/drm/nouveau/nv20_graph.c        |  958 +
 drivers/gpu/drm/nouveau/nv40_fb.c           |   62 
 drivers/gpu/drm/nouveau/nv40_fifo.c         |  222 
 drivers/gpu/drm/nouveau/nv40_graph.c        | 2200 ++
 drivers/gpu/drm/nouveau/nv40_mc.c           |   38 
 drivers/gpu/drm/nouveau/nv50_connector.c    |  495 
 drivers/gpu/drm/nouveau/nv50_crtc.c         |  812 +
 drivers/gpu/drm/nouveau/nv50_cursor.c       |  153 
 drivers/gpu/drm/nouveau/nv50_dac.c          |  284 
 drivers/gpu/drm/nouveau/nv50_display.c      |  844 +
 drivers/gpu/drm/nouveau/nv50_display.h      |   46 
 drivers/gpu/drm/nouveau/nv50_evo.h          |  113 
 drivers/gpu/drm/nouveau/nv50_fbcon.c        |  256 
 drivers/gpu/drm/nouveau/nv50_fifo.c         |  475 
 drivers/gpu/drm/nouveau/nv50_graph.c        |  432 
 drivers/gpu/drm/nouveau/nv50_grctx.h        |22284 ++++++++++++++++++++++++++++
 drivers/gpu/drm/nouveau/nv50_instmem.c      |  499 
 drivers/gpu/drm/nouveau/nv50_mc.c           |   40 
 drivers/gpu/drm/nouveau/nv50_sor.c          |  268 
 drivers/gpu/drm/nouveau/nvreg.h             |  503 
 drivers/gpu/drm/ttm/ttm_bo.c                |    4 
 include/drm/Kbuild                          |    1 
 include/drm/drmP.h                          |    2 
 include/drm/nouveau_drm.h                   |  214 
 75 files changed, 54524 insertions(+), 21 deletions(-)

View full diff with command:
/usr/bin/cvs -n -f diff -kk -u -p -N -r 1.36 -r 1.37 drm-nouveau.patchIndex: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.36
retrieving revision 1.37
diff -u -p -r1.36 -r1.37
--- drm-nouveau.patch	22 Jul 2009 03:36:13 -0000	1.36
+++ drm-nouveau.patch	28 Jul 2009 11:24:16 -0000	1.37
@@ -138,10 +138,10 @@ index 0000000..67a9582
 +obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o
 diff --git a/drivers/gpu/drm/nouveau/nouveau_backlight.c b/drivers/gpu/drm/nouveau/nouveau_backlight.c
 new file mode 100644
-index 0000000..4f4919e
+index 0000000..d0f3bc9
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_backlight.c
-@@ -0,0 +1,154 @@
+@@ -0,0 +1,156 @@
 +/*
 + * Copyright (C) 2009 Red Hat <mjg at redhat.com>
 + *
@@ -184,7 +184,8 @@ index 0000000..4f4919e
 +static int nv40_get_intensity(struct backlight_device *bd)
 +{
 +	struct drm_device *dev = bl_get_data(bd);
-+	int val = (nv_rd32(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK) >> 16;
++	int val = (nv_rd32(dev, NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK)
++									>> 16;
 +
 +	return val;
 +}
@@ -193,9 +194,9 @@ index 0000000..4f4919e
 +{
 +	struct drm_device *dev = bl_get_data(bd);
 +	int val = bd->props.brightness;
-+	int reg = nv_rd32(NV40_PMC_BACKLIGHT);
++	int reg = nv_rd32(dev, NV40_PMC_BACKLIGHT);
 +
-+	nv_wr32(NV40_PMC_BACKLIGHT,
++	nv_wr32(dev, NV40_PMC_BACKLIGHT,
 +		 (val << 16) | (reg & ~NV40_PMC_BACKLIGHT_MASK));
 +
 +	return 0;
@@ -211,7 +212,7 @@ index 0000000..4f4919e
 +{
 +	struct drm_device *dev = bl_get_data(bd);
 +
-+	return nv_rd32(NV50_PDISPLAY_SOR_BACKLIGHT);
++	return nv_rd32(dev, NV50_PDISPLAY_SOR_BACKLIGHT);
 +}
 +
 +static int nv50_set_intensity(struct backlight_device *bd)
@@ -219,8 +220,8 @@ index 0000000..4f4919e
 +	struct drm_device *dev = bl_get_data(bd);
 +	int val = bd->props.brightness;
 +
-+	nv_wr32(NV50_PDISPLAY_SOR_BACKLIGHT, val |
-+		NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE);
++	nv_wr32(dev, NV50_PDISPLAY_SOR_BACKLIGHT,
++		val | NV50_PDISPLAY_SOR_BACKLIGHT_ENABLE);
 +	return 0;
 +}
 +
@@ -235,7 +236,7 @@ index 0000000..4f4919e
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +	struct backlight_device *bd;
 +
-+	if (!(nv_rd32(NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK))
++	if (!(nv_rd32(dev, NV40_PMC_BACKLIGHT) & NV40_PMC_BACKLIGHT_MASK))
 +		return 0;
 +
 +	bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
@@ -256,7 +257,7 @@ index 0000000..4f4919e
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
 +	struct backlight_device *bd;
 +
-+	if (!nv_rd32(NV50_PDISPLAY_SOR_BACKLIGHT))
++	if (!nv_rd32(dev, NV50_PDISPLAY_SOR_BACKLIGHT))
 +		return 0;
 +
 +	bd = backlight_device_register("nv_backlight", &dev->pdev->dev, dev,
@@ -279,11 +280,12 @@ index 0000000..4f4919e
 +	case NV_40:
 +	case NV_44:
 +		return nouveau_nv40_backlight_init(dev);
-+		break;
 +	case NV_50:
 +		return nouveau_nv50_backlight_init(dev);
++	default:
 +		break;
 +	}
++
 +	return 0;
 +}
 +
@@ -298,10 +300,10 @@ index 0000000..4f4919e
 +}
 diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
 new file mode 100644
-index 0000000..e2a64c3
+index 0000000..27676f4
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -0,0 +1,5037 @@
+@@ -0,0 +1,5050 @@
 +/*
 + * Copyright 2005-2006 Erik Waling
 + * Copyright 2006 Stephane Marchesin
@@ -408,17 +410,17 @@ index 0000000..e2a64c3
 +		  save_pci_nv_20 & ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
 +
 +	/* bail if no rom signature */
-+	if (nv_rd08(NV_PROM_OFFSET) != 0x55 ||
-+	    nv_rd08(NV_PROM_OFFSET + 1) != 0xaa)
++	if (nv_rd08(dev, NV_PROM_OFFSET) != 0x55 ||
++	    nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)
 +		goto out;
 +
 +	/* additional check (see note below) - read PCI record header */
-+	pcir_ptr = nv_rd08(NV_PROM_OFFSET + 0x18) |
-+		   nv_rd08(NV_PROM_OFFSET + 0x19) << 8;
-+	if (nv_rd08(NV_PROM_OFFSET + pcir_ptr) != 'P' ||
-+	    nv_rd08(NV_PROM_OFFSET + pcir_ptr + 1) != 'C' ||
-+	    nv_rd08(NV_PROM_OFFSET + pcir_ptr + 2) != 'I' ||
-+	    nv_rd08(NV_PROM_OFFSET + pcir_ptr + 3) != 'R')
++	pcir_ptr = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |
++		   nv_rd08(dev, NV_PROM_OFFSET + 0x19) << 8;
++	if (nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr) != 'P' ||
++	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 1) != 'C' ||
++	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 2) != 'I' ||
++	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 3) != 'R')
 +		goto out;
 +
 +	/* on some 6600GT/6800LE prom reads are messed up.  nvclock alleges a
@@ -426,7 +428,7 @@ index 0000000..e2a64c3
 +	 * each byte.  we'll hope pramin has something usable instead
 +	 */
 +	for (i = 0; i < NV_PROM_SIZE; i++)
-+		data[i] = nv_rd08(NV_PROM_OFFSET + i);
++		data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);
 +
 +out:
 +	/* disable ROM access */
@@ -440,26 +442,26 @@ index 0000000..e2a64c3
 +	int i;
 +
 +	if (nv_arch(dev) >= NV_50) {
-+		uint32_t vbios_vram = (nv_rd32(0x619f04) & ~0xff) << 8;
++		uint32_t vbios_vram = (nv_rd32(dev, 0x619f04) & ~0xff) << 8;
 +
 +		if (!vbios_vram)
-+			vbios_vram = (nv_rd32(0x1700) << 16) + 0xf0000;
++			vbios_vram = (nv_rd32(dev, 0x1700) << 16) + 0xf0000;
 +
-+		old_bar0_pramin = nv_rd32(0x1700);
-+		nv_wr32(0x1700, vbios_vram >> 16);
++		old_bar0_pramin = nv_rd32(dev, 0x1700);
++		nv_wr32(dev, 0x1700, vbios_vram >> 16);
 +	}
 +
 +	/* bail if no rom signature */
-+	if (nv_rd08(NV_PRAMIN_OFFSET) != 0x55 ||
-+	    nv_rd08(NV_PRAMIN_OFFSET + 1) != 0xaa)
++	if (nv_rd08(dev, NV_PRAMIN_OFFSET) != 0x55 ||
++	    nv_rd08(dev, NV_PRAMIN_OFFSET + 1) != 0xaa)
 +		goto out;
 +
 +	for (i = 0; i < NV_PROM_SIZE; i++)
-+		data[i] = nv_rd08(NV_PRAMIN_OFFSET + i);
++		data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);
 +
 +out:
 +	if (nv_arch(dev) >= NV_50)
-+		nv_wr32(0x1700, old_bar0_pramin);
++		nv_wr32(dev, 0x1700, old_bar0_pramin);
 +}
 +
 +static void load_vbios_pci(struct drm_device *dev, uint8_t *data)
@@ -475,7 +477,7 @@ index 0000000..e2a64c3
 +	rom = pci_map_rom(dev->pdev, &rom_len);
 +	if (!rom)
 +		goto out;
-+	memcpy(data, rom, rom_len);
++	memcpy_fromio(data, rom, rom_len);
 +	pci_unmap_rom(dev->pdev, rom);
 +
 +out:
@@ -671,7 +673,7 @@ index 0000000..e2a64c3
 +	if (reg & 0x1)
 +		reg &= ~0x1;
 +
-+	data = nv_rd32(reg);
++	data = nv_rd32(dev, reg);
 +
 +	BIOSLOG(dev, "	Read:  Reg: 0x%08X, Data: 0x%08X\n", reg, data);
 +
@@ -695,7 +697,7 @@ index 0000000..e2a64c3
 +
 +	if (dev_priv->VBIOS.execute) {
 +		still_alive();
[...10565 lines suppressed...]
 +
-+#define NOUVEAU_DRM_HEADER_PATCHLEVEL 14
++#define NOUVEAU_DRM_HEADER_PATCHLEVEL 15
 +
 +struct drm_nouveau_channel_alloc {
 +	uint32_t     fb_ctxdma_handle;
@@ -54776,8 +54875,7 @@ index 0000000..dc6a194
 +	int          channel;
 +
 +	/* Notifier memory */
-+	drm_handle_t notifier;
-+	int          notifier_size;
++	uint32_t     notifier_handle;
 +
 +	/* DRM-enforced subchannel assignments */
 +	struct {
@@ -54785,15 +54883,6 @@ index 0000000..dc6a194
 +		uint32_t grclass;
 +	} subchan[8];
 +	uint32_t nr_subchan;
-+
-+/* !MM_ENABLED ONLY */
-+	uint32_t     put_base;
-+	/* FIFO control regs */
-+	drm_handle_t ctrl;
-+	int          ctrl_size;
-+	/* DMA command buffer */
-+	drm_handle_t cmdbuf;
-+	int          cmdbuf_size;
 +};
 +
 +struct drm_nouveau_channel_free {
@@ -54806,14 +54895,10 @@ index 0000000..dc6a194
 +	int      class;
 +};
 +
-+#define NOUVEAU_MEM_ACCESS_RO	1
-+#define NOUVEAU_MEM_ACCESS_WO	2
-+#define NOUVEAU_MEM_ACCESS_RW	3
 +struct drm_nouveau_notifierobj_alloc {
-+	int      channel;
++	uint32_t channel;
 +	uint32_t handle;
-+	int      count;
-+
++	uint32_t size;
 +	uint32_t offset;
 +};
 +
@@ -54822,52 +54907,6 @@ index 0000000..dc6a194
 +	uint32_t handle;
 +};
 +
-+/* This is needed to avoid a race condition.
-+ * Otherwise you may be writing in the fetch area.
-+ * Is this large enough, as it's only 32 bytes, and the maximum fetch size is 256 bytes?
-+ */
-+#define NOUVEAU_DMA_SKIPS 8
-+
-+#define NOUVEAU_MEM_FB			0x00000001
-+#define NOUVEAU_MEM_AGP			0x00000002
-+#define NOUVEAU_MEM_FB_ACCEPTABLE	0x00000004
-+#define NOUVEAU_MEM_AGP_ACCEPTABLE	0x00000008
-+#define NOUVEAU_MEM_PCI			0x00000010
-+#define NOUVEAU_MEM_PCI_ACCEPTABLE	0x00000020
-+#define NOUVEAU_MEM_PINNED		0x00000040
-+#define NOUVEAU_MEM_USER_BACKED		0x00000080
-+#define NOUVEAU_MEM_MAPPED		0x00000100
-+#define NOUVEAU_MEM_TILE		0x00000200
-+#define NOUVEAU_MEM_TILE_ZETA		0x00000400
-+#define NOUVEAU_MEM_INSTANCE		0x01000000 /* internal */
-+#define NOUVEAU_MEM_NOTIFIER            0x02000000 /* internal */
-+#define NOUVEAU_MEM_NOVM		0x04000000 /* internal */
-+#define NOUVEAU_MEM_USER		0x08000000 /* internal */
-+#define NOUVEAU_MEM_INTERNAL (NOUVEAU_MEM_INSTANCE | \
-+			      NOUVEAU_MEM_NOTIFIER | \
-+			      NOUVEAU_MEM_NOVM | \
-+			      NOUVEAU_MEM_USER)
-+
-+struct drm_nouveau_mem_alloc {
-+	int flags;
-+	int alignment;
-+	uint64_t size;	// in bytes
-+	uint64_t offset;
-+	drm_handle_t map_handle;
-+};
-+
-+struct drm_nouveau_mem_free {
-+	uint64_t offset;
-+	int flags;
-+};
-+
-+struct drm_nouveau_mem_tile {
-+	uint64_t offset;
-+	uint64_t delta;
-+	uint64_t size;
-+	int flags;
-+};
-+
 +/* FIXME : maybe unify {GET,SET}PARAMs */
 +#define NOUVEAU_GETPARAM_PCI_VENDOR      3
 +#define NOUVEAU_GETPARAM_PCI_DEVICE      4
@@ -54878,15 +54917,12 @@ index 0000000..dc6a194
 +#define NOUVEAU_GETPARAM_AGP_SIZE        9
 +#define NOUVEAU_GETPARAM_PCI_PHYSICAL    10
 +#define NOUVEAU_GETPARAM_CHIPSET_ID      11
-+#define NOUVEAU_GETPARAM_MM_ENABLED      12
-+#define NOUVEAU_GETPARAM_VM_VRAM_BASE    13
++#define NOUVEAU_GETPARAM_VM_VRAM_BASE    12
 +struct drm_nouveau_getparam {
 +	uint64_t param;
 +	uint64_t value;
 +};
 +
-+#define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
-+#define NOUVEAU_SETPARAM_CMDBUF_SIZE     2
 +struct drm_nouveau_setparam {
 +	uint64_t param;
 +	uint64_t value;
@@ -54970,8 +55006,12 @@ index 0000000..dc6a194
 +	uint32_t handle;
 +};
 +
++#define NOUVEAU_GEM_CPU_PREP_NOWAIT                                  0x00000001
++#define NOUVEAU_GEM_CPU_PREP_NOBLOCK                                 0x00000002
++#define NOUVEAU_GEM_CPU_PREP_WRITE                                   0x00000004
 +struct drm_nouveau_gem_cpu_prep {
 +	uint32_t handle;
++	uint32_t flags;
 +};
 +
 +struct drm_nouveau_gem_cpu_fini {
@@ -54980,38 +55020,19 @@ index 0000000..dc6a194
 +
 +struct drm_nouveau_gem_tile {
 +	uint32_t handle;
-+	uint32_t delta;
++	uint32_t offset;
 +	uint32_t size;
-+	uint32_t flags;
-+};
-+
-+enum nouveau_card_type {
-+	NV_UNKNOWN =0,
-+	NV_04      =4,
-+	NV_05      =5,
-+	NV_10      =10,
-+	NV_11      =11,
-+	NV_17      =17,
-+	NV_20      =20,
-+	NV_30      =30,
-+	NV_40      =40,
-+	NV_44      =44,
-+	NV_50      =50,
-+	NV_LAST    =0xffff,
++	uint32_t tile_mode;
++	uint32_t tile_flags;
 +};
 +
 +enum nouveau_bus_type {
-+	NV_AGP     =0,
-+	NV_PCI     =1,
-+	NV_PCIE    =2,
++	NV_AGP     = 0,
++	NV_PCI     = 1,
++	NV_PCIE    = 2,
 +};
 +
-+#define NOUVEAU_MAX_SAREA_CLIPRECTS 16
-+
 +struct drm_nouveau_sarea {
-+	/* the cliprects */
-+	struct drm_clip_rect boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
-+	unsigned int nbox;
 +};
 +
 +#define DRM_NOUVEAU_CARD_INIT          0x00
@@ -55022,19 +55043,13 @@ index 0000000..dc6a194
 +#define DRM_NOUVEAU_GROBJ_ALLOC        0x05
 +#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC  0x06
 +#define DRM_NOUVEAU_GPUOBJ_FREE        0x07
-+#define DRM_NOUVEAU_MEM_ALLOC          0x08
-+#define DRM_NOUVEAU_MEM_FREE           0x09
-+#define DRM_NOUVEAU_MEM_TILE           0x0a
-+#define DRM_NOUVEAU_SUSPEND            0x0b
-+#define DRM_NOUVEAU_RESUME             0x0c
 +#define DRM_NOUVEAU_GEM_NEW            0x40
 +#define DRM_NOUVEAU_GEM_PUSHBUF        0x41
 +#define DRM_NOUVEAU_GEM_PUSHBUF_CALL   0x42
-+#define DRM_NOUVEAU_GEM_PIN            0x43
-+#define DRM_NOUVEAU_GEM_UNPIN          0x44
++#define DRM_NOUVEAU_GEM_PIN            0x43 /* !KMS only */
++#define DRM_NOUVEAU_GEM_UNPIN          0x44 /* !KMS only */
 +#define DRM_NOUVEAU_GEM_CPU_PREP       0x45
 +#define DRM_NOUVEAU_GEM_CPU_FINI       0x46
-+#define DRM_NOUVEAU_GEM_TILE           0x47
-+#define DRM_NOUVEAU_GEM_INFO           0x48
++#define DRM_NOUVEAU_GEM_INFO           0x47
 +
 +#endif /* __NOUVEAU_DRM_H__ */


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1662
retrieving revision 1.1663
diff -u -p -r1.1662 -r1.1663
--- kernel.spec	27 Jul 2009 22:03:29 -0000	1.1662
+++ kernel.spec	28 Jul 2009 11:24:17 -0000	1.1663
@@ -439,7 +439,7 @@ Summary: The Linux kernel
 Provides: kernel = %{rpmversion}-%{pkg_release}\
 Provides: kernel-%{_target_cpu} = %{rpmversion}-%{pkg_release}%{?1:.%{1}}\
 Provides: kernel-drm = 4.3.0\
-Provides: kernel-drm-nouveau = 14\
+Provides: kernel-drm-nouveau = 15\
 Provides: kernel-modeset = 1\
 Provides: kernel-uname-r = %{KVERREL}%{?1:.%{1}}\
 Requires(pre): %{kernel_prereq}\
@@ -1898,6 +1898,11 @@ fi
 # and build.
 
 %changelog
+* Tue Jul 28 2009 Ben Skeggs <bskeggs at redhat.com>
+- drm-nouveau.patch: cleanup userspace API, various bugfixes.
+  Looks worse than it is, register macros got cleaned up, which
+  touches pretty much everywhere..
+
 * Mon Jul 27 2009 Adam Jackson <ajax at redhat.com>
 - Warn quieter about not finding PCI bus parents for ROM BARs, they're
   not usually needed and there's nothing you can do about it anyway.




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