rpms/xorg-x11-drv-ati/devel fix-default-modes.patch, NONE, 1.1 mkxinf, NONE, 1.1 radeon-6.12.2-hax.patch, NONE, 1.1 radeon-6.12.2-lvds-default-modes.patch, NONE, 1.1 radeon-6.12.2-rs690-hack.patch, NONE, 1.1 radeon-6.12.2-stable-branch.patch, NONE, 1.1 radeon-kms-compat.patch, NONE, 1.1 radeon-modeset-fixes.patch, 1.2, 1.3 radeon-modeset-still-more-fixes.patch, NONE, 1.1 radeon-src-readback-cpu.patch, NONE, 1.1 radeon-modeset.patch, 1.46, 1.47 xorg-x11-drv-ati.spec, 1.176, 1.177 radeon.xinf, 1.12, NONE
Dave Airlie
airlied at fedoraproject.org
Mon Jun 22 02:30:21 UTC 2009
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv14877
Modified Files:
radeon-modeset.patch xorg-x11-drv-ati.spec
Added Files:
fix-default-modes.patch mkxinf radeon-6.12.2-hax.patch
radeon-6.12.2-lvds-default-modes.patch
radeon-6.12.2-rs690-hack.patch
radeon-6.12.2-stable-branch.patch radeon-kms-compat.patch
radeon-modeset-fixes.patch
radeon-modeset-still-more-fixes.patch
radeon-src-readback-cpu.patch
Removed Files:
radeon.xinf
Log Message:
* Mon Jun 22 2009 Dave Airlie <airlied at redhat.com> 6.12.2-18
- rebuild against xorg F12 master
fix-default-modes.patch:
--- NEW FILE fix-default-modes.patch ---
diff -up xf86-video-ati-6.12.2/src/drmmode_display.c.da xf86-video-ati-6.12.2/src/drmmode_display.c
--- xf86-video-ati-6.12.2/src/drmmode_display.c.da 2009-06-22 12:21:21.000000000 +1000
+++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-06-22 12:21:30.000000000 +1000
@@ -593,7 +593,7 @@ drmmode_output_get_modes(xf86OutputPtr o
max_vrefresh = max(max_vrefresh, 60.0);
max_vrefresh *= (1 + SYNC_TOLERANCE);
- m = xf86GetDefaultModes(FALSE, FALSE);
+ m = xf86GetDefaultModes();
xf86ValidateModesSize(output->scrn, m, max_x, max_y, 0);
for (i = m; i; i = i->next) {
--- NEW FILE mkxinf ---
#!/usr/bin/python
import csv
import sys
csvfile = open(sys.argv[1])
dialect = csv.Sniffer().sniff(csvfile.read(1024))
csvfile.seek(0)
reader = csv.reader(csvfile, dialect)
# pciid, define, family, mobility, igp, nocrtc2, Nointtvout, singledac, name
for line in reader:
if line[0].find("pciid") is not -1:
continue
if line[2].find("MACH") is not -1 or line[2].find("R128") is not -1:
continue
print "alias pcivideo:v00001002d0000%ssv*sd*bc*sc*i* radeon # %s" % \
(line[0].split('x')[1], line[8])
radeon-6.12.2-hax.patch:
--- NEW FILE radeon-6.12.2-hax.patch ---
The memset hack is probably right. The cursor hack probably needs to be
replicated in the kernel.
diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.jx xf86-video-ati-6.12.2/src/radeon_cursor.c
--- xf86-video-ati-6.12.2/src/radeon_cursor.c.jx 2009-05-21 13:56:38.000000000 -0400
+++ xf86-video-ati-6.12.2/src/radeon_cursor.c 2009-05-21 13:56:39.000000000 -0400
@@ -372,7 +372,7 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
(unsigned int)radeon_crtc->cursor_offset);
}
/* set the cursor mode the same on both crtcs to avoid corruption */
- if (IS_AVIVO_VARIANT)
+ if (IS_AVIVO_VARIANT && !info->drm_mode_setting)
OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
}
diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.jx xf86-video-ati-6.12.2/src/radeon_driver.c
--- xf86-video-ati-6.12.2/src/radeon_driver.c.jx 2009-05-21 13:56:38.000000000 -0400
+++ xf86-video-ati-6.12.2/src/radeon_driver.c 2009-05-21 13:59:08.000000000 -0400
@@ -3911,8 +3911,9 @@ Bool RADEONScreenInit(int scrnIndex, Scr
}
/* Clear the framebuffer */
- memset(info->FB + pScrn->fbOffset, 0,
- pScrn->virtualY * pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
+ if (!info->drm_mode_setting)
+ memset(info->FB + pScrn->fbOffset, 0,
+ pScrn->virtualY * pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
/* set the modes with desired rotation, etc. */
pScrn->pScreen = pScreen;
radeon-6.12.2-lvds-default-modes.patch:
--- NEW FILE radeon-6.12.2-lvds-default-modes.patch ---
diff -up xf86-video-ati-6.12.2/src/drmmode_display.c.lvds xf86-video-ati-6.12.2/src/drmmode_display.c
--- xf86-video-ati-6.12.2/src/drmmode_display.c.lvds 2009-05-07 13:13:43.000000000 -0400
+++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-05-07 13:39:10.000000000 -0400
@@ -568,6 +568,49 @@ drmmode_output_get_modes(xf86OutputPtr o
Modes = xf86ModesAdd(Modes, Mode);
}
+
+ /*
+ * LVDS can scale. If there's no EDID, or if it claims not to be
+ * continuous-freq, then add the default modes so we get 800x600
+ * and friends.
+ */
+ if (strstr(output->name, "LVDS")) {
+ xf86MonPtr mon = output->MonInfo;
+ if (!mon || !GTF_SUPPORTED(mon->features.msc)) {
+ DisplayModePtr m, i, p = NULL;
+ int max_x = 0, max_y = 0;
+ float max_vrefresh = 0.0;
+
+ for (m = Modes; m; m = m->next) {
+ if (m->type & M_T_PREFERRED)
+ p = m;
+ max_x = max(max_x, m->HDisplay);
+ max_y = max(max_y, m->VDisplay);
+ max_vrefresh = max(max_vrefresh,
+ xf86ModeVRefresh(m));
+ }
+
+ max_vrefresh = max(max_vrefresh, 60.0);
+ max_vrefresh *= (1 + SYNC_TOLERANCE);
+
+ m = xf86GetDefaultModes(FALSE, FALSE);
+
+ xf86ValidateModesSize(output->scrn, m, max_x, max_y, 0);
+ for (i = m; i; i = i->next) {
+ if (xf86ModeVRefresh(i) > max_vrefresh)
+ i->status = MODE_VSYNC;
+ if (p && i->HDisplay >= p->HDisplay &&
+ i->VDisplay >= p->VDisplay &&
+ xf86ModeVRefresh(i) >= xf86ModeVRefresh(p))
+ i->status = MODE_VSYNC;
+ }
+
+ xf86PruneInvalidModes(output->scrn, &m, FALSE);
+
+ Modes = xf86ModesAdd(Modes, m);
+ }
+ }
+
return Modes;
}
radeon-6.12.2-rs690-hack.patch:
--- NEW FILE radeon-6.12.2-rs690-hack.patch ---
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index b49c2fb..f9fe707 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1265,6 +1265,11 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
txfilter = (unit << R300_TX_ID_SHIFT);
+ /* workaround strange firefox chip hang on rs690 */
+ if (info->ChipFamily == CHIP_FAMILY_RS600 ||
+ info->ChipFamily == CHIP_FAMILY_RS690)
+ txfilter |= R300_TX_CLAMP_R(R300_TX_CLAMP_CLAMP_BORDER);
+
if (pPict->repeat) {
switch (pPict->repeatType) {
case RepeatNormal:
radeon-6.12.2-stable-branch.patch:
--- NEW FILE radeon-6.12.2-stable-branch.patch ---
diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h
index 3304e84..8b37d5b 100644
--- a/src/ati_pciids_gen.h
+++ b/src/ati_pciids_gen.h
@@ -60,6 +60,8 @@
#define PCI_CHIP_R420_JN 0x4A4E
#define PCI_CHIP_R420_4A4F 0x4A4F
#define PCI_CHIP_R420_JP 0x4A50
+#define PCI_CHIP_R420_JT 0x4A54
+#define PCI_CHIP_R481_4B48 0x4B48
#define PCI_CHIP_R481_4B49 0x4B49
#define PCI_CHIP_R481_4B4A 0x4B4A
#define PCI_CHIP_R481_4B4B 0x4B4B
@@ -334,6 +336,7 @@
#define PCI_CHIP_RV770_9440 0x9440
#define PCI_CHIP_RV770_9441 0x9441
#define PCI_CHIP_RV770_9442 0x9442
+#define PCI_CHIP_RV770_9443 0x9443
#define PCI_CHIP_RV770_9444 0x9444
#define PCI_CHIP_RV770_9446 0x9446
#define PCI_CHIP_RV770_944A 0x944A
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c
index 31c032b..f060d8d 100644
--- a/src/atombios_crtc.c
+++ b/src/atombios_crtc.c
@@ -167,13 +167,13 @@ atombios_crtc_dpms(xf86CrtcPtr crtc, int mode)
RADEONInfoPtr info = RADEONPTR(crtc->scrn);
switch (mode) {
case DPMSModeOn:
- case DPMSModeStandby:
- case DPMSModeSuspend:
if (IS_DCE3_VARIANT)
atombios_enable_crtc_memreq(info->atomBIOS, radeon_crtc->crtc_id, 1);
atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
break;
+ case DPMSModeStandby:
+ case DPMSModeSuspend:
case DPMSModeOff:
atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1);
atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0);
diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c
index 829b453..5ea13bc 100644
--- a/src/legacy_crtc.c
+++ b/src/legacy_crtc.c
@@ -649,6 +649,9 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
if (!info->directRenderingEnabled)
return;
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ return;
+
modeset.crtc = radeon_crtc->crtc_id;
modeset.cmd = post ? _DRM_POST_MODESET : _DRM_PRE_MODESET;
@@ -661,55 +664,42 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post)
void
legacy_crtc_dpms(xf86CrtcPtr crtc, int mode)
{
- int mask;
+ uint32_t mask;
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn);
unsigned char *RADEONMMIO = pRADEONEnt->MMIO;
- mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS);
-
- if (mode == DPMSModeOff)
- radeon_crtc_modeset_ioctl(crtc, FALSE);
+ if (radeon_crtc->crtc_id)
+ mask = (RADEON_CRTC2_EN |
+ RADEON_CRTC2_DISP_DIS |
+ RADEON_CRTC2_VSYNC_DIS |
+ RADEON_CRTC2_HSYNC_DIS |
+ RADEON_CRTC2_DISP_REQ_EN_B);
+ else
+ mask = (RADEON_CRTC_DISPLAY_DIS |
+ RADEON_CRTC_HSYNC_DIS |
+ RADEON_CRTC_VSYNC_DIS);
switch(mode) {
case DPMSModeOn:
if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask);
+ OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask);
} else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
+ OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask);
}
break;
case DPMSModeStandby:
- if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask);
- } else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
- OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask);
- }
- break;
case DPMSModeSuspend:
- if (radeon_crtc->crtc_id) {
- OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask);
- } else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B);
- OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask);
- }
- break;
case DPMSModeOff:
if (radeon_crtc->crtc_id) {
OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask);
} else {
- OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~RADEON_CRTC_DISP_REQ_EN_B);
+ OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B));
OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask);
}
break;
}
-
- if (mode != DPMSModeOff) {
- radeon_crtc_modeset_ioctl(crtc, TRUE);
- radeon_crtc_load_lut(crtc);
- }
}
@@ -912,7 +902,6 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save,
/*save->bios_4_scratch = info->SavedReg->bios_4_scratch;*/
save->crtc_gen_cntl = (RADEON_CRTC_EXT_DISP_EN
- | RADEON_CRTC_EN
| (format << 8)
| ((mode->Flags & V_DBLSCAN)
? RADEON_CRTC_DBL_SCAN_EN
@@ -1160,8 +1149,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save,
else
save->crtc2_gen_cntl = 0;
- save->crtc2_gen_cntl |= (RADEON_CRTC2_EN
- | (format << 8)
+ save->crtc2_gen_cntl |= ((format << 8)
| RADEON_CRTC2_VSYNC_DIS
| RADEON_CRTC2_HSYNC_DIS
| RADEON_CRTC2_DISP_DIS
diff --git a/src/legacy_output.c b/src/legacy_output.c
index 423a3e2..7134ee1 100644
--- a/src/legacy_output.c
+++ b/src/legacy_output.c
@@ -150,7 +150,6 @@ void
RADEONGetExtTMDSInfo(ScrnInfoPtr pScrn, radeon_dvo_ptr dvo)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
- I2CBusPtr pDVOBus;
if (!info->IsAtomBios) {
#if defined(__powerpc__)
@@ -162,11 +161,11 @@ RADEONGetExtTMDSInfo(ScrnInfoPtr pScrn, radeon_dvo_ptr dvo)
dvo->dvo_i2c_slave_addr = 0x70;
}
#endif
- if (RADEONI2CInit(pScrn, &pDVOBus, "DVO", &dvo->dvo_i2c)) {
+ if (RADEONI2CInit(pScrn, &dvo->pI2CBus, "DVO", &dvo->dvo_i2c)) {
dvo->DVOChip =
- RADEONDVODeviceInit(pDVOBus, dvo->dvo_i2c_slave_addr);
+ RADEONDVODeviceInit(dvo->pI2CBus, dvo->dvo_i2c_slave_addr);
if (!dvo->DVOChip)
- xfree(pDVOBus);
+ xfree(dvo->pI2CBus);
}
}
}
@@ -481,7 +480,7 @@ RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output)
if (!dvo->DVOChip)
return;
- RADEONI2CDoLock(output, TRUE);
+ RADEONI2CDoLock(output, dvo->pI2CBus, TRUE);
if (!RADEONInitExtTMDSInfoFromBIOS(output)) {
if (dvo->DVOChip) {
switch(info->ext_tmds_chip) {
@@ -511,7 +510,7 @@ RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output)
}
}
}
- RADEONI2CDoLock(output, FALSE);
+ RADEONI2CDoLock(output, dvo->pI2CBus, FALSE);
}
#if 0
diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv
index b361d9d..51dafee 100644
--- a/src/pcidb/ati_pciids.csv
+++ b/src/pcidb/ati_pciids.csv
@@ -61,6 +61,8 @@
"0x4A4E","R420_JN","R420",1,,,,,"ATI Radeon Mobility 9800 (M18) JN (AGP)"
"0x4A4F","R420_4A4F","R420",,,,,,"ATI Radeon X800 SE (R420) (AGP)"
"0x4A50","R420_JP","R420",,,,,,"ATI Radeon X800XT (R420) JP (AGP)"
+"0x4A54","R420_JT","R420",,,,,,"ATI Radeon X800 VE (R420) JT (AGP)"
+"0x4B48","R481_4B48","R420",,,,,,"ATI Radeon X850 (R480) (AGP)"
"0x4B49","R481_4B49","R420",,,,,,"ATI Radeon X850 XT (R480) (AGP)"
"0x4B4A","R481_4B4A","R420",,,,,,"ATI Radeon X850 SE (R480) (AGP)"
"0x4B4B","R481_4B4B","R420",,,,,,"ATI Radeon X850 PRO (R480) (AGP)"
@@ -335,6 +337,7 @@
"0x9440","RV770_9440","RV770",,,,,,"ATI Radeon 4800 Series"
"0x9441","RV770_9441","RV770",,,,,,"ATI Radeon HD 4870 x2"
"0x9442","RV770_9442","RV770",,,,,,"ATI Radeon 4800 Series"
+"0x9443","RV770_9443","RV770",,,,,,"ATI Radeon HD 4850 x2"
"0x9444","RV770_9444","RV770",,,,,,"ATI FirePro V8750 (FireGL)"
"0x9446","RV770_9446","RV770",,,,,,"ATI FirePro V7760 (FireGL)"
"0x944A","RV770_944A","RV770",1,,,,,"ATI Mobility RADEON HD 4850"
diff --git a/src/r600_state.h b/src/r600_state.h
index 181e167..44e7600 100644
--- a/src/r600_state.h
+++ b/src/r600_state.h
@@ -195,10 +195,10 @@ do { \
do { \
if ((reg) >= SET_CONFIG_REG_offset && (reg) < SET_CONFIG_REG_end) { \
PACK3((ib), IT_SET_CONFIG_REG, (num) + 1); \
- E32(ib, ((reg) - SET_CONFIG_REG_offset) >> 2); \
+ E32(ib, ((reg) - SET_CONFIG_REG_offset) >> 2); \
} else if ((reg) >= SET_CONTEXT_REG_offset && (reg) < SET_CONTEXT_REG_end) { \
- PACK3((ib), IT_SET_CONTEXT_REG, (num) + 1); \
- E32(ib, ((reg) - 0x28000) >> 2); \
+ PACK3((ib), IT_SET_CONTEXT_REG, (num) + 1); \
+ E32(ib, ((reg) - SET_CONTEXT_REG_offset) >> 2); \
} else if ((reg) >= SET_ALU_CONST_offset && (reg) < SET_ALU_CONST_end) { \
PACK3((ib), IT_SET_ALU_CONST, (num) + 1); \
E32(ib, ((reg) - SET_ALU_CONST_offset) >> 2); \
diff --git a/src/radeon.h b/src/radeon.h
index d488429..c923793 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -318,7 +318,6 @@ typedef enum {
CHIP_FAMILY_RS690,
CHIP_FAMILY_RS740,
CHIP_FAMILY_R600, /* r600 */
- CHIP_FAMILY_R630,
CHIP_FAMILY_RV610,
CHIP_FAMILY_RV630,
CHIP_FAMILY_RV670,
@@ -1115,7 +1114,7 @@ extern void RADEONPrintPortMap(ScrnInfoPtr pScrn);
extern void RADEONSetOutputType(ScrnInfoPtr pScrn,
RADEONOutputPrivatePtr radeon_output);
extern Bool RADEONSetupConnectors(ScrnInfoPtr pScrn);
-extern Bool RADEONI2CDoLock(xf86OutputPtr output, Bool lock_state);
+extern Bool RADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, Bool lock_state);
/* radeon_tv.c */
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index a9a4848..f90b386 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -87,6 +87,8 @@
#include "radeon_drm.h"
#endif
+#include "ati_pciids_gen.h"
+
/* Line support */
#include "miline.h"
@@ -481,12 +483,17 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
}
}
+ /* RV410 SE cards only have 1 quadpipe */
+ if ((info->Chipset == PCI_CHIP_RV410_5E4C) ||
+ (info->Chipset == PCI_CHIP_RV410_5E4F))
+ info->accel_state->num_gb_pipes = 1;
+
if (IS_R300_3D || IS_R500_3D)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"num quad-pipes is %d\n", info->accel_state->num_gb_pipes);
if (IS_R300_3D || IS_R500_3D) {
- uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
+ uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c
index a657fac..10158a8 100644
--- a/src/radeon_atombios.c
+++ b/src/radeon_atombios.c
@@ -1534,6 +1534,7 @@ static void RADEONApplyATOMQuirks(ScrnInfoPtr pScrn, int index)
info->BiosConnector[index].ConnectorType = CONNECTOR_DVI_D;
}
}
+
/* a-bit f-i90hd - ciaranm on #radeonhd - this board has no DVI */
if ((info->Chipset == PCI_CHIP_RS600_7941) &&
(PCI_SUB_VENDOR_ID(info->PciInfo) == 0x147b) &&
@@ -1761,17 +1762,17 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
ATOM_DISPLAY_OBJECT_PATH *path;
addr += path_size;
path = (ATOM_DISPLAY_OBJECT_PATH *)addr;
- path_size += path->usSize;
+ path_size += le16_to_cpu(path->usSize);
- if (device_support & path->usDeviceTag) {
+ if (device_support & le16_to_cpu(path->usDeviceTag)) {
uint8_t con_obj_id, con_obj_num, con_obj_type;
- con_obj_id = (path->usConnObjectId & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
- con_obj_num = (path->usConnObjectId & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
- con_obj_type = (path->usConnObjectId & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
+ con_obj_id = (le16_to_cpu(path->usConnObjectId) & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
+ con_obj_num = (le16_to_cpu(path->usConnObjectId) & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
+ con_obj_type = (le16_to_cpu(path->usConnObjectId) & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
- if ((path->usDeviceTag == ATOM_DEVICE_TV1_SUPPORT) ||
- (path->usDeviceTag == ATOM_DEVICE_TV2_SUPPORT)) {
+ if ((le16_to_cpu(path->usDeviceTag) == ATOM_DEVICE_TV1_SUPPORT) ||
+ (le16_to_cpu(path->usDeviceTag) == ATOM_DEVICE_TV2_SUPPORT)) {
if (!enable_tv) {
info->BiosConnector[i].valid = FALSE;
continue;
@@ -1779,7 +1780,7 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
}
/* don't support CV yet */
- if (path->usDeviceTag == ATOM_DEVICE_CV_SUPPORT) {
+ if (le16_to_cpu(path->usDeviceTag) == ATOM_DEVICE_CV_SUPPORT) {
info->BiosConnector[i].valid = FALSE;
continue;
}
@@ -1810,15 +1811,15 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
continue;
} else
info->BiosConnector[i].valid = TRUE;
- info->BiosConnector[i].devices = path->usDeviceTag;
- info->BiosConnector[i].connector_object = path->usConnObjectId;
+ info->BiosConnector[i].devices = le16_to_cpu(path->usDeviceTag);
+ info->BiosConnector[i].connector_object = le16_to_cpu(path->usConnObjectId);
- for (j = 0; j < ((path->usSize - 8) / 2); j++) {
+ for (j = 0; j < ((le16_to_cpu(path->usSize) - 8) / 2); j++) {
uint8_t enc_obj_id, enc_obj_num, enc_obj_type;
- enc_obj_id = (path->usGraphicObjIds[j] & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
- enc_obj_num = (path->usGraphicObjIds[j] & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
- enc_obj_type = (path->usGraphicObjIds[j] & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
+ enc_obj_id = (le16_to_cpu(path->usGraphicObjIds[j]) & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
+ enc_obj_num = (le16_to_cpu(path->usGraphicObjIds[j]) & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
+ enc_obj_type = (le16_to_cpu(path->usGraphicObjIds[j]) & OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
if (enc_obj_type == GRAPH_OBJECT_TYPE_ENCODER) {
if (enc_obj_num == 2)
@@ -1826,15 +1827,15 @@ RADEONGetATOMConnectorInfoFromBIOSObject (ScrnInfoPtr pScrn)
else
info->BiosConnector[i].linkb = FALSE;
- if (!radeon_add_encoder(pScrn, enc_obj_id, path->usDeviceTag))
+ if (!radeon_add_encoder(pScrn, enc_obj_id, le16_to_cpu(path->usDeviceTag)))
return FALSE;
}
}
/* look up gpio for ddc */
- if ((path->usDeviceTag & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) == 0) {
+ if ((le16_to_cpu(path->usDeviceTag) & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) == 0) {
for (j = 0; j < con_obj->ucNumberOfObjects; j++) {
- if (path->usConnObjectId == le16_to_cpu(con_obj->asObjects[j].usObjectID)) {
+ if (le16_to_cpu(path->usConnObjectId) == le16_to_cpu(con_obj->asObjects[j].usObjectID)) {
ATOM_COMMON_RECORD_HEADER *Record = (ATOM_COMMON_RECORD_HEADER *)
((char *)&atomDataPtr->Object_Header->sHeader
+ le16_to_cpu(con_obj->asObjects[j].usRecordOffset));
@@ -2240,8 +2241,11 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable (ScrnInfoPtr pScrn)
info->BiosConnector[i].ddc_i2c.valid = FALSE;
else if ((info->ChipFamily == CHIP_FAMILY_RS690) ||
(info->ChipFamily == CHIP_FAMILY_RS740)) {
- /* IGP DFP ports use non-standard gpio entries */
- if ((i == ATOM_DEVICE_DFP2_INDEX) || (i == ATOM_DEVICE_DFP3_INDEX))
+ /* IGP DFP ports sometimes use non-standard gpio entries */
+ if ((i == ATOM_DEVICE_DFP2_INDEX) && (ci.sucI2cId.sbfAccess.bfI2C_LineMux == 2))
+ info->BiosConnector[i].ddc_i2c =
+ RADEONLookupGPIOLineForDDC(pScrn, ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1);
+ else if ((i == ATOM_DEVICE_DFP3_INDEX) && (ci.sucI2cId.sbfAccess.bfI2C_LineMux == 1))
info->BiosConnector[i].ddc_i2c =
RADEONLookupGPIOLineForDDC(pScrn, ci.sucI2cId.sbfAccess.bfI2C_LineMux + 1);
else
@@ -2303,6 +2307,8 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable (ScrnInfoPtr pScrn)
((j == ATOM_DEVICE_CRT1_INDEX) ||
(j == ATOM_DEVICE_CRT2_INDEX))) {
info->BiosConnector[i].devices |= info->BiosConnector[j].devices;
+ if (info->BiosConnector[i].ConnectorType == CONNECTOR_DVI_D)
+ info->BiosConnector[i].ConnectorType = CONNECTOR_DVI_I;
info->BiosConnector[j].valid = FALSE;
} else if (((j == ATOM_DEVICE_DFP1_INDEX) ||
(j == ATOM_DEVICE_DFP2_INDEX) ||
@@ -2310,6 +2316,8 @@ RADEONGetATOMConnectorInfoFromBIOSConnectorTable (ScrnInfoPtr pScrn)
((i == ATOM_DEVICE_CRT1_INDEX) ||
(i == ATOM_DEVICE_CRT2_INDEX))) {
info->BiosConnector[j].devices |= info->BiosConnector[i].devices;
+ if (info->BiosConnector[j].ConnectorType == CONNECTOR_DVI_D)
+ info->BiosConnector[j].ConnectorType = CONNECTOR_DVI_I;
info->BiosConnector[i].valid = FALSE;
} else {
info->BiosConnector[i].shared_ddc = TRUE;
diff --git a/src/radeon_bios.c b/src/radeon_bios.c
index 9b5cb88..2bacc40 100644
--- a/src/radeon_bios.c
+++ b/src/radeon_bios.c
@@ -273,6 +273,7 @@ radeon_card_posted(ScrnInfoPtr pScrn)
unsigned char *RADEONMMIO = info->MMIO;
uint32_t reg;
+ /* first check CRTCs */
if (IS_AVIVO_VARIANT) {
reg = INREG(AVIVO_D1CRTC_CONTROL) | INREG(AVIVO_D2CRTC_CONTROL);
if (reg & AVIVO_CRTC_EN)
@@ -283,6 +284,15 @@ radeon_card_posted(ScrnInfoPtr pScrn)
return TRUE;
}
+ /* then check MEM_SIZE, in case something turned the crtcs off */
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ reg = INREG(R600_CONFIG_MEMSIZE);
+ else
+ reg = INREG(RADEON_CONFIG_MEMSIZE);
+
+ if (reg)
+ return TRUE;
+
return FALSE;
}
diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h
index 6321246..7b2512a 100644
--- a/src/radeon_chipinfo_gen.h
+++ b/src/radeon_chipinfo_gen.h
@@ -40,6 +40,8 @@ RADEONCardInfo RADEONCards[] = {
{ 0x4A4E, CHIP_FAMILY_R420, 1, 0, 0, 0, 0 },
{ 0x4A4F, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
{ 0x4A50, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4A54, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
+ { 0x4B48, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
{ 0x4B49, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
{ 0x4B4A, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
{ 0x4B4B, CHIP_FAMILY_R420, 0, 0, 0, 0, 0 },
@@ -254,6 +256,7 @@ RADEONCardInfo RADEONCards[] = {
{ 0x9440, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9441, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9442, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
+ { 0x9443, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9444, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x9446, CHIP_FAMILY_RV770, 0, 0, 0, 0, 0 },
{ 0x944A, CHIP_FAMILY_RV770, 1, 0, 0, 0, 0 },
diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h
index 631eda8..70b9ff6 100644
--- a/src/radeon_chipset_gen.h
+++ b/src/radeon_chipset_gen.h
@@ -40,6 +40,8 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_R420_JN, "ATI Radeon Mobility 9800 (M18) JN (AGP)" },
{ PCI_CHIP_R420_4A4F, "ATI Radeon X800 SE (R420) (AGP)" },
{ PCI_CHIP_R420_JP, "ATI Radeon X800XT (R420) JP (AGP)" },
+ { PCI_CHIP_R420_JT, "ATI Radeon X800 VE (R420) JT (AGP)" },
+ { PCI_CHIP_R481_4B48, "ATI Radeon X850 (R480) (AGP)" },
{ PCI_CHIP_R481_4B49, "ATI Radeon X850 XT (R480) (AGP)" },
{ PCI_CHIP_R481_4B4A, "ATI Radeon X850 SE (R480) (AGP)" },
{ PCI_CHIP_R481_4B4B, "ATI Radeon X850 PRO (R480) (AGP)" },
@@ -254,6 +256,7 @@ static SymTabRec RADEONChipsets[] = {
{ PCI_CHIP_RV770_9440, "ATI Radeon 4800 Series" },
{ PCI_CHIP_RV770_9441, "ATI Radeon HD 4870 x2" },
{ PCI_CHIP_RV770_9442, "ATI Radeon 4800 Series" },
+ { PCI_CHIP_RV770_9443, "ATI Radeon HD 4850 x2" },
{ PCI_CHIP_RV770_9444, "ATI FirePro V8750 (FireGL)" },
{ PCI_CHIP_RV770_9446, "ATI FirePro V7760 (FireGL)" },
{ PCI_CHIP_RV770_944A, "ATI Mobility RADEON HD 4850" },
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index a9bc7d2..13b6533 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -69,7 +69,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
- gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16);
+ gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
switch(info->accel_state->num_gb_pipes) {
case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
@@ -105,21 +105,21 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
- OUT_ACCEL_REG(R300_GB_MSPOS0, ((8 << R300_MS_X0_SHIFT) |
- (8 << R300_MS_Y0_SHIFT) |
- (8 << R300_MS_X1_SHIFT) |
- (8 << R300_MS_Y1_SHIFT) |
- (8 << R300_MS_X2_SHIFT) |
- (8 << R300_MS_Y2_SHIFT) |
- (8 << R300_MSBD0_Y_SHIFT) |
- (7 << R300_MSBD0_X_SHIFT)));
- OUT_ACCEL_REG(R300_GB_MSPOS1, ((8 << R300_MS_X3_SHIFT) |
- (8 << R300_MS_Y3_SHIFT) |
- (8 << R300_MS_X4_SHIFT) |
- (8 << R300_MS_Y4_SHIFT) |
- (8 << R300_MS_X5_SHIFT) |
- (8 << R300_MS_Y5_SHIFT) |
- (8 << R300_MSBD1_SHIFT)));
+ OUT_ACCEL_REG(R300_GB_MSPOS0, ((6 << R300_MS_X0_SHIFT) |
+ (6 << R300_MS_Y0_SHIFT) |
+ (6 << R300_MS_X1_SHIFT) |
+ (6 << R300_MS_Y1_SHIFT) |
+ (6 << R300_MS_X2_SHIFT) |
+ (6 << R300_MS_Y2_SHIFT) |
+ (6 << R300_MSBD0_Y_SHIFT) |
+ (6 << R300_MSBD0_X_SHIFT)));
+ OUT_ACCEL_REG(R300_GB_MSPOS1, ((6 << R300_MS_X3_SHIFT) |
+ (6 << R300_MS_Y3_SHIFT) |
+ (6 << R300_MS_X4_SHIFT) |
+ (6 << R300_MS_Y4_SHIFT) |
+ (6 << R300_MS_X5_SHIFT) |
+ (6 << R300_MS_Y5_SHIFT) |
+ (6 << R300_MSBD1_SHIFT)));
FINISH_ACCEL();
BEGIN_ACCEL(5);
@@ -552,10 +552,10 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5);
if (IS_R300_3D) {
/* clip has offset 1440 */
- OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) |
- (1088 << R300_CLIP_Y_SHIFT)));
- OUT_ACCEL_REG(R300_SC_CLIP_0_B, (((1080 + 2920) << R300_CLIP_X_SHIFT) |
- ((1080 + 2920) << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1440 << R300_CLIP_X_SHIFT) |
+ (1440 << R300_CLIP_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_CLIP_0_B, ((4080 << R300_CLIP_X_SHIFT) |
+ (4080 << R300_CLIP_Y_SHIFT)));
} else {
OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((0 << R300_CLIP_X_SHIFT) |
(0 << R300_CLIP_Y_SHIFT)));
diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c
index 4b508ce..6080e7e 100644
--- a/src/radeon_crtc.c
+++ b/src/radeon_crtc.c
@@ -77,6 +77,9 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
if ((mode == DPMSModeOn) && radeon_crtc->enabled)
return;
+ if (mode == DPMSModeOff)
+ radeon_crtc_modeset_ioctl(crtc, FALSE);
+
if (IS_AVIVO_VARIANT || info->r4xx_atom) {
atombios_crtc_dpms(crtc, mode);
} else {
@@ -97,6 +100,11 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode)
}
}
+ if (mode != DPMSModeOff) {
+ radeon_crtc_modeset_ioctl(crtc, TRUE);
+ radeon_crtc_load_lut(crtc);
+ }
+
if (mode == DPMSModeOn)
radeon_crtc->enabled = TRUE;
else
@@ -115,9 +123,6 @@ radeon_crtc_mode_prepare(xf86CrtcPtr crtc)
{
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
- if (radeon_crtc->initialized)
- radeon_crtc_dpms(crtc, DPMSModeOff);
-
if (radeon_crtc->enabled)
crtc->funcs->hide_cursor(crtc);
}
@@ -286,8 +291,6 @@ radeon_crtc_mode_commit(xf86CrtcPtr crtc)
{
if (crtc->scrn->pScreen != NULL)
xf86_reload_cursors(crtc->scrn->pScreen);
-
- radeon_crtc_dpms(crtc, DPMSModeOn);
}
void
diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c
index 0fcdcf0..5ecdfad 100644
--- a/src/radeon_cursor.c
+++ b/src/radeon_cursor.c
@@ -73,14 +73,17 @@
#define CURSOR_SWAPPING_DECL_MMIO unsigned char *RADEONMMIO = info->MMIO;
#define CURSOR_SWAPPING_START() \
do { \
+ if (info->ChipFamily < CHIP_FAMILY_R600) \
OUTREG(RADEON_SURFACE_CNTL, \
(info->ModeReg->surface_cntl | \
RADEON_NONSURF_AP0_SWP_32BPP | RADEON_NONSURF_AP1_SWP_32BPP) & \
~(RADEON_NONSURF_AP0_SWP_16BPP | RADEON_NONSURF_AP1_SWP_16BPP)); \
} while (0)
-#define CURSOR_SWAPPING_END() (OUTREG(RADEON_SURFACE_CNTL, \
- info->ModeReg->surface_cntl))
-
+#define CURSOR_SWAPPING_END() \
+ do { \
+ if (info->ChipFamily < CHIP_FAMILY_R600) \
+ OUTREG(RADEON_SURFACE_CNTL, info->ModeReg->surface_cntl); \
+ } while (0)
#else
#define CURSOR_SWAPPING_DECL_MMIO
@@ -97,13 +100,14 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Bool enable)
RADEONInfoPtr info = RADEONPTR(crtc->scrn);
unsigned char *RADEONMMIO = info->MMIO;
- OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, 0);
+ /* always use the same cursor mode even if the cursor is disabled,
+ * otherwise you may end up with cursor curruption bands
+ */
+ OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
if (enable) {
OUTREG(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset);
- OUTREG(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
- ((CURSOR_WIDTH - 1) << 16) | (CURSOR_HEIGHT - 1));
OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
AVIVO_D1CURSOR_EN | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
}
@@ -138,9 +142,6 @@ radeon_crtc_show_cursor (xf86CrtcPtr crtc)
if (IS_AVIVO_VARIANT) {
avivo_lock_cursor(crtc, TRUE);
- OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
- INREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset)
- | AVIVO_D1CURSOR_EN);
avivo_setup_cursor(crtc, TRUE);
avivo_lock_cursor(crtc, FALSE);
} else {
@@ -171,9 +172,6 @@ radeon_crtc_hide_cursor (xf86CrtcPtr crtc)
if (IS_AVIVO_VARIANT) {
avivo_lock_cursor(crtc, TRUE);
- OUTREG(AVIVO_D1CUR_CONTROL+ radeon_crtc->crtc_offset,
- INREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset)
- & ~(AVIVO_D1CURSOR_EN));
avivo_setup_cursor(crtc, FALSE);
avivo_lock_cursor(crtc, FALSE);
} else {
@@ -196,6 +194,7 @@ void
radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y)
{
ScrnInfoPtr pScrn = crtc->scrn;
+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
int crtc_id = radeon_crtc->crtc_id;
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -210,15 +209,38 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y)
if (yorigin >= CURSOR_HEIGHT) yorigin = CURSOR_HEIGHT - 1;
if (IS_AVIVO_VARIANT) {
+ int w = CURSOR_WIDTH;
+
/* avivo cursor spans the full fb width */
if (crtc->rotatedData == NULL) {
x += crtc->x;
y += crtc->y;
}
+
+ if (pRADEONEnt->Controller[0]->enabled &&
+ pRADEONEnt->Controller[1]->enabled) {
+ int cursor_end, frame_end;
+
+ cursor_end = x - xorigin + w;
+ frame_end = crtc->x + mode->CrtcHDisplay;
+
+ if (cursor_end >= frame_end) {
+ w = w - (cursor_end - frame_end);
+ if (!(frame_end & 0x7f))
+ w--;
+ } else {
+ if (!(cursor_end & 0x7f))
+ w--;
+ }
+ if (w <= 0)
+ w = 1;
+ }
+
avivo_lock_cursor(crtc, TRUE);
OUTREG(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, ((xorigin ? 0 : x) << 16)
| (yorigin ? 0 : y));
OUTREG(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);
+ OUTREG(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, ((w - 1) << 16) | (CURSOR_HEIGHT - 1));
avivo_lock_cursor(crtc, FALSE);
} else {
if (mode->Flags & V_DBLSCAN)
@@ -320,23 +342,17 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
RADEONInfoPtr info = RADEONPTR(pScrn);
+ unsigned char *RADEONMMIO = info->MMIO;
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
- int width;
- int width_bytes;
- int height;
- int size_bytes;
int c;
- size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
- width = pScrn->displayWidth;
- width_bytes = width * (pScrn->bitsPerPixel / 8);
- height = ((size_bytes * xf86_config->num_crtc) + width_bytes - 1) / width_bytes;
- int align = IS_AVIVO_VARIANT ? 4096 : 256;
+ for (c = 0; c < xf86_config->num_crtc; c++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[c];
+ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
- if (!info->useEXA) {
- for (c = 0; c < xf86_config->num_crtc; c++) {
- xf86CrtcPtr crtc = xf86_config->crtc[c];
- RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
+ if (!info->useEXA) {
+ int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
+ int align = IS_AVIVO_VARIANT ? 4096 : 256;
radeon_crtc->cursor_offset =
radeon_legacy_allocate_memory(pScrn, &radeon_crtc->cursor_mem, size_bytes, align);
@@ -350,6 +366,10 @@ Bool RADEONCursorInit(ScreenPtr pScreen)
c,
(unsigned int)radeon_crtc->cursor_offset);
}
+ /* set the cursor mode the same on both crtcs to avoid corruption */
+ if (IS_AVIVO_VARIANT)
+ OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
+ (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
}
return xf86_cursors_init (pScreen, CURSOR_WIDTH, CURSOR_HEIGHT,
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index f6c6261..19f7abe 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1556,12 +1556,13 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
info->dri->pDRIInfo = pDRIInfo;
pDRIInfo->drmDriverName = RADEON_DRIVER_NAME;
- if ( (info->ChipFamily >= CHIP_FAMILY_R300) ) {
+ if ( (info->ChipFamily >= CHIP_FAMILY_R600) )
+ pDRIInfo->clientDriverName = R600_DRIVER_NAME;
+ else if ( (info->ChipFamily >= CHIP_FAMILY_R300) )
pDRIInfo->clientDriverName = R300_DRIVER_NAME;
- } else
- if ( info->ChipFamily >= CHIP_FAMILY_R200 )
+ else if ( info->ChipFamily >= CHIP_FAMILY_R200 )
pDRIInfo->clientDriverName = R200_DRIVER_NAME;
- else
+ else
pDRIInfo->clientDriverName = RADEON_DRIVER_NAME;
if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 8673f5e..83a3374 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1814,16 +1814,6 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn)
break;
}
- if (info->ChipFamily >= CHIP_FAMILY_R600) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "R600 support is mostly incomplete and very experimental\n");
- }
-
- if ((info->ChipFamily >= CHIP_FAMILY_RV515) && (info->ChipFamily < CHIP_FAMILY_R600)) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "R500 support is under development. Please report any issues to xorg-driver-ati at lists.x.org\n");
- }
-
from = X_PROBED;
info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffULL;
pScrn->memPhysBase = info->LinearAddr;
@@ -2778,7 +2768,6 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
xf86Int10InfoPtr pInt10 = NULL;
void *int10_save = NULL;
const char *s;
- int crtc_max_X, crtc_max_Y;
RADEONEntPtr pRADEONEnt;
DevUnion* pPriv;
@@ -2984,51 +2973,10 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
RADEONPreInitColorTiling(pScrn);
- /* we really need an FB manager... */
- if (pScrn->display->virtualX) {
- crtc_max_X = pScrn->display->virtualX;
- crtc_max_Y = pScrn->display->virtualY;
- if (info->allowColorTiling) {
- if (crtc_max_X > info->MaxSurfaceWidth ||
- crtc_max_Y > info->MaxLines) {
- info->allowColorTiling = FALSE;
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Requested desktop size exceeds surface limts for tiling, ColorTiling disabled\n");
- }
- }
- if (crtc_max_X > 8192)
- crtc_max_X = 8192;
- if (crtc_max_Y > 8192)
- crtc_max_Y = 8192;
- } else {
- /*
- * note that these aren't really the CRTC limits, they're just
- * heuristics until we have a better memory manager.
- */
- if (pScrn->videoRam <= 16384) {
- crtc_max_X = 1600;
- crtc_max_Y = 1200;
- } else if (IS_R300_VARIANT) {
- crtc_max_X = 2560;
- crtc_max_Y = 1200;
- } else if (IS_AVIVO_VARIANT) {
- crtc_max_X = 2560;
- crtc_max_Y = 1600;
- } else {
- crtc_max_X = 2048;
- crtc_max_Y = 1200;
- }
- }
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Max desktop size set to %dx%d\n",
- crtc_max_X, crtc_max_Y);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "For a larger or smaller max desktop size, add a Virtual line to your xorg.conf\n");
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "If you are having trouble with 3D, "
- "reduce the desktop size by adjusting the Virtual line to your xorg.conf\n");
-
- /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/
- xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y);
+ if (IS_AVIVO_VARIANT)
+ xf86CrtcSetSizeRange (pScrn, 320, 200, 8192, 8192);
+ else
+ xf86CrtcSetSizeRange (pScrn, 320, 200, 4096, 4096);
RADEONPreInitDDC(pScrn);
@@ -3764,6 +3712,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
}
}
+ /* Clear the framebuffer */
+ memset(info->FB + pScrn->fbOffset, 0,
+ pScrn->virtualY * pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
+
/* set the modes with desired rotation, etc. */
if (!xf86SetDesiredModes (pScrn))
return FALSE;
@@ -5660,6 +5612,10 @@ Bool RADEONEnterVT(int scrnIndex, int flags)
pScrn->vtSema = TRUE;
+ /* Clear the framebuffer */
+ memset(info->FB + pScrn->fbOffset, 0,
+ pScrn->virtualY * pScrn->displayWidth * info->CurrentLayout.pixel_bytes);
+
if (!xf86SetDesiredModes(pScrn))
return FALSE;
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
index 59cb46f..482abcd 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
@@ -532,11 +532,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n");
info->accel_state->exa->maxPitchBytes = 16320;
- info->accel_state->exa->maxX = 8192;
+ info->accel_state->exa->maxX = 8191;
#else
info->accel_state->exa->maxX = 16320 / 4;
#endif
- info->accel_state->exa->maxY = 8192;
+ info->accel_state->exa->maxY = 8191;
if (xf86ReturnOptValBool(info->Options, OPTION_EXA_VSYNC, FALSE)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EXA VSync enabled\n");
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 571204a..effcd89 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1492,7 +1492,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
R300_ALU_CODE_SIZE(0) |
@@ -1514,7 +1514,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
R300_ALU_CODE_SIZE(0) |
@@ -1741,7 +1741,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
R300_RS_COUNT_HIRES_EN));
/* 2 RS instructions: 1 for tex0 (src), 1 for tex1 (mask) */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
R500_US_CODE_END_ADDR(2)));
@@ -1753,7 +1753,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
R500_US_CODE_END_ADDR(1)));
@@ -1933,8 +1933,12 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
/* Clear out scissoring */
BEGIN_ACCEL(2);
- OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
- (0 << R300_SCISSOR_Y_SHIFT)));
+ if (IS_R300_3D)
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) |
+ (1440 << R300_SCISSOR_Y_SHIFT)));
+ else
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
+ (0 << R300_SCISSOR_Y_SHIFT)));
OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) |
(8191 << R300_SCISSOR_Y_SHIFT)));
FINISH_ACCEL();
diff --git a/src/radeon_output.c b/src/radeon_output.c
index 712ac5f..ee8de6a 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -219,24 +219,12 @@ radeon_ddc_connected(xf86OutputPtr output)
RADEONOutputPrivatePtr radeon_output = output->driver_private;
if (radeon_output->pI2CBus) {
- /* RV410 RADEON_GPIO_VGA_DDC seems to only work via hw i2c
- * We may want to extend this to other cases if the need arises...
- */
- if ((info->ChipFamily == CHIP_FAMILY_RV410) &&
- (radeon_output->ddc_i2c.mask_clk_reg == RADEON_GPIO_VGA_DDC) &&
- info->IsAtomBios)
- MonInfo = radeon_atom_get_edid(output);
- else if (info->get_hardcoded_edid_from_bios) {
+ if (info->get_hardcoded_edid_from_bios)
MonInfo = RADEONGetHardCodedEDIDFromBIOS(output);
- if (MonInfo == NULL) {
- RADEONI2CDoLock(output, TRUE);
- MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
- RADEONI2CDoLock(output, FALSE);
- }
- } else {
- RADEONI2CDoLock(output, TRUE);
+ if (MonInfo == NULL) {
+ RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE);
MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
- RADEONI2CDoLock(output, FALSE);
+ RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE);
}
}
if (MonInfo) {
@@ -520,8 +508,32 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
static void
radeon_mode_prepare(xf86OutputPtr output)
{
+ RADEONInfoPtr info = RADEONPTR(output->scrn);
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
+ int o;
+
+ for (o = 0; o < config->num_output; o++) {
+ xf86OutputPtr loop_output = config->output[o];
+ if (loop_output == output)
+ continue;
+ else if (loop_output->crtc) {
+ xf86CrtcPtr other_crtc = loop_output->crtc;
+ RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
+ if (other_crtc->enabled) {
+ if (other_radeon_crtc->initialized) {
+ radeon_crtc_dpms(other_crtc, DPMSModeOff);
+ if (IS_AVIVO_VARIANT || info->r4xx_atom)
+ atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1);
+ radeon_dpms(loop_output, DPMSModeOff);
+ }
+ }
+ }
+ }
+
radeon_bios_output_lock(output, TRUE);
radeon_dpms(output, DPMSModeOff);
+ radeon_crtc_dpms(output->crtc, DPMSModeOff);
+
}
static void
@@ -541,7 +553,30 @@ radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
static void
radeon_mode_commit(xf86OutputPtr output)
{
+ RADEONInfoPtr info = RADEONPTR(output->scrn);
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
+ int o;
+
+ for (o = 0; o < config->num_output; o++) {
+ xf86OutputPtr loop_output = config->output[o];
+ if (loop_output == output)
+ continue;
+ else if (loop_output->crtc) {
+ xf86CrtcPtr other_crtc = loop_output->crtc;
+ RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
+ if (other_crtc->enabled) {
+ if (other_radeon_crtc->initialized) {
+ radeon_crtc_dpms(other_crtc, DPMSModeOn);
+ if (IS_AVIVO_VARIANT || info->r4xx_atom)
+ atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0);
+ radeon_dpms(loop_output, DPMSModeOn);
+ }
+ }
+ }
+ }
+
radeon_dpms(output, DPMSModeOn);
+ radeon_crtc_dpms(output->crtc, DPMSModeOn);
radeon_bios_output_lock(output, FALSE);
}
@@ -1174,7 +1209,7 @@ radeon_create_resources(xf86OutputPtr output)
}
}
- if ((!IS_AVIVO_VARIANT) && (radeon_output->devices & (ATOM_DEVICE_DFP2_SUPPORT))) {
+ if ((!IS_AVIVO_VARIANT) && (radeon_output->devices & (ATOM_DEVICE_DFP1_SUPPORT))) {
tmds_pll_atom = MAKE_ATOM("tmds_pll");
err = RRConfigureOutputProperty(output->randr_output, tmds_pll_atom,
@@ -1608,16 +1643,27 @@ static const xf86OutputFuncsRec radeon_output_funcs = {
};
Bool
-RADEONI2CDoLock(xf86OutputPtr output, int lock_state)
+RADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state)
{
ScrnInfoPtr pScrn = output->scrn;
RADEONInfoPtr info = RADEONPTR(pScrn);
- RADEONOutputPrivatePtr radeon_output = output->driver_private;
- RADEONI2CBusPtr pRADEONI2CBus = radeon_output->pI2CBus->DriverPrivate.ptr;
+ RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr;
unsigned char *RADEONMMIO = info->MMIO;
uint32_t temp;
if (lock_state) {
+ /* RV410 appears to have a bug where the hw i2c in reset
+ * holds the i2c port in a bad state - switch hw i2c away before
+ * doing DDC - do this for all r200s/r300s for safety sakes */
+ if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT)) {
+ if (pRADEONI2CBus->mask_clk_reg == RADEON_GPIO_MONID)
+ OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
+ R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1)));
+ else
+ OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
+ R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
+ }
+
temp = INREG(pRADEONI2CBus->a_clk_reg);
temp &= ~(pRADEONI2CBus->a_clk_mask);
OUTREG(pRADEONI2CBus->a_clk_reg, temp);
diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h
index d61c57d..7765ee6 100644
--- a/src/radeon_pci_chipset_gen.h
+++ b/src/radeon_pci_chipset_gen.h
@@ -40,6 +40,8 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_R420_JN, PCI_CHIP_R420_JN, RES_SHARED_VGA },
{ PCI_CHIP_R420_4A4F, PCI_CHIP_R420_4A4F, RES_SHARED_VGA },
{ PCI_CHIP_R420_JP, PCI_CHIP_R420_JP, RES_SHARED_VGA },
+ { PCI_CHIP_R420_JT, PCI_CHIP_R420_JT, RES_SHARED_VGA },
+ { PCI_CHIP_R481_4B48, PCI_CHIP_R481_4B48, RES_SHARED_VGA },
{ PCI_CHIP_R481_4B49, PCI_CHIP_R481_4B49, RES_SHARED_VGA },
{ PCI_CHIP_R481_4B4A, PCI_CHIP_R481_4B4A, RES_SHARED_VGA },
{ PCI_CHIP_R481_4B4B, PCI_CHIP_R481_4B4B, RES_SHARED_VGA },
@@ -254,6 +256,7 @@ PciChipsets RADEONPciChipsets[] = {
{ PCI_CHIP_RV770_9440, PCI_CHIP_RV770_9440, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9441, PCI_CHIP_RV770_9441, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9442, PCI_CHIP_RV770_9442, RES_SHARED_VGA },
+ { PCI_CHIP_RV770_9443, PCI_CHIP_RV770_9443, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9444, PCI_CHIP_RV770_9444, RES_SHARED_VGA },
{ PCI_CHIP_RV770_9446, PCI_CHIP_RV770_9446, RES_SHARED_VGA },
{ PCI_CHIP_RV770_944A, PCI_CHIP_RV770_944A, RES_SHARED_VGA },
diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h
index a06b4a6..397cf63 100644
--- a/src/radeon_pci_device_match_gen.h
+++ b/src/radeon_pci_device_match_gen.h
@@ -40,6 +40,8 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_R420_JN, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R420_4A4F, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R420_JP, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_R420_JT, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_R481_4B48, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R481_4B49, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R481_4B4A, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_R481_4B4B, 0 ),
@@ -254,6 +256,7 @@ static const struct pci_id_match radeon_device_match[] = {
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9440, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9441, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9442, 0 ),
+ ATI_DEVICE_MATCH( PCI_CHIP_RV770_9443, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9444, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_9446, 0 ),
ATI_DEVICE_MATCH( PCI_CHIP_RV770_944A, 0 ),
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
index 6479972..3e4f47c 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
@@ -216,6 +216,7 @@ typedef struct _radeon_lvds {
typedef struct _radeon_dvo {
/* dvo */
+ I2CBusPtr pI2CBus;
I2CDevPtr DVOChip;
RADEONI2CBusRec dvo_i2c;
int dvo_i2c_slave_addr;
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index d74a30a..914fe51 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -936,11 +936,11 @@
#define RADEON_GENMO_WT 0x03c2 /* VGA */
#define RADEON_GENS0 0x03c2 /* VGA */
#define RADEON_GENS1 0x03da /* VGA, 0x03ba */
-#define RADEON_GPIO_MONID 0x0068 /* DDC interface via I2C */
+#define RADEON_GPIO_MONID 0x0068 /* DDC interface via I2C */ /* DDC3 */
#define RADEON_GPIO_MONIDB 0x006c
#define RADEON_GPIO_CRT2_DDC 0x006c
-#define RADEON_GPIO_DVI_DDC 0x0064
-#define RADEON_GPIO_VGA_DDC 0x0060
+#define RADEON_GPIO_DVI_DDC 0x0064 /* DDC2 */
+#define RADEON_GPIO_VGA_DDC 0x0060 /* DDC1 */
# define RADEON_GPIO_A_0 (1 << 0)
# define RADEON_GPIO_A_1 (1 << 1)
# define RADEON_GPIO_Y_0 (1 << 8)
@@ -979,24 +979,28 @@
/* Multimedia I2C bus */
#define RADEON_I2C_CNTL_0 0x0090
-#define RADEON_I2C_DONE (1<<0)
-#define RADEON_I2C_NACK (1<<1)
-#define RADEON_I2C_HALT (1<<2)
-#define RADEON_I2C_SOFT_RST (1<<5)
-#define RADEON_I2C_DRIVE_EN (1<<6)
-#define RADEON_I2C_DRIVE_SEL (1<<7)
-#define RADEON_I2C_START (1<<8)
-#define RADEON_I2C_STOP (1<<9)
-#define RADEON_I2C_RECEIVE (1<<10)
-#define RADEON_I2C_ABORT (1<<11)
-#define RADEON_I2C_GO (1<<12)
+#define RADEON_I2C_DONE (1 << 0)
+#define RADEON_I2C_NACK (1 << 1)
+#define RADEON_I2C_HALT (1 << 2)
+#define RADEON_I2C_SOFT_RST (1 << 5)
+#define RADEON_I2C_DRIVE_EN (1 << 6)
+#define RADEON_I2C_DRIVE_SEL (1 << 7)
+#define RADEON_I2C_START (1 << 8)
+#define RADEON_I2C_STOP (1 << 9)
+#define RADEON_I2C_RECEIVE (1 << 10)
+#define RADEON_I2C_ABORT (1 << 11)
+#define RADEON_I2C_GO (1 << 12)
#define RADEON_I2C_CNTL_1 0x0094
-#define RADEON_I2C_SEL (1<<16)
-#define RADEON_I2C_EN (1<<17)
+#define RADEON_I2C_SEL (1 << 16)
+#define RADEON_I2C_EN (1 << 17)
#define RADEON_I2C_DATA 0x0098
#define RADEON_DVI_I2C_CNTL_0 0x02e0
-#define RADEON_DVI_I2C_CNTL_1 0x02e4 /* ? */
+# define R200_DVI_I2C_PIN_SEL(x) ((x) << 3)
+# define R200_SEL_DDC1 0 /* 0x60 - VGA_DDC */
+# define R200_SEL_DDC2 1 /* 0x64 - DVI_DDC */
+# define R200_SEL_DDC3 2 /* 0x68 - MONID_DDC */
+#define RADEON_DVI_I2C_CNTL_1 0x02e4
#define RADEON_DVI_I2C_DATA 0x02e8
#define RADEON_INTERRUPT_LINE 0x0f3c /* PCI */
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 6cb2870..9f7cd4c 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -393,7 +393,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
/* Pixel stack frame size. */
OUT_ACCEL_REG(R300_US_PIXSIZE, 5);
@@ -770,7 +770,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
OUT_ACCEL_REG(R300_US_PIXSIZE, 2); /* highest temp used */
@@ -902,7 +902,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
@@ -975,7 +975,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));
/* Pixel stack frame size. */
OUT_ACCEL_REG(R300_US_PIXSIZE, 5);
@@ -1447,7 +1447,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) | R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));
/* Pixel stack frame size. */
OUT_ACCEL_REG(R300_US_PIXSIZE, 0); /* highest temp used */
@@ -2014,7 +2014,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
* We render a single, large triangle and use the scissor
* functionality to restrict it to the desired rectangle.
* Due to guardband limits on r3xx/r4xx, we can only use
- * the single triangle up to 2880 pixels; above that we
+ * the single triangle up to 4021 pixels; above that we
* render as a quad.
*/
@@ -2041,7 +2041,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
#endif
if (IS_R300_3D || IS_R500_3D) {
- if (IS_R300_3D && ((dstw+dsth) > 2880))
+ if (IS_R300_3D && ((dstw+dsth) > 4021))
use_quad = TRUE;
/*
* Set up the scissor area to that of the output size.
@@ -2049,10 +2049,10 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
BEGIN_ACCEL(2);
if (IS_R300_3D) {
/* R300 has an offset */
- OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX + 1088) << R300_SCISSOR_X_SHIFT) |
- ((dstY + 1088) << R300_SCISSOR_Y_SHIFT)));
- OUT_ACCEL_REG(R300_SC_SCISSOR1, (((dstX + dstw + 1088 - 1) << R300_SCISSOR_X_SHIFT) |
- ((dstY + dsth + 1088 - 1) << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX + 1440) << R300_SCISSOR_X_SHIFT) |
+ ((dstY + 1440) << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR1, (((dstX + dstw + 1440 - 1) << R300_SCISSOR_X_SHIFT) |
+ ((dstY + dsth + 1440 - 1) << R300_SCISSOR_Y_SHIFT)));
} else {
OUT_ACCEL_REG(R300_SC_SCISSOR0, (((dstX) << R300_SCISSOR_X_SHIFT) |
((dstY) << R300_SCISSOR_Y_SHIFT)));
diff --git a/src/radeon_version.h b/src/radeon_version.h
index 5717ead..129046d 100644
--- a/src/radeon_version.h
+++ b/src/radeon_version.h
@@ -38,6 +38,7 @@
#define RADEON_DRIVER_NAME "radeon"
#define R200_DRIVER_NAME "r200"
#define R300_DRIVER_NAME "r300"
+#define R600_DRIVER_NAME "r600"
#define RADEON_VERSION_MAJOR PACKAGE_VERSION_MAJOR
#define RADEON_VERSION_MINOR PACKAGE_VERSION_MINOR
radeon-kms-compat.patch:
--- NEW FILE radeon-kms-compat.patch ---
diff --git a/configure.ac b/configure.ac
index 4ddec1c..3da3f0a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -117,7 +117,7 @@ if test "$DRI" = yes; then
fi
save_CFLAGS="$CFLAGS"
- CFLAGS="$XORG_CFLAGS $DRI_CFLAGS"
+ CFLAGS="$XORG_CFLAGS $DRI_CFLAGS $CFLAGS"
AC_CHECK_HEADER(xf86drmMode.h,[DRM_MODE=yes],[DRM_MODE=no],[#include <stdint.h>
#include <stdlib.h>])
if test "x$DRM_MODE" = xyes; then
@@ -348,3 +348,25 @@ AC_OUTPUT([
src/Makefile
man/Makefile
])
+
+dnl
+dnl Output some configuration info for the user
+dnl
+echo ""
+echo " prefix: $prefix"
+echo " exec_prefix: $exec_prefix"
+echo " libdir: $libdir"
+echo " includedir: $includedir"
+
+
+echo ""
+echo " Kernel modesetting: $DRM_MODE"
+
+echo ""
+echo " CFLAGS: $CFLAGS"
+echo " CXXFLAGS: $CXXFLAGS"
+echo " Macros: $DEFINES"
+
+echo ""
+echo " Run '${MAKE-make}' to build xf86-video-ati"
+echo ""
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 5577f84..882d4fa 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -423,6 +423,24 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn)
info->accel_state->XInited3D = FALSE;
}
+static int RADEONDRMGetNumPipes(ScrnInfoPtr pScrn, int *num_pipes)
+{
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ if (info->dri->pKernelDRMVersion->version_major < 2) {
+ drm_radeon_getparam_t np;
+
+ memset(&np, 0, sizeof(np));
+ np.param = RADEON_PARAM_NUM_GB_PIPES;
+ np.value = num_pipes;
+ return drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GETPARAM, &np, sizeof(np));
+ } else {
+ struct drm_radeon_info np2;
+ np2.value = (uint64_t)num_pipes;
+ np2.request = RADEON_INFO_NUM_GB_PIPES;
+ return drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_INFO, &np2, sizeof(np2));
+ }
+}
+
/* Initialize the acceleration hardware */
void RADEONEngineInit(ScrnInfoPtr pScrn)
{
@@ -438,15 +456,9 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
#ifdef XF86DRI
if ((info->directRenderingEnabled || info->drm_mode_setting) && (IS_R300_3D || IS_R500_3D)) {
- drm_radeon_getparam_t np;
int num_pipes;
- memset(&np, 0, sizeof(np));
- np.param = RADEON_PARAM_NUM_GB_PIPES;
- np.value = &num_pipes;
-
- if (drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GETPARAM, &np,
- sizeof(np)) < 0) {
+ if(RADEONDRMGetNumPipes(pScrn, &num_pipes) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Failed to determine num pipes from DRM, falling back to "
"manual look-up!\n");
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 9e23463..219df9e 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -82,6 +82,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
}
+ if (info->dri->pKernelDRMVersion->version_major < 2) {
size = (info->ChipFamily >= CHIP_FAMILY_R420) ? 5 : 4;
BEGIN_ACCEL(size);
OUT_ACCEL_REG(R300_GB_TILE_CONFIG, gb_tile_config);
@@ -91,13 +92,20 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(R300_GB_SELECT, 0);
OUT_ACCEL_REG(R300_GB_ENABLE, 0);
FINISH_ACCEL();
+ }
if (IS_R500_3D) {
su_reg_dest = ((1 << info->accel_state->num_gb_pipes) - 1);
+ if (info->dri->pKernelDRMVersion->version_major < 2) {
BEGIN_ACCEL(2);
OUT_ACCEL_REG(R500_SU_REG_DEST, su_reg_dest);
OUT_ACCEL_REG(R500_VAP_INDEX_OFFSET, 0);
FINISH_ACCEL();
+ } else {
+ BEGIN_ACCEL(1);
+ OUT_ACCEL_REG(R500_VAP_INDEX_OFFSET, 0);
+ FINISH_ACCEL();
+ }
}
BEGIN_ACCEL(3);
@@ -106,10 +114,13 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
- BEGIN_ACCEL(5);
+ BEGIN_ACCEL(3);
OUT_ACCEL_REG(R300_GB_AA_CONFIG, 0);
OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D);
OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE);
+ FINISH_ACCEL();
+ if (info->dri->pKernelDRMVersion->version_major < 2) {
+ BEGIN_ACCEL(3);
OUT_ACCEL_REG(R300_GB_MSPOS0, ((6 << R300_MS_X0_SHIFT) |
(6 << R300_MS_Y0_SHIFT) |
(6 << R300_MS_X1_SHIFT) |
@@ -125,10 +136,11 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
(6 << R300_MS_X5_SHIFT) |
(6 << R300_MS_Y5_SHIFT) |
(6 << R300_MSBD1_SHIFT)));
+ OUT_ACCEL_REG(R300_GA_ENHANCE, R300_GA_DEADLOCK_CNTL | R300_GA_FASTSYNC_CNTL);
FINISH_ACCEL();
+ }
- BEGIN_ACCEL(5);
- OUT_ACCEL_REG(R300_GA_ENHANCE, R300_GA_DEADLOCK_CNTL | R300_GA_FASTSYNC_CNTL);
+ BEGIN_ACCEL(4);
OUT_ACCEL_REG(R300_GA_POLY_MODE, R300_FRONT_PTYPE_TRIANGE | R300_BACK_PTYPE_TRIANGE);
OUT_ACCEL_REG(R300_GA_ROUND_MODE, (R300_GEOMETRY_ROUND_NEAREST |
R300_COLOR_ROUND_NEAREST));
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index eb15ff2..da5d70b 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -36,15 +36,22 @@
#include "radeon.h"
#include "radeon_dri2.h"
+#include "radeon_bufmgr_gem.h"
#include "radeon_version.h"
#ifdef DRI2
+#if DRI2INFOREC_VERSION >= 1
+#define USE_DRI2_1_1_0
+#endif
+
struct dri2_buffer_priv {
PixmapPtr pixmap;
+ unsigned int attachment;
};
+#ifndef USE_DRI2_1_1_0
static DRI2BufferPtr
radeon_dri2_create_buffers(DrawablePtr drawable,
unsigned int *attachments,
@@ -103,12 +110,81 @@ radeon_dri2_create_buffers(DrawablePtr drawable,
buffers[i].pitch = pixmap->devKind;
buffers[i].cpp = pixmap->drawable.bitsPerPixel / 8;
buffers[i].driverPrivate = &privates[i];
- buffers[i].flags = 0; /* not tiled */
+ buffers[i].flags = 0;
privates[i].pixmap = pixmap;
+ privates[i].attachment = attachments[i];
}
return buffers;
}
+#else
+static DRI2BufferPtr
+radeon_dri2_create_buffer(DrawablePtr drawable,
+ unsigned int attachment,
+ unsigned int format)
+{
+ ScreenPtr pScreen = drawable->pScreen;
+ DRI2BufferPtr buffers;
+ struct dri2_buffer_priv *privates;
+ PixmapPtr pixmap, depth_pixmap;
+ struct radeon_exa_pixmap_priv *driver_priv;
+ int r;
+ buffers = xcalloc(1, sizeof *buffers);
+ if (buffers == NULL) {
+ return NULL;
+ }
+ privates = xcalloc(1, sizeof(struct dri2_buffer_priv));
+ if (privates == NULL) {
+ xfree(buffers);
+ return NULL;
+ }
+
+ depth_pixmap = NULL;
+
+ if (attachment == DRI2BufferFrontLeft) {
+ if (drawable->type == DRAWABLE_PIXMAP) {
+ pixmap = (PixmapPtr)drawable;
+ } else {
+ pixmap = (*pScreen->GetWindowPixmap)((WindowPtr)drawable);
+ }
+ pixmap->refcnt++;
+ } else if (attachment == DRI2BufferStencil && depth_pixmap) {
+ pixmap = depth_pixmap;
+ pixmap->refcnt++;
+ } else {
+ pixmap = (*pScreen->CreatePixmap)(pScreen,
+ drawable->width,
+ drawable->height,
+ (format != 0)?format:drawable->depth,
+ 0);
+ }
+
+ if (attachment == DRI2BufferDepth) {
+ depth_pixmap = pixmap;
+ }
+ driver_priv = exaGetPixmapDriverPrivate(pixmap);
+ r = radeon_bo_gem_name_buffer(driver_priv->bo, &buffers->name);
+ if (r) {
+ /* FIXME: cleanup */
+ fprintf(stderr, "flink error: %d %s\n", r, strerror(r));
+ xfree(buffers);
+ xfree(privates);
+ return NULL;
+ }
+ buffers->attachment = attachment;
+ buffers->pitch = pixmap->devKind;
+ buffers->cpp = pixmap->drawable.bitsPerPixel / 8;
+ buffers->driverPrivate = privates;
+ buffers->format = format;
+ buffers->flags = 0; /* not tiled */
+ privates->pixmap = pixmap;
+ privates->attachment = attachment;
+
+ return buffers;
+}
+#endif
+
+#ifndef USE_DRI2_1_1_0
static void
radeon_dri2_destroy_buffers(DrawablePtr drawable,
DRI2BufferPtr buffers,
@@ -127,6 +203,23 @@ radeon_dri2_destroy_buffers(DrawablePtr drawable,
xfree(buffers);
}
}
+#else
+static void
+radeon_dri2_destroy_buffer(DrawablePtr drawable, DRI2BufferPtr buffers)
+{
+ if(buffers)
+ {
+ ScreenPtr pScreen = drawable->pScreen;
+ struct dri2_buffer_priv *private;
+
+ private = buffers->driverPrivate;
+ (*pScreen->DestroyPixmap)(private->pixmap);
+
+ xfree(buffers->driverPrivate);
+ xfree(buffers);
+ }
+}
+#endif
static void
radeon_dri2_copy_region(DrawablePtr drawable,
@@ -134,19 +227,29 @@ radeon_dri2_copy_region(DrawablePtr drawable,
DRI2BufferPtr dest_buffer,
DRI2BufferPtr src_buffer)
{
- struct dri2_buffer_priv *private = src_buffer->driverPrivate;
+ struct dri2_buffer_priv *src_private = src_buffer->driverPrivate;
+ struct dri2_buffer_priv *dst_private = dest_buffer->driverPrivate;
ScreenPtr pScreen = drawable->pScreen;
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- PixmapPtr pixmap = private->pixmap;
+ PixmapPtr src_pixmap;
+ PixmapPtr dst_pixmap;
RegionPtr copy_clip;
GCPtr gc;
+ src_pixmap = src_private->pixmap;
+ dst_pixmap = dst_private->pixmap;
+ if (src_private->attachment == DRI2BufferFrontLeft) {
+ src_pixmap = (PixmapPtr)drawable;
+ }
+ if (dst_private->attachment == DRI2BufferFrontLeft) {
+ dst_pixmap = (PixmapPtr)drawable;
+ }
gc = GetScratchGC(drawable->depth, pScreen);
copy_clip = REGION_CREATE(pScreen, NULL, 0);
REGION_COPY(pScreen, copy_clip, region);
(*gc->funcs->ChangeClip) (gc, CT_REGION, copy_clip, 0);
- ValidateGC(drawable, gc);
- (*gc->ops->CopyArea)(&pixmap->drawable, drawable, gc,
+ ValidateGC(&dst_pixmap->drawable, gc);
+ (*gc->ops->CopyArea)(&src_pixmap->drawable, &dst_pixmap->drawable, gc,
0, 0, drawable->width, drawable->height, 0, 0);
FreeScratchGC(gc);
RADEONCPReleaseIndirect(pScrn);
@@ -207,16 +310,21 @@ radeon_dri2_screen_init(ScreenPtr pScreen)
}
dri2_info.fd = info->dri2.drm_fd;
dri2_info.deviceName = info->dri2.device_name;
+#ifndef USE_DRI2_1_1_0
dri2_info.version = 1;
dri2_info.CreateBuffers = radeon_dri2_create_buffers;
dri2_info.DestroyBuffers = radeon_dri2_destroy_buffers;
+#else
+ dri2_info.version = 2;
+ dri2_info.CreateBuffer = radeon_dri2_create_buffer;
+ dri2_info.DestroyBuffer = radeon_dri2_destroy_buffer;
+#endif
dri2_info.CopyRegion = radeon_dri2_copy_region;
info->dri2.enabled = DRI2ScreenInit(pScreen, &dri2_info);
return info->dri2.enabled;
}
-void
-radeon_dri2_close_screen(ScreenPtr pScreen)
+void radeon_dri2_close_screen(ScreenPtr pScreen)
{
DRI2CloseScreen(pScreen);
}
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 388ab5f..c174c7c 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2826,15 +2826,23 @@ static Bool radeon_kernel_mode_enabled(ScrnInfoPtr pScrn)
pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
PciInfo = xf86GetPciInfoForEntity(pEnt->index);
- if (!xf86LoaderCheckSymbol("DRICreatePCIBusID"))
+ if (!xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "[KMS] No DRICreatePCIBusID symbol, no kernel modesetting.\n");
return FALSE;
+ }
busIdString = DRICreatePCIBusID(PciInfo);
ret = drmCheckModesettingSupported(busIdString);
xfree(busIdString);
- if (ret)
+ if (ret) {
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "[KMS] drm report modesetting isn't supported.\n");
return FALSE;
+ }
+ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
+ "[KMS] Kernel modesetting enabled.\n");
return TRUE;
}
#else
@@ -3166,6 +3174,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
info->dri2.drm_fd = info->drmmode.fd;
info->dri2.enabled = FALSE;
xfree(bus_id);
+ info->dri->pKernelDRMVersion = drmGetVersion(info->dri->drmFD);
+ if (info->dri->pKernelDRMVersion == NULL) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "RADEONDRIGetVersion failed to get the DRM version\n");
+ goto fail;
+ }
{
struct drm_radeon_gem_info mminfo;
@@ -3177,6 +3191,7 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags)
ErrorF("initing gart:%llx vram: s:%llx v:%llx\n",
mminfo.gart_size, mminfo.vram_size, mminfo.vram_visible);
}
+ if (info->dri == NULL || info->dri->pKernelDRMVersion->version_major < 2)
{
struct drm_radeon_getparam gp;
int value;
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index e5cba8c..4d96ae5 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -2158,16 +2163,23 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
}
/* Clear out scissoring */
+ if (IS_R300_3D) {
BEGIN_ACCEL(2);
- if (IS_R300_3D)
- OUT_ACCEL_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) |
- (1440 << R300_SCISSOR_Y_SHIFT)));
- else
- OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
- (0 << R300_SCISSOR_Y_SHIFT)));
- OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) |
- (8191 << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((1440 << R300_SCISSOR_X_SHIFT) |
+ (1440 << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR1,
+ (((pDst->drawable.width + 1440 - 1) << R300_SCISSOR_X_SHIFT) |
+ ((pDst->drawable.height + 1440 - 1) << R300_SCISSOR_Y_SHIFT)));
FINISH_ACCEL();
+ } else {
+ BEGIN_ACCEL(2);
+ OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) |
+ (0 << R300_SCISSOR_Y_SHIFT)));
+ OUT_ACCEL_REG(R300_SC_SCISSOR1,
+ (((pDst->drawable.width - 1) << R300_SCISSOR_X_SHIFT) |
+ ((pDst->drawable.height - 1) << R300_SCISSOR_Y_SHIFT)));
+ FINISH_ACCEL();
+ }
qwords = info->new_cs ? 4 : 3;
BEGIN_ACCEL(qwords);
radeon-modeset-fixes.patch:
Index: radeon-modeset-fixes.patch
===================================================================
RCS file: radeon-modeset-fixes.patch
diff -N radeon-modeset-fixes.patch
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ radeon-modeset-fixes.patch 22 Jun 2009 02:30:19 -0000 1.3
@@ -0,0 +1,44 @@
+diff -up xf86-video-ati-6.12.2/src/drmmode_display.c.modeset-fixes xf86-video-ati-6.12.2/src/drmmode_display.c
+--- xf86-video-ati-6.12.2/src/drmmode_display.c.modeset-fixes 2009-05-21 11:28:31.000000000 -0400
++++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-05-21 11:28:31.000000000 -0400
+@@ -458,7 +458,11 @@ static void
+ drmmode_crtc_gamma_set(xf86CrtcPtr crtc, uint16_t *red, uint16_t *green,
+ uint16_t *blue, int size)
+ {
+- return;
++ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
++ drmmode_ptr drmmode = drmmode_crtc->drmmode;
++
++ drmModeCrtcSetGamma(drmmode->fd, drmmode_crtc->mode_crtc->crtc_id,
++ size, red, green, blue);
+ }
+
+ static const xf86CrtcFuncsRec drmmode_crtc_funcs = {
+@@ -954,8 +958,6 @@ static void drmmode_load_palette(ScrnInf
+ int index, j, i;
+ int c;
+
+-
+-
+ for (c = 0; c < xf86_config->num_crtc; c++) {
+ xf86CrtcPtr crtc = xf86_config->crtc[c];
+ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
+@@ -966,8 +968,7 @@ static void drmmode_load_palette(ScrnInf
+ lut_b[i] = drmmode_crtc->lut_b[i] << 6;
+ }
+
+-#if 0 //TODO
+- switch (info->CurrentLayout.depth) {
++ switch(pScrn->depth) {
+ case 15:
+ for (i = 0; i < numColors; i++) {
+ index = indices[i];
+@@ -1003,7 +1004,6 @@ static void drmmode_load_palette(ScrnInf
+ }
+ break;
+ }
+-#endif
+
+ /* Make the change through RandR */
+ #ifdef RANDR_12_INTERFACE
+diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.modeset-fixes xf86-video-ati-6.12.2/src/radeon_accel.c
radeon-modeset-still-more-fixes.patch:
--- NEW FILE radeon-modeset-still-more-fixes.patch ---
Index: xf86-video-ati-6.12.2/src/radeon_dri.c
===================================================================
--- xf86-video-ati-6.12.2.orig/src/radeon_dri.c
+++ xf86-video-ati-6.12.2/src/radeon_dri.c
@@ -1607,7 +1607,7 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pSc
goto fail;
}
- if (info->dri->pKernelDRMVersion->version_minor >= 30) {
+ if (info->dri->pKernelDRMVersion->version_minor >= 31) {
struct drm_radeon_gem_info mminfo;
if (!drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo)))
radeon-src-readback-cpu.patch:
--- NEW FILE radeon-src-readback-cpu.patch ---
>From c29c2002c2d3d474456a16584fa2ebef43de8544 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied at linux.ie>
Date: Wed, 6 May 2009 02:54:42 +1000
Subject: [PATCH] radeon: always pull srcs into CPU space for rendering
dsts at least get write combined in theory though who knows with blending
really need an XA already
---
src/radeon_bufmgr_gem.c | 16 ++++++++++++++++
src/radeon_bufmgr_gem.h | 1 +
src/radeon_exa.c | 6 +++++-
3 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c
index 634d28d..03d0a20 100644
--- a/src/radeon_bufmgr_gem.c
+++ b/src/radeon_bufmgr_gem.c
@@ -239,6 +239,22 @@ dri_bufmgr_gem_destroy(dri_bufmgr *bufmgr)
free(bufmgr);
}
+void radeon_bufmgr_gem_force_map(dri_bo *buf)
+{
+ dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)buf->bufmgr;
+ struct drm_radeon_gem_set_domain sd_args;
+ dri_bo_gem *gem_bo = (dri_bo_gem *)buf;
+ int ret;
+
+
+ sd_args.handle = gem_bo->gem_handle;
+ sd_args.read_domains = RADEON_GEM_DOMAIN_GTT;
+ sd_args.write_domain = 0;
+
+ ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_RADEON_GEM_SET_DOMAIN,
+ &sd_args, sizeof(sd_args));
+}
+
void radeon_bufmgr_gem_wait_rendering(dri_bo *buf)
{
dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)buf->bufmgr;
diff --git a/src/radeon_bufmgr_gem.h b/src/radeon_bufmgr_gem.h
index 52b3d99..eb7974e 100644
--- a/src/radeon_bufmgr_gem.h
+++ b/src/radeon_bufmgr_gem.h
@@ -4,6 +4,7 @@
#include "radeon_dri_bufmgr.h"
+extern void radeon_bufmgr_gem_force_map(dri_bo *buf);
extern void radeon_bufmgr_gem_wait_rendering(dri_bo *bo);
void radeon_bufmgr_gem_emit_reloc(dri_bo *bo, struct radeon_relocs_info *reloc_info, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain);
void radeon_gem_bufmgr_post_submit(dri_bufmgr *bufmgr, struct radeon_relocs_info *reloc_info, int error);
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index cc48a7a..267c5c3 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -272,7 +272,11 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
if (radeon_bufmgr_gem_has_references(driver_priv->bo))
RADEONCPFlushIndirect(pScrn, 0);
- radeon_bufmgr_gem_wait_rendering(driver_priv->bo);
+ /* if we hit a sw fallback for a src or mask pull them into cpu accessible space */
+ if (index)
+ radeon_bufmgr_gem_force_map(driver_priv->bo);
+ else
+ radeon_bufmgr_gem_wait_rendering(driver_priv->bo);
/* flush IB */
ret = dri_bo_map(driver_priv->bo, 1);
--
1.6.2.2
radeon-modeset.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -p -N -r 1.46 -r 1.47 radeon-modeset.patch
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.46
retrieving revision 1.47
diff -u -p -r1.46 -r1.47
--- radeon-modeset.patch 15 Apr 2009 02:54:23 -0000 1.46
+++ radeon-modeset.patch 22 Jun 2009 02:30:19 -0000 1.47
@@ -1,6 +1,6 @@
-diff -up xf86-video-ati-6.12.2/configure.ac.dave xf86-video-ati-6.12.2/configure.ac
---- xf86-video-ati-6.12.2/configure.ac.dave 2009-04-09 00:29:53.000000000 +1000
-+++ xf86-video-ati-6.12.2/configure.ac 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/configure.ac.modeset xf86-video-ati-6.12.2/configure.ac
+--- xf86-video-ati-6.12.2/configure.ac.modeset 2009-04-08 10:29:53.000000000 -0400
++++ xf86-video-ati-6.12.2/configure.ac 2009-05-21 11:01:45.000000000 -0400
@@ -31,6 +31,7 @@ AM_CONFIG_HEADER([config.h])
AC_CONFIG_AUX_DIR(.)
@@ -30,9 +30,9 @@ diff -up xf86-video-ati-6.12.2/configure
CFLAGS="$XORG_CFLAGS"
AC_CHECK_HEADER(xf86Modes.h,[XMODES=yes],[XMODES=no],[#include "xorg-server.h"])
diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c
---- /dev/null 2009-04-15 09:55:06.267190488 +1000
-+++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-04-15 12:46:30.000000000 +1000
-@@ -0,0 +1,929 @@
+--- /dev/null 2009-05-05 09:44:49.704001696 -0400
++++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-05-21 11:01:45.000000000 -0400
+@@ -0,0 +1,1035 @@
+/*
+ * Copyright © 2007 Red Hat, Inc.
+ *
@@ -66,6 +66,8 @@ diff -up /dev/null xf86-video-ati-6.12.2
+
+#ifdef XF86DRM_MODE
+#include <sys/ioctl.h>
++#include "micmap.h"
++#include "xf86cmap.h"
+#include "radeon.h"
+#include "radeon_reg.h"
+#include "radeon_drm.h"
@@ -223,6 +225,8 @@ diff -up /dev/null xf86-video-ati-6.12.2
+ }
+
+ src = create_pixmap_for_fbcon(drmmode, pScrn, crtc_id);
++ if (!src)
++ return;
+
+ dst = GetScratchPixmapHeader(pScreen,
+ pScrn->virtualX, pScrn->virtualY,
@@ -485,6 +489,13 @@ diff -up /dev/null xf86-video-ati-6.12.2
+
+}
+
++static void
++drmmode_crtc_gamma_set(xf86CrtcPtr crtc, uint16_t *red, uint16_t *green,
++ uint16_t *blue, int size)
++{
++ return;
++}
++
+static const xf86CrtcFuncsRec drmmode_crtc_funcs = {
+ .dpms = drmmode_crtc_dpms,
+ .set_mode_major = drmmode_set_mode_major,
@@ -494,12 +505,10 @@ diff -up /dev/null xf86-video-ati-6.12.2
+ .hide_cursor = drmmode_hide_cursor,
+ .load_cursor_argb = drmmode_load_cursor_argb,
+
++ .gamma_set = drmmode_crtc_gamma_set,
+ .shadow_create = drmmode_crtc_shadow_create,
+ .shadow_allocate = drmmode_crtc_shadow_allocate,
+ .shadow_destroy = drmmode_crtc_shadow_destroy,
-+#if 0
-+ .gamma_set = i830_crtc_gamma_set,
-+#endif
+ .destroy = NULL, /* XXX */
+};
+
@@ -839,24 +848,31 @@ diff -up /dev/null xf86-video-ati-6.12.2
+};
+
+
-+Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp)
++Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp, int zaphod_mask)
+{
+ xf86CrtcConfigPtr xf86_config;
++ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
+ int i;
+ Bool ret;
+
+ /* Create a bus Id */
+ /* Low level DRM open */
-+ ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name);
-+ if (!ret) {
++ if (!pRADEONEnt->fd) {
++ ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name);
++ if (!ret) {
++ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
++ "[dri] DRIGetVersion failed to open the DRM\n"
++ "[dri] Disabling DRI.\n");
++ return FALSE;
++ }
++
++ drmmode->fd = DRIMasterFD(pScrn);
++ pRADEONEnt->fd = drmmode->fd;
++ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-+ "[dri] DRIGetVersion failed to open the DRM\n"
-+ "[dri] Disabling DRI.\n");
-+ return FALSE;
++ " reusing fd for second head\n");
++ drmmode->fd = pRADEONEnt->fd;
+ }
-+
-+ drmmode->fd = DRIMasterFD(pScrn);
-+
+ xf86CrtcConfigInit(pScrn, &drmmode_xf86crtc_config_funcs);
+ xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+
@@ -867,10 +883,12 @@ diff -up /dev/null xf86-video-ati-6.12.2
+
+ xf86CrtcSetSizeRange(pScrn, 320, 200, drmmode->mode_res->max_width, drmmode->mode_res->max_height);
+ for (i = 0; i < drmmode->mode_res->count_crtcs; i++)
-+ drmmode_crtc_init(pScrn, drmmode, i);
++ if (zaphod_mask & (1 << i))
++ drmmode_crtc_init(pScrn, drmmode, i);
+
+ for (i = 0; i < drmmode->mode_res->count_connectors; i++)
-+ drmmode_output_init(pScrn, drmmode, i);
++ if (zaphod_mask & (1 << i))
++ drmmode_output_init(pScrn, drmmode, i);
+
+ xf86InitialConfiguration(pScrn, TRUE);
+
@@ -961,11 +979,99 @@ diff -up /dev/null xf86-video-ati-6.12.2
+ }
+ return TRUE;
+}
++
++static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors,
++ int *indices, LOCO *colors, VisualPtr pVisual)
++{
++ RADEONInfoPtr info = RADEONPTR(pScrn);
++ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
++ uint16_t lut_r[256], lut_g[256], lut_b[256];
++ int index, j, i;
++ int c;
++
++
++
++ for (c = 0; c < xf86_config->num_crtc; c++) {
++ xf86CrtcPtr crtc = xf86_config->crtc[c];
++ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private;
++
++ for (i = 0 ; i < 256; i++) {
++ lut_r[i] = drmmode_crtc->lut_r[i] << 6;
++ lut_g[i] = drmmode_crtc->lut_g[i] << 6;
++ lut_b[i] = drmmode_crtc->lut_b[i] << 6;
++ }
++
++#if 0 //TODO
++ switch (info->CurrentLayout.depth) {
++ case 15:
++ for (i = 0; i < numColors; i++) {
++ index = indices[i];
++ for (j = 0; j < 8; j++) {
++ lut_r[index * 8 + j] = colors[index].red << 6;
++ lut_g[index * 8 + j] = colors[index].green << 6;
++ lut_b[index * 8 + j] = colors[index].blue << 6;
++ }
++ }
++ break;
++ case 16:
++ for (i = 0; i < numColors; i++) {
++ index = indices[i];
++
++ if (i <= 31) {
++ for (j = 0; j < 8; j++) {
++ lut_r[index * 8 + j] = colors[index].red << 6;
++ lut_b[index * 8 + j] = colors[index].blue << 6;
++ }
++ }
++
++ for (j = 0; j < 4; j++) {
++ lut_g[index * 4 + j] = colors[index].green << 6;
++ }
++ }
++ break;
++ default:
++ for (i = 0; i < numColors; i++) {
++ index = indices[i];
++ lut_r[index] = colors[index].red << 6;
++ lut_g[index] = colors[index].green << 6;
++ lut_b[index] = colors[index].blue << 6;
++ }
++ break;
++ }
++#endif
++
++ /* Make the change through RandR */
++#ifdef RANDR_12_INTERFACE
[...1670 lines suppressed...]
#ifdef USE_EXA
Bool accelDFS;
#endif
-@@ -892,6 +925,27 @@ typedef struct {
+@@ -891,6 +924,27 @@ typedef struct {
Bool r4xx_atom;
@@ -7271,7 +7327,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
-@@ -1147,6 +1201,13 @@ extern void
+@@ -1146,6 +1200,13 @@ extern void
radeon_legacy_free_memory(ScrnInfoPtr pScrn,
void *mem_struct);
@@ -7285,7 +7341,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
-@@ -1165,7 +1226,9 @@ do { \
+@@ -1164,7 +1225,9 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
@@ -7296,7 +7352,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
-@@ -1200,7 +1263,7 @@ do { \
+@@ -1199,7 +1262,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
@@ -7305,7 +7361,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
-@@ -1227,6 +1290,13 @@ do { \
+@@ -1226,6 +1289,13 @@ do { \
#define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0
#define BEGIN_RING(n) do { \
@@ -7319,7 +7375,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
-@@ -1239,13 +1309,6 @@ do { \
+@@ -1238,13 +1308,6 @@ do { \
} \
info->cp->dma_debug_func = __FILE__; \
info->cp->dma_debug_lineno = __LINE__; \
@@ -7333,7 +7389,7 @@ diff -up xf86-video-ati-6.12.2/src/radeo
__expected = n; \
__head = (pointer)((char *)info->cp->indirectBuffer->address + \
info->cp->indirectBuffer->used); \
-@@ -1288,6 +1351,14 @@ do { \
+@@ -1287,6 +1350,14 @@ do { \
OUT_RING(val); \
} while (0)
@@ -7348,9 +7404,9 @@ diff -up xf86-video-ati-6.12.2/src/radeo
#define FLUSH_RING() \
do { \
if (RADEON_VERBOSE) \
-diff -up xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave xf86-video-ati-6.12.2/src/radeon_legacy_memory.c
---- xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave 2009-02-25 00:45:07.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_legacy_memory.c 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.modeset xf86-video-ati-6.12.2/src/radeon_legacy_memory.c
+--- xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.modeset 2009-02-24 09:45:07.000000000 -0500
++++ xf86-video-ati-6.12.2/src/radeon_legacy_memory.c 2009-05-21 11:01:45.000000000 -0400
@@ -21,6 +21,19 @@ radeon_legacy_allocate_memory(ScrnInfoPt
RADEONInfoPtr info = RADEONPTR(pScrn);
uint32_t offset = 0;
@@ -7385,9 +7441,9 @@ diff -up xf86-video-ati-6.12.2/src/radeo
ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_memory.c
---- /dev/null 2009-04-15 09:55:06.267190488 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_memory.c 2009-04-15 12:46:30.000000000 +1000
-@@ -0,0 +1,93 @@
+--- /dev/null 2009-05-05 09:44:49.704001696 -0400
++++ xf86-video-ati-6.12.2/src/radeon_memory.c 2009-05-21 11:01:45.000000000 -0400
+@@ -0,0 +1,71 @@
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
@@ -7409,14 +7465,9 @@ diff -up /dev/null xf86-video-ati-6.12.2
+ int screen_size;
+ int stride = pScrn->displayWidth * cpp;
+ int total_size_bytes = 0, remain_size_bytes;
-+ int fb_size_bytes;
+ int pagesize = 4096;
+
+ screen_size = RADEON_ALIGN(pScrn->virtualY, 16) * stride;
-+
-+ ErrorF("%d x %d x %d = %dK\n", pScrn->displayWidth, pScrn->virtualY, cpp, screen_size / 1024);
-+
-+
+ {
+ int cursor_size = 64 * 4 * 64;
+ int c;
@@ -7447,23 +7498,6 @@ diff -up /dev/null xf86-video-ati-6.12.2
+ remain_size_bytes = info->mm.vram_size - total_size_bytes;
+
+ info->dri->textureSize = 0;
-+#if 0
-+ if (info->dri->textureSize > 0)
-+ info->dri->textureSize = (remain_size_bytes / 100) * info->dri->textureSize;
-+ else
-+ info->dri->textureSize = remain_size_bytes / 2;
-+
-+ info->dri->textureSize = RADEON_ALIGN(info->dri->textureSize, pagesize);
-+
-+ remain_size_bytes -= info->dri->textureSize;
-+#endif
-+
-+ ErrorF("texture size is %dK, exa is %dK\n", info->dri->textureSize / 1024, remain_size_bytes/1024);
-+
-+
-+ fb_size_bytes = screen_size;
-+
-+ ErrorF("fb size is %dK %dK\n", fb_size_bytes / 1024, total_size_bytes / 1024);
+
+ info->mm.front_buffer = dri_bo_alloc(info->bufmgr, "front", screen_size,
+ 0, RADEON_GEM_DOMAIN_VRAM);
@@ -7481,9 +7515,9 @@ diff -up /dev/null xf86-video-ati-6.12.2
+}
+
+
-diff -up xf86-video-ati-6.12.2/src/radeon_probe.h.dave xf86-video-ati-6.12.2/src/radeon_probe.h
---- xf86-video-ati-6.12.2/src/radeon_probe.h.dave 2009-04-05 08:44:00.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_probe.h 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/src/radeon_probe.h.modeset xf86-video-ati-6.12.2/src/radeon_probe.h
+--- xf86-video-ati-6.12.2/src/radeon_probe.h.modeset 2009-05-21 11:01:45.000000000 -0400
++++ xf86-video-ati-6.12.2/src/radeon_probe.h 2009-05-21 11:01:45.000000000 -0400
@@ -50,6 +50,7 @@
#include "xaa.h"
#endif
@@ -7500,9 +7534,17 @@ diff -up xf86-video-ati-6.12.2/src/radeo
} RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr;
typedef struct _radeon_encoder {
-diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6.12.2/src/radeon_textured_video.c
---- xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave 2009-03-27 15:13:04.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_textured_video.c 2009-04-15 12:46:30.000000000 +1000
+@@ -612,6 +614,7 @@ typedef struct
+ RADEONSaveRec SavedReg; /* Original (text) mode */
+
+ void *MMIO; /* Map of MMIO region */
++ int fd;
+ } RADEONEntRec, *RADEONEntPtr;
+
+ /* radeon_probe.c */
+diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.modeset xf86-video-ati-6.12.2/src/radeon_textured_video.c
+--- xf86-video-ati-6.12.2/src/radeon_textured_video.c.modeset 2009-03-27 01:13:04.000000000 -0400
++++ xf86-video-ati-6.12.2/src/radeon_textured_video.c 2009-05-21 11:01:45.000000000 -0400
@@ -40,6 +40,7 @@
#include "radeon_macros.h"
#include "radeon_probe.h"
@@ -7649,9 +7691,9 @@ diff -up xf86-video-ati-6.12.2/src/radeo
RADEONDisplayTexturedVideoCP(pScrn, pPriv);
else
#endif
-diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c
---- xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave 2009-04-08 01:32:12.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.modeset xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c
+--- xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.modeset 2009-05-21 11:01:45.000000000 -0400
++++ xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c 2009-05-21 11:01:45.000000000 -0400
@@ -87,11 +87,25 @@ do { \
#endif /* !ACCEL_CP */
@@ -7957,9 +7999,9 @@ diff -up xf86-video-ati-6.12.2/src/radeo
OUT_ACCEL_REG(RADEON_PP_TXCBLEND_0,
RADEON_COLOR_ARG_A_ZERO |
RADEON_COLOR_ARG_B_ZERO |
-diff -up xf86-video-ati-6.12.2/src/radeon_video.c.dave xf86-video-ati-6.12.2/src/radeon_video.c
---- xf86-video-ati-6.12.2/src/radeon_video.c.dave 2009-04-08 01:31:32.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_video.c 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/src/radeon_video.c.modeset xf86-video-ati-6.12.2/src/radeon_video.c
+--- xf86-video-ati-6.12.2/src/radeon_video.c.modeset 2009-04-07 11:31:32.000000000 -0400
++++ xf86-video-ati-6.12.2/src/radeon_video.c 2009-05-21 11:01:45.000000000 -0400
@@ -284,7 +284,7 @@ void RADEONInitVideo(ScreenPtr pScreen)
memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr));
adaptors = newAdaptors;
@@ -7993,9 +8035,9 @@ diff -up xf86-video-ati-6.12.2/src/radeo
{
uint8_t *buf;
uint32_t bufPitch, dstPitchOff;
-diff -up xf86-video-ati-6.12.2/src/radeon_video.h.dave xf86-video-ati-6.12.2/src/radeon_video.h
---- xf86-video-ati-6.12.2/src/radeon_video.h.dave 2009-04-08 01:31:53.000000000 +1000
-+++ xf86-video-ati-6.12.2/src/radeon_video.h 2009-04-15 12:46:30.000000000 +1000
+diff -up xf86-video-ati-6.12.2/src/radeon_video.h.modeset xf86-video-ati-6.12.2/src/radeon_video.h
+--- xf86-video-ati-6.12.2/src/radeon_video.h.modeset 2009-04-07 11:31:53.000000000 -0400
++++ xf86-video-ati-6.12.2/src/radeon_video.h 2009-05-21 11:01:45.000000000 -0400
@@ -121,6 +121,9 @@ typedef struct {
int w, h;
int drw_x, drw_y;
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.176
retrieving revision 1.177
diff -u -p -r1.176 -r1.177
--- xorg-x11-drv-ati.spec 15 Apr 2009 02:54:23 -0000 1.176
+++ xorg-x11-drv-ati.spec 22 Jun 2009 02:30:20 -0000 1.177
@@ -5,21 +5,31 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.12.2
-Release: 2%{?dist}
+Release: 18%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
-Source0: http://www.x.org/pub/individual/driver/%{tarball}-%{version}.tar.bz2
-Source1: radeon.xinf
+Source0: http://www.x.org/pub/individual/driver/%{tarball}-%{version}.tar.bz2
+# unlike the other drivers, radeon.xinf is generated
+Source1: mkxinf
+Patch0: radeon-6.12.2-stable-branch.patch
Patch1: radeon-modeset.patch
+Patch2: radeon-modeset-fixes.patch
+Patch3: radeon-modeset-still-more-fixes.patch
Patch6: radeon-6.9.0-bgnr-enable.patch
-Patch7: radeon-6.12.1-r600-fb-size.patch
+Patch8: radeon-src-readback-cpu.patch
+Patch9: radeon-6.12.2-rs690-hack.patch
+Patch10: radeon-6.12.2-lvds-default-modes.patch
+Patch11: radeon-6.12.2-hax.patch
+Patch12: radeon-kms-compat.patch
+Patch13: fix-default-modes.patch
ExcludeArch: s390 s390x
+BuildRequires: python
BuildRequires: xorg-x11-server-sdk >= 1.4.99.1
BuildRequires: mesa-libGL-devel >= 6.4-4
BuildRequires: libdrm-devel >= 2.4.0-0.21
@@ -31,16 +41,25 @@ Requires: hwdata
Requires: xorg-x11-server-Xorg >= 1.4.99.1
Requires: libdrm >= 2.4.0-0.21
# new CS method needs newer kernel
-Requires: kernel >= 2.6.29.1-52.fc11
+Requires: kernel >= 2.6.29.1-111.fc11
+Obsoletes: xorg-x11-drv-avivo <= 0.0.2
%description
X.Org X11 ati video driver.
%prep
%setup -q -n %{tarball}-%{version}
+%patch0 -p1 -b .stable
%patch1 -p1 -b .modeset
+%patch2 -p1 -b .modeset-fixes
+%patch3 -p1 -b .modeset-still-more-fixes
%patch6 -p1 -b .bgnr
-%patch7 -p1 -b .r600-fb-size
+%patch8 -p1 -b .srcrb
+%patch9 -p1 -b .rs690
+%patch10 -p1 -b .lvds
+%patch11 -p1 -b .fixups
+%patch12 -p1 -b .compat
+%patch13 -p1 -b .def
%build
autoreconf -iv
@@ -52,8 +71,10 @@ rm -rf $RPM_BUILD_ROOT
make install DESTDIR=$RPM_BUILD_ROOT
+%{SOURCE1} src/pcidb/ati_pciids.csv > radeon.xinf
+
mkdir -p $RPM_BUILD_ROOT%{_datadir}/hwdata/videoaliases
-install -m 0644 %{SOURCE1} $RPM_BUILD_ROOT%{_datadir}/hwdata/videoaliases/
+install -m 0644 radeon.xinf $RPM_BUILD_ROOT%{_datadir}/hwdata/videoaliases/
find $RPM_BUILD_ROOT -regex ".*\.la$" | xargs rm -f --
@@ -72,6 +93,63 @@ rm -rf $RPM_BUILD_ROOT
%{_mandir}/man4/radeon.4*
%changelog
+* Mon Jun 22 2009 Dave Airlie <airlied at redhat.com> 6.12.2-18
+- rebuild against xorg F12 master
+
+* Fri Jun 19 2009 Adam Jackson <ajax at redhat.com> 6.12.2-17
+- Obsoletes: xorg-x11-drv-avivo
+
+* Tue Jun 09 2009 Dave Airlie <airlied at redhat.com> 6.12.2-16
+- add KMS compat patches + dri2 fixes for running on glisse kernel
+
+* Thu May 21 2009 Adam Jackson <ajax at redhat.com> 6.12.2-15
+- Update to tip of 6.12 branch, 74cb2aba79049b792c22abf25ade3693b802b260
+- Drop stuff from radeon-modeset-fixes.patch to match
+- Generate radeon.xinf automatically from the CSV
+- radeon-6.12.2-hax.patch: Fix cursor setup and initial framebuffer clear
+ in KMS.
+
+* Thu May 14 2009 Kyle McMartin <kyle at redhat.com> 6.12.2-14
+- radeon-modeset-still-more-fixes.patch: Bump the GEM interface version to
+ 31 so we don't activate it... (#500801)
+
+* Thu May 07 2009 Adam Jackson <ajax at redhat.com> 6.12.2-13
+- radeon-6.12.2-lvds-default-modes.patch: Add default modes to the LVDS mode
+ list if we got no EDID from the kernel.
+
+* Wed May 06 2009 Dave Airlie <airlied at redhat.com> 6.12.2-12
+- radeon-6.12.2-rs690-hack.patch - workaround rs690 hangs with firefox safely
+
+* Tue May 05 2009 Dave Airlie <airlied at redhat.com> 6.12.2-11
+- make src/mask prepare access force to GTT.
+
+* Tue May 05 2009 Dave Airlie <airlied at redhat.com> 6.12.2-10
+- radeon-modeset-fixes.patch: backport fixes from upstream for rs480 firefox gpu crash
+
+* Tue Apr 28 2009 Dave Airlie <airlied at redhat.com> 6.12.2-9
+- fix gamma code to work properly
+- bump kernel requires for gamma interface not oopsing
+
+* Tue Apr 28 2009 Dave Airlie <airlied at redhat.com> 6.12.2-8
+- restrict texture coords to 0.0->1.0 explicitly.
+- enable gamma now kernel is tagged
+
+* Mon Apr 27 2009 Dave Airlie <airlied at redhat.com> 6.12.2-7
+- revert rs690 fixes for now until we can research properly
+- fix xv warning
+
+* Fri Apr 24 2009 Dave Airlie <airlied at redhat.com> 6.12.2-6
+- rs690: fix clamps patch so it doesn't break other cards
+
+* Thu Apr 23 2009 Dave Airlie <airlied at redhat.com> 6.12.2-5
+- rs690: fix crashing when firefox or gimp is used
+
+* Thu Apr 16 2009 Dave Airlie <airlied at redhat.com> 6.12.2-4
+- radeon-modeset.patch: fix stupid idle drawing corrupt since mmap cache
+
+* Wed Apr 15 2009 Dave Airlie <airlied at redhat.com> 6.12.2-3
+- radeon-modeset-zaphod.patch: fix zaphod under kms in theory
+
* Wed Apr 15 2009 Dave Airlie <airlied at redhat.com> 6.12.2-2
- radeon-modeset.patch: fix rotation + cache mmap uninit var path
--- radeon.xinf DELETED ---
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