rpms/kernel/devel linux-2.6-dm-fix-exstore-search.patch, NONE, 1.1.2.2 patch-2.6.31-rc1-git5.bz2.sign, NONE, 1.1.2.2 .cvsignore, 1.1014.2.16, 1.1014.2.17 config-generic, 1.238.6.25, 1.238.6.26 drm-nouveau.patch, 1.8.6.11, 1.8.6.12 kernel.spec, 1.1294.2.35, 1.1294.2.36 sources, 1.976.2.17, 1.976.2.18 upstream, 1.888.2.16, 1.888.2.17 xen.pvops.patch, 1.1.2.25, 1.1.2.26 patch-2.6.31-rc1-git2.bz2.sign, 1.1.2.2, NONE
myoung
myoung at fedoraproject.org
Tue Jun 30 18:07:06 UTC 2009
Author: myoung
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv9460
Modified Files:
Tag: private-myoung-dom0-branch
.cvsignore config-generic drm-nouveau.patch kernel.spec
sources upstream xen.pvops.patch
Added Files:
Tag: private-myoung-dom0-branch
linux-2.6-dm-fix-exstore-search.patch
patch-2.6.31-rc1-git5.bz2.sign
Removed Files:
Tag: private-myoung-dom0-branch
patch-2.6.31-rc1-git2.bz2.sign
Log Message:
update pvops patch which should return network and disk support for guest
linux-2.6-dm-fix-exstore-search.patch:
--- NEW FILE linux-2.6-dm-fix-exstore-search.patch ---
--- linux-2.6.30.noarch.orig/drivers/md/dm-exception-store.c
+++ linux-2.6.30.noarch/drivers/md/dm-exception-store.c
@@ -197,7 +197,7 @@ int dm_exception_store_create(struct dm_
int r = 0;
struct dm_exception_store_type *type;
struct dm_exception_store *tmp_store;
- char persistent;
+ char persistent[2] = {0, 0};
if (argc < 3) {
ti->error = "Insufficient exception store arguments";
@@ -210,13 +210,15 @@ int dm_exception_store_create(struct dm_
return -ENOMEM;
}
- persistent = toupper(*argv[1]);
- if (persistent != 'P' && persistent != 'N') {
+ persistent[0] = toupper(*argv[1]);
+ if (persistent[0] != 'P' && persistent[0] != 'N') {
ti->error = "Persistent flag is not P or N";
return -EINVAL;
}
- type = get_type(&persistent);
+ type = get_type(argv[1]);
+ if (!type)
+ type = get_type(persistent);
if (!type) {
ti->error = "Exception store type not recognised";
r = -EINVAL;
--- NEW FILE patch-2.6.31-rc1-git5.bz2.sign ---
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: See http://www.kernel.org/signature.html for info
iD8DBQBKSK11yGugalF9Dw4RAhBQAJkBpz0mO9SQBLV5yAqJaPIKWvi52QCfUfDm
pxKa+86CeGn/+iH6sbBZg+4=
=M7qC
-----END PGP SIGNATURE-----
Index: .cvsignore
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/.cvsignore,v
retrieving revision 1.1014.2.16
retrieving revision 1.1014.2.17
diff -u -p -r1.1014.2.16 -r1.1014.2.17
--- .cvsignore 27 Jun 2009 11:05:09 -0000 1.1014.2.16
+++ .cvsignore 30 Jun 2009 18:06:00 -0000 1.1014.2.17
@@ -5,6 +5,5 @@ kernel-2.6.*.config
temp-*
kernel-2.6.30
linux-2.6.30.tar.bz2
-patch-2.6.30-git22.bz2
patch-2.6.31-rc1.bz2
-patch-2.6.31-rc1-git2.bz2
+patch-2.6.31-rc1-git5.bz2
Index: config-generic
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/config-generic,v
retrieving revision 1.238.6.25
retrieving revision 1.238.6.26
diff -u -p -r1.238.6.25 -r1.238.6.26
--- config-generic 27 Jun 2009 12:42:28 -0000 1.238.6.25
+++ config-generic 30 Jun 2009 18:06:00 -0000 1.238.6.26
@@ -3724,6 +3724,7 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
CONFIG_LEDS_ALIX2=m
CONFIG_LEDS_WM8350=m
+CONFIG_LEDS_LP3944=m
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
drm-nouveau.patch:
Index: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.8.6.11
retrieving revision 1.8.6.12
diff -u -p -r1.8.6.11 -r1.8.6.12
--- drm-nouveau.patch 27 Jun 2009 11:05:10 -0000 1.8.6.11
+++ drm-nouveau.patch 30 Jun 2009 18:06:00 -0000 1.8.6.12
@@ -5373,10 +5373,10 @@ index 0000000..b7e0f32
+#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
new file mode 100644
-index 0000000..be07b22
+index 0000000..4bd813d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
-@@ -0,0 +1,424 @@
+@@ -0,0 +1,559 @@
+/*
+ * Copyright 2007 Dave Airlied
+ * All Rights Reserved.
@@ -5412,6 +5412,140 @@ index 0000000..be07b22
+#include "nouveau_drv.h"
+#include "nouveau_dma.h"
+
++static void
++nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
++{
++ struct nouveau_bo *nvbo = nouveau_bo(bo);
++
++ if (unlikely(nvbo->kmap.virtual))
++ ttm_bo_kunmap(&nvbo->kmap);
++
++ if (unlikely(nvbo->gem))
++ DRM_ERROR("bo %p still attached to GEM object\n", bo);
++ kfree(nvbo);
++}
++
++int
++nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
++ int size, int align, uint32_t flags, uint32_t tile_mode,
++ uint32_t tile_flags, bool no_vm, bool mappable,
++ struct nouveau_bo **pnvbo)
++{
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
++ struct nouveau_bo *nvbo;
++ int ret;
++
++ nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
++ if (!nvbo)
++ return -ENOMEM;
++ nvbo->mappable = mappable;
++ nvbo->no_vm = no_vm;
++ nvbo->tile_mode = tile_mode;
++ nvbo->tile_flags = tile_flags;
++
++ if (!nvbo->mappable && (flags & TTM_PL_FLAG_VRAM))
++ flags |= TTM_PL_FLAG_PRIV0;
++
++ align >>= PAGE_SHIFT;
++
++ size = (size + (PAGE_SIZE-1)) & ~(PAGE_SIZE-1);
++ if (dev_priv->card_type == NV_50) {
++ size = (size + 65535) & ~65535;
++ if (align < (65536 / PAGE_SIZE))
++ align = (65536 / PAGE_SIZE);
++ }
++
++ nvbo->channel = chan;
++ ret = ttm_buffer_object_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
++ ttm_bo_type_device, flags, align,
++ 0, false, NULL, size, nouveau_bo_del_ttm);
++ nvbo->channel = NULL;
++ if (ret) {
++ /* ttm will call nouveau_bo_del_ttm if it fails.. */
++ return ret;
++ }
++
++ *pnvbo = nvbo;
++ return 0;
++}
++
++int
++nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
++{
++ struct ttm_buffer_object *bo = &nvbo->bo;
++ int ret;
++
++ if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
++ NV_ERROR(nouveau_bdev(bo->bdev)->dev,
++ "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
++ 1 << bo->mem.mem_type, memtype);
++ return -EINVAL;
++ }
++
++ if (nvbo->pin_refcnt++)
++ return 0;
++
++ bo->proposed_placement &= ~TTM_PL_MASK_MEM;
++ bo->proposed_placement |= (memtype & TTM_PL_MASK_MEM);
++ bo->proposed_placement |= TTM_PL_FLAG_NO_EVICT;
++
++ ret = ttm_bo_reserve(bo, false, false, false, 0);
++ if (ret)
++ goto out;
++
++ ret = ttm_buffer_object_validate(bo, bo->proposed_placement,
++ false, false);
++ ttm_bo_unreserve(bo);
++out:
++ if (unlikely(ret))
++ nvbo->pin_refcnt--;
++ return ret;
++}
++
++int
++nouveau_bo_unpin(struct nouveau_bo *nvbo)
++{
++ struct ttm_buffer_object *bo = &nvbo->bo;
++ int ret;
++
++ if (--nvbo->pin_refcnt)
++ return 0;
++
++ bo->proposed_placement &= ~TTM_PL_FLAG_NO_EVICT;
++
++ ret = ttm_bo_reserve(bo, false, false, false, 0);
++ if (ret)
++ return ret;
++
++ ret = ttm_buffer_object_validate(bo, bo->proposed_placement,
++ false, false);
++ ttm_bo_unreserve(bo);
++ return ret;
++}
++
++int
++nouveau_bo_map(struct nouveau_bo *nvbo)
++{
++ int ret;
++
++ ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
++ if (ret)
++ return ret;
++
++ ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
++ ttm_bo_unreserve(&nvbo->bo);
++ return ret;
++}
++
++void
++nouveau_bo_unmap(struct nouveau_bo *nvbo)
++{
++ if (nvbo->kmap.virtual) {
++ ttm_bo_kunmap(&nvbo->kmap);
++ nvbo->kmap.virtual = NULL;
++ }
++}
++
+static struct ttm_backend *
+nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev)
+{
@@ -5742,7 +5876,8 @@ index 0000000..be07b22
+ return 0;
+ }
+
-+ if (dev_priv->card_type == NV_50 && nvbo->tile_flags)
++ if (dev_priv->card_type == NV_50 && (nvbo->tile_flags ||
++ (dev_priv->sfb_gem && dev_priv->sfb_gem->driver_private == nvbo)))
+ return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+
+ if (new_mem->mem_type == TTM_PL_SYSTEM) {
@@ -6492,10 +6627,10 @@ index 0000000..7df2f63
+#endif /* __NOUVEAU_CONNECTOR_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h b/drivers/gpu/drm/nouveau/nouveau_crtc.h
new file mode 100644
-index 0000000..62f273e
+index 0000000..d8f18f9
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h
-@@ -0,0 +1,91 @@
+@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -6567,8 +6702,6 @@ index 0000000..62f273e
+
+ int (*set_dither) (struct nouveau_crtc *crtc, bool update);
+ int (*set_scale) (struct nouveau_crtc *crtc, int mode, bool update);
-+ int (*set_clock) (struct nouveau_crtc *crtc, struct drm_display_mode *);
-+ int (*set_clock_mode) (struct nouveau_crtc *crtc);
+ int (*destroy) (struct nouveau_crtc *crtc);
+};
+#define to_nouveau_crtc(x) container_of((x), struct nouveau_crtc, base)
@@ -7190,10 +7323,10 @@ index 0000000..36a387a
+MODULE_LICENSE("GPL and additional rights");
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
new file mode 100644
-index 0000000..682e5a2
+index 0000000..d98895d
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
-@@ -0,0 +1,1022 @@
+@@ -0,0 +1,1028 @@
+/*
+ * Copyright 2005 Stephane Marchesin.
+ * All Rights Reserved.
@@ -7716,6 +7849,8 @@ index 0000000..682e5a2
+ struct backlight_device *backlight;
+
+ struct nv50_evo_channel evo;
++
++ struct drm_gem_object *sfb_gem;
+};
+
+static inline int
@@ -8042,8 +8177,16 @@ index 0000000..682e5a2
+/* nv04_crtc.c */
+extern int nv04_crtc_create(struct drm_device *, int index);
+
-+/* nouveau_buffer.c */
++/* nouveau_bo.c */
+extern struct ttm_bo_driver nouveau_bo_driver;
++extern int nouveau_bo_new(struct drm_device *, struct nouveau_channel *,
++ int size, int align, uint32_t flags,
++ uint32_t tile_mode, uint32_t tile_flags,
++ bool no_vm, bool mappable, struct nouveau_bo **);
++extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);
++extern int nouveau_bo_unpin(struct nouveau_bo *);
++extern int nouveau_bo_map(struct nouveau_bo *);
++extern void nouveau_bo_unmap(struct nouveau_bo *);
+
+/* nouveau_fence.c */
+struct nouveau_fence;
@@ -8061,16 +8204,12 @@ index 0000000..682e5a2
+extern void nouveau_fence_handler(struct drm_device *dev, int channel);
+
+/* nouveau_gem.c */
++extern int nouveau_gem_new(struct drm_device *, struct nouveau_channel *,
++ int size, int align, uint32_t flags,
++ uint32_t tile_mode, uint32_t tile_flags,
++ bool no_vm, bool mappable, struct nouveau_bo **);
+extern int nouveau_gem_object_new(struct drm_gem_object *);
+extern void nouveau_gem_object_del(struct drm_gem_object *);
-+extern int nouveau_bo_new(struct drm_device *, struct nouveau_channel *,
-+ int size, int align, uint32_t flags,
-+ uint32_t tile_mode, uint32_t tile_flags,
-+ bool no_vm, bool mappable, struct nouveau_bo **);
-+extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags);
-+extern int nouveau_bo_unpin(struct nouveau_bo *);
-+extern int nouveau_bo_map(struct nouveau_bo *);
-+extern void nouveau_bo_unmap(struct nouveau_bo *);
+extern int nouveau_gem_ioctl_new(struct drm_device *, void *,
+ struct drm_file *);
+extern int nouveau_gem_ioctl_pushbuf(struct drm_device *, void *,
@@ -8326,10 +8465,10 @@ index 0000000..f28d247
+#endif /* __NOUVEAU_FB_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
new file mode 100644
-index 0000000..24b7140
+index 0000000..075a4a7
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
-@@ -0,0 +1,1023 @@
+@@ -0,0 +1,1016 @@
+/*
+ * Copyright © 2007 David Airlie
+ *
@@ -8848,8 +8987,8 @@ index 0000000..24b7140
+ size = mode_cmd.pitch * mode_cmd.height;
+ size = ALIGN(size, PAGE_SIZE);
+
-+ ret = nouveau_bo_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
-+ 0, 0x0000, false, true, &nvbo);
++ ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
++ 0, 0x0000, false, true, &nvbo);
+ if (ret) {
+ NV_ERROR(dev, "failed to allocate framebuffer\n");
+ goto out;
@@ -8862,13 +9001,6 @@ index 0000000..24b7140
+ goto out;
+ }
+
-+ nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
-+ if (!nvbo->gem) {
-+ nouveau_bo_ref(NULL, &nvbo);
-+ goto out;
-+ }
-+ nvbo->gem->driver_private = nvbo;
-+
+ mutex_lock(&dev->struct_mutex);
+
+ fb = nouveau_framebuffer_create(dev, nvbo, &mode_cmd);
@@ -10326,10 +10458,10 @@ index 0000000..fb9024e
+int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
new file mode 100644
-index 0000000..9573bd8
+index 0000000..64b5625
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
-@@ -0,0 +1,884 @@
+@@ -0,0 +1,765 @@
+/*
+ * Copyright (C) 2008 Ben Skeggs.
+ * All Rights Reserved.
@@ -10391,139 +10523,30 @@ index 0000000..9573bd8
+ ttm_bo_unref(&bo);
+}
+
-+static void
-+nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
-+{
-+ struct nouveau_bo *nvbo = nouveau_bo(bo);
-+
-+ if (unlikely(nvbo->kmap.virtual))
-+ ttm_bo_kunmap(&nvbo->kmap);
-+
-+ if (unlikely(nvbo->gem))
-+ DRM_ERROR("bo %p still attached to GEM object\n", bo);
-+ kfree(nvbo);
-+}
-+
+int
-+nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
-+ int size, int align, uint32_t flags, uint32_t tile_mode,
-+ uint32_t tile_flags, bool no_vm, bool mappable,
-+ struct nouveau_bo **pnvbo)
++nouveau_gem_new(struct drm_device *dev, struct nouveau_channel *chan,
++ int size, int align, uint32_t flags, uint32_t tile_mode,
++ uint32_t tile_flags, bool no_vm, bool mappable,
++ struct nouveau_bo **pnvbo)
+{
-+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct nouveau_bo *nvbo;
+ int ret;
+
-+ nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
-+ if (!nvbo)
-+ return -ENOMEM;
-+ nvbo->mappable = mappable;
-+ nvbo->no_vm = no_vm;
-+ nvbo->tile_mode = tile_mode;
-+ nvbo->tile_flags = tile_flags;
-+
-+ if (!nvbo->mappable && (flags & TTM_PL_FLAG_VRAM))
-+ flags |= TTM_PL_FLAG_PRIV0;
-+
-+ align >>= PAGE_SHIFT;
-+
-+ size = (size + (PAGE_SIZE-1)) & ~(PAGE_SIZE-1);
-+ if (dev_priv->card_type == NV_50) {
-+ size = (size + 65535) & ~65535;
-+ if (align < (65536 / PAGE_SIZE))
-+ align = (65536 / PAGE_SIZE);
-+ }
-+
-+ nvbo->channel = chan;
-+ ret = ttm_buffer_object_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
-+ ttm_bo_type_device, flags, align,
-+ 0, false, NULL, size, nouveau_bo_del_ttm);
-+ nvbo->channel = NULL;
-+ if (ret) {
-+ /* ttm will call nouveau_bo_del_ttm if it fails.. */
-+ return ret;
-+ }
-+
-+ *pnvbo = nvbo;
-+ return 0;
-+}
-+
-+int
-+nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
-+{
-+ struct ttm_buffer_object *bo = &nvbo->bo;
-+ int ret;
-+
-+ if (nvbo->pin_refcnt &&
-+ (bo->proposed_placement & TTM_PL_MASK_MEM) != memtype) {
-+ NV_ERROR(nouveau_bdev(bo->bdev)->dev,
-+ "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
-+ bo->proposed_placement, memtype);
-+ return -EINVAL;
-+ }
-+
-+ if (nvbo->pin_refcnt++)
-+ return 0;
-+
-+ bo->proposed_placement &= ~TTM_PL_MASK_MEM;
-+ bo->proposed_placement |= (memtype & TTM_PL_MASK_MEM);
-+ bo->proposed_placement |= TTM_PL_FLAG_NO_EVICT;
-+
-+ ret = ttm_bo_reserve(bo, false, false, false, 0);
-+ if (ret)
-+ goto out;
-+
-+ ret = ttm_buffer_object_validate(bo, bo->proposed_placement,
-+ false, false);
-+ ttm_bo_unreserve(bo);
-+out:
-+ if (unlikely(ret))
-+ nvbo->pin_refcnt--;
-+ return ret;
-+}
-+
-+int
-+nouveau_bo_unpin(struct nouveau_bo *nvbo)
-+{
-+ struct ttm_buffer_object *bo = &nvbo->bo;
-+ int ret;
-+
-+ if (--nvbo->pin_refcnt)
-+ return 0;
-+
-+ bo->proposed_placement &= ~TTM_PL_FLAG_NO_EVICT;
-+
-+ ret = ttm_bo_reserve(bo, false, false, false, 0);
-+ if (ret)
-+ return ret;
-+
-+ ret = ttm_buffer_object_validate(bo, bo->proposed_placement,
-+ false, false);
-+ ttm_bo_unreserve(bo);
-+ return ret;
-+}
-+
-+int
-+nouveau_bo_map(struct nouveau_bo *nvbo)
-+{
-+ int ret;
-+
-+ ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
++ ret = nouveau_bo_new(dev, chan, size, align, flags, tile_mode,
++ tile_flags, no_vm, mappable, pnvbo);
+ if (ret)
+ return ret;
++ nvbo = *pnvbo;
+
-+ ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
-+ ttm_bo_unreserve(&nvbo->bo);
-+ return ret;
-+}
-+
-+void
-+nouveau_bo_unmap(struct nouveau_bo *nvbo)
-+{
-+ if (nvbo->kmap.virtual) {
-+ ttm_bo_kunmap(&nvbo->kmap);
-+ nvbo->kmap.virtual = NULL;
++ nvbo->gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
++ if (!nvbo->gem) {
++ nouveau_bo_ref(NULL, pnvbo);
++ return -ENOMEM;
+ }
++
++ nvbo->bo.persistant_swap_storage = nvbo->gem->filp;
++ nvbo->gem->driver_private = nvbo;
++ return 0;
+}
+
+static int
@@ -10551,7 +10574,6 @@ index 0000000..9573bd8
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct drm_nouveau_gem_new *req = data;
+ struct nouveau_bo *nvbo = NULL;
-+ struct drm_gem_object *gem;
+ struct nouveau_channel *chan = NULL;
+ uint32_t flags = 0;
+ int ret = 0;
@@ -10589,23 +10611,14 @@ index 0000000..9573bd8
+ return -EINVAL;
+ }
+
-+ ret = nouveau_bo_new(dev, chan, req->info.size, req->align, flags,
-+ req->info.tile_mode, req->info.tile_flags, false,
-+ !!(req->info.domain & NOUVEAU_GEM_DOMAIN_MAPPABLE),
-+ &nvbo);
++ ret = nouveau_gem_new(dev, chan, req->info.size, req->align, flags,
++ req->info.tile_mode, req->info.tile_flags, false,
++ (req->info.domain & NOUVEAU_GEM_DOMAIN_MAPPABLE),
++ &nvbo);
+ if (ret)
+ return ret;
+
-+ gem = drm_gem_object_alloc(dev, nvbo->bo.mem.size);
-+ if (!gem) {
-+ nouveau_bo_ref(NULL, &nvbo);
-+ return -ENOMEM;
-+ }
-+
-+ gem->driver_private = nvbo;
-+ nvbo->gem = gem;
-+
-+ ret = nouveau_gem_info(gem, &req->info);
++ ret = nouveau_gem_info(nvbo->gem, &req->info);
+ if (ret)
+ goto out;
+
@@ -13079,10 +13092,10 @@ index 0000000..f55ae7a
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
new file mode 100644
-index 0000000..52fc92d
+index 0000000..f065207
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
-@@ -0,0 +1,613 @@
+@@ -0,0 +1,616 @@
+/*
+ * Copyright (C) 2006 Ben Skeggs.
+ *
@@ -13160,6 +13173,8 @@ index 0000000..52fc92d
+
+ if (status)
+ NV_ERROR(dev, "display irqs still pending: 0x%08x\n", status);
++
++ nv_wr32(NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
+}
+
+void
@@ -13686,6 +13701,7 @@ index 0000000..52fc92d
+
+ if (status & (NV_PMC_INTR_0_NV50_DISPLAY_PENDING |
+ NV_PMC_INTR_0_NV50_I2C_PENDING)) {
++ nv_wr32(NV03_PMC_INTR_EN_0, 0);
+ schedule_work(&dev_priv->irq_work);
+ status &= ~(NV_PMC_INTR_0_NV50_DISPLAY_PENDING |
+ NV_PMC_INTR_0_NV50_I2C_PENDING);
@@ -15540,10 +15556,10 @@ index 0000000..2465b98
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h
new file mode 100644
-index 0000000..158935b
+index 0000000..310a540
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
-@@ -0,0 +1,841 @@
+@@ -0,0 +1,847 @@
+
+
+#define NV03_BOOT_0 0x00100000
@@ -16230,20 +16246,21 @@ index 0000000..158935b
+#define NV50_PDISPLAY__LEN 0x1
+#define NV50_PDISPLAY__ESIZE 0x10000
+# define NV50_PDISPLAY_OBJECTS 0x00610010
-+# define NV50_PDISPLAY_SUPERVISOR 0x00610024
-+# define NV50_PDISPLAY_SUPERVISOR_CRTCn 0x0000000c
-+# define NV50_PDISPLAY_SUPERVISOR_CRTCn__SHIFT 2
-+# define NV50_PDISPLAY_SUPERVISOR_CRTC0 (1<<2)
-+# define NV50_PDISPLAY_SUPERVISOR_CRTC1 (1<<3)
-+# define NV50_PDISPLAY_SUPERVISOR_CLK_MASK 0x00000070
-+# define NV50_PDISPLAY_SUPERVISOR_CLK_MASK__SHIFT 4
-+# define NV50_PDISPLAY_SUPERVISOR_CLK_UPDATE (1<<5)
-+# define NV50_PDISPLAY_SUPERVISOR_INTR 0x0061002c
-+# define NV50_PDISPLAY_SUPERVISOR_INTR_VBLANK_CRTC0 (1<<2)
-+# define NV50_PDISPLAY_SUPERVISOR_INTR_VBLANK_CRTC1 (1<<3)
-+# define NV50_PDISPLAY_SUPERVISOR_INTR_UNK1 (1<<4)
-+# define NV50_PDISPLAY_SUPERVISOR_INTR_CLK_UPDATE (1<<5)
-+# define NV50_PDISPLAY_SUPERVISOR_INTR_UNK4 (1<<6)
++# define NV50_PDISPLAY_INTR 0x00610024
++# define NV50_PDISPLAY_INTR_VBLANK_CRTCn 0x0000000c
++# define NV50_PDISPLAY_INTR_VBLANK_CRTCn__SHIFT 2
++# define NV50_PDISPLAY_INTR_VBLANK_CRTC(n) (1 << ((n) + 2))
++# define NV50_PDISPLAY_INTR_VBLANK_CRTC0 (1<<2)
++# define NV50_PDISPLAY_INTR_VBLANK_CRTC1 (1<<3)
++# define NV50_PDISPLAY_INTR_CLK_UNK10 (1<<4)
++# define NV50_PDISPLAY_INTR_CLK_UNK20 (1<<5)
++# define NV50_PDISPLAY_INTR_CLK_UNK40 (1<<6)
++# define NV50_PDISPLAY_INTR_EN 0x0061002c
++# define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC0 (1<<2)
++# define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC1 (1<<3)
++# define NV50_PDISPLAY_INTR_EN_CLK_UNK10 (1<<4)
++# define NV50_PDISPLAY_INTR_EN_CLK_UNK20 (1<<5)
++# define NV50_PDISPLAY_INTR_EN_CLK_UNK40 (1<<6)
+# define NV50_PDISPLAY_UNK30_CTRL 0x00610030
+# define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK0 (1<<9)
+# define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK1 (1<<10)
@@ -16283,58 +16300,63 @@ index 0000000..158935b
+# define NV50_PDISPLAY_RAM_AMOUNT 0x00610384
+# define NV50_PDISPLAY_UNK_388 0x00610388
+# define NV50_PDISPLAY_UNK_38C 0x0061038c
-+# define NV50_PDISPLAY_CRTC_VAL 0x00610a00
-+# define NV50_PDISPLAY_CRTC_VAL__LEN 0x2
-+# define NV50_PDISPLAY_CRTC_VAL_UNK_900(i,j) (0x00610a18+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_CLUT_MODE(i,j) (0x00610a24+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_INTERLACE(i,j) (0x00610a48+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SCALE_CTRL(i,j) (0x00610a50+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_CURSOR_CTRL(i,j) (0x00610a58+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_UNK_904(i,j) (0x00610ab8+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_DEPTH(i,j) (0x00610ac8+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_CLOCK(i,j) (0x00610ad0+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_COLOR_CTRL(i,j) (0x00610ae0+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SYNC_START_TO_BLANK_END(i,j) (0x00610ae8+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_MODE_UNK1(i,j) (0x00610af0+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_DISPLAY_TOTAL(i,j) (0x00610af8+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SYNC_DURATION(i,j) (0x00610b00+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_MODE_UNK2(i,j) (0x00610b08+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_UNK_828(i,j) (0x00610b10+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_FB_SIZE(i,j) (0x00610b18+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_FB_PITCH(i,j) (0x00610b20+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_FB_PITCH_LINEAR_FB (1<<20)
-+# define NV50_PDISPLAY_CRTC_VAL_FB_POS(i,j) (0x00610b28+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SCALE_CENTER_OFFSET(i,j) (0x00610b38+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_REAL_RES(i,j) (0x00610b40+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SCALE_RES1(i,j) (0x00610b48+(i)*0x540+(j)*0x4)
-+# define NV50_PDISPLAY_CRTC_VAL_SCALE_RES2(i,j) (0x00610b50+(i)*0x540+(j)*0x4)
-+
-+
-+# define NV50_PDISPLAY_DAC_VAL_MODE_CTRL(i,j) (0x00610b58+(i)*0x8+(j)*0x4)
-+
-+
-+# define NV50_PDISPLAY_SOR_VAL_MODE_CTRL(i,j) (0x00610b70+(i)*0x8+(j)*0x4)
-+
-+
-+# define NV50_PDISPLAY_DAC_VAL_MODE_CTRL2(i,j) (0x00610bdc+(i)*0x8+(j)*0x4)
-+
-+
-+# define NV50_PDISPLAY_CRTC_CLK 0x00614000
-+# define NV50_PDISPLAY_CRTC_CLK__LEN 0x2
-+# define NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1(i) (0x00614100+(i)*0x800)
-+# define NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1_CONNECTED 0x00000600
-+# define NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1_CONNECTED__SHIFT 9
-+# define NV50_PDISPLAY_CRTC_CLK_VPLL_A(i) (0x00614104+(i)*0x800)
-+# define NV50_PDISPLAY_CRTC_CLK_VPLL_B(i) (0x00614108+(i)*0x800)
-+# define NV50_PDISPLAY_CRTC_CLK_CLK_CTRL2(i) (0x00614200+(i)*0x800)
-+
-+# define NV50_PDISPLAY_DAC_CLK 0x00614000
-+# define NV50_PDISPLAY_DAC_CLK__LEN 0x3
-+# define NV50_PDISPLAY_DAC_CLK_CLK_CTRL2(i) (0x00614280+(i)*0x800)
-+
-+# define NV50_PDISPLAY_SOR_CLK 0x00614000
-+# define NV50_PDISPLAY_SOR_CLK__LEN 0x3
-+# define NV50_PDISPLAY_SOR_CLK_CLK_CTRL2(i) (0x00614300+(i)*0x800)
++#define NV50_PDISPLAY_CRTC_P(i,r) ((i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
++#define NV50_PDISPLAY_CRTC_C(i,r) (4 + (i) * 0x540 + NV50_PDISPLAY_CRTC_##r)
++#define NV50_PDISPLAY_CRTC_UNK_0A18 /* mthd 0x0900 */ 0x00610a18
++#define NV50_PDISPLAY_CRTC_CLUT_MODE 0x00610a24
++#define NV50_PDISPLAY_CRTC_INTERLACE 0x00610a48
++#define NV50_PDISPLAY_CRTC_SCALE_CTRL 0x00610a50
++#define NV50_PDISPLAY_CRTC_CURSOR_CTRL 0x00610a58
++#define NV50_PDISPLAY_CRTC_UNK0A78 /* mthd 0x0904 */ 0x00610a78
++#define NV50_PDISPLAY_CRTC_UNK0AB8 0x00610ab8
++#define NV50_PDISPLAY_CRTC_DEPTH 0x00610ac8
++#define NV50_PDISPLAY_CRTC_CLOCK 0x00610ad0
++#define NV50_PDISPLAY_CRTC_COLOR_CTRL 0x00610ae0
++#define NV50_PDISPLAY_CRTC_SYNC_START_TO_BLANK_END 0x00610ae8
++#define NV50_PDISPLAY_CRTC_MODE_UNK1 0x00610af0
++#define NV50_PDISPLAY_CRTC_DISPLAY_TOTAL 0x00610af8
++#define NV50_PDISPLAY_CRTC_SYNC_DURATION 0x00610b00
++#define NV50_PDISPLAY_CRTC_MODE_UNK2 0x00610b08
++#define NV50_PDISPLAY_CRTC_UNK_0B10 /* mthd 0x0828 */ 0x00610b10
++#define NV50_PDISPLAY_CRTC_FB_SIZE 0x00610b18
++#define NV50_PDISPLAY_CRTC_FB_PITCH 0x00610b20
++#define NV50_PDISPLAY_CRTC_FB_PITCH_LINEAR 0x00100000
++#define NV50_PDISPLAY_CRTC_FB_POS 0x00610b28
++#define NV50_PDISPLAY_CRTC_SCALE_CENTER_OFFSET 0x00610b38
++#define NV50_PDISPLAY_CRTC_REAL_RES 0x00610b40
++#define NV50_PDISPLAY_CRTC_SCALE_RES1 0x00610b48
++#define NV50_PDISPLAY_CRTC_SCALE_RES2 0x00610b50
++
++#define NV50_PDISPLAY_DAC_MODE_CTRL_P(i) (0x00610b58 + (i) * 0x8)
++#define NV50_PDISPLAY_DAC_MODE_CTRL_C(i) (0x00610b5c + (i) * 0x8)
++#define NV50_PDISPLAY_SOR_MODE_CTRL_P(i) (0x00610b70 + (i) * 0x8)
++#define NV50_PDISPLAY_SOR_MODE_CTRL_C(i) (0x00610b74 + (i) * 0x8)
++#define NV50_PDISPLAY_DAC_MODE_CTRL2_P(i) (0x00610bdc + (i) * 0x8)
++#define NV50_PDISPLAY_DAC_MODE_CTRL2_C(i) (0x00610be0 + (i) * 0x8)
++
++#define NV90_PDISPLAY_SOR_MODE_CTRL_P(i) (0x00610794 + (i) * 0x8)
++#define NV90_PDISPLAY_SOR_MODE_CTRL_C(i) (0x00610798 + (i) * 0x8)
++#define NV90_PDISPLAY_DAC_MODE_CTRL_P(i) (0x00610b58 + (i) * 0x8)
++#define NV90_PDISPLAY_DAC_MODE_CTRL_C(i) (0x00610b5c + (i) * 0x8)
++#define NV90_PDISPLAY_DAC_MODE_CTRL2_P(i) (0x00610b80 + (i) * 0x8)
++#define NV90_PDISPLAY_DAC_MODE_CTRL2_C(i) (0x00610b84 + (i) * 0x8)
++
++#define NV50_PDISPLAY_CRTC_CLK 0x00614000
++#define NV50_PDISPLAY_CRTC_CLK__LEN 0x2
++#define NV50_PDISPLAY_CRTC_CLK_CTRL1(i) ((i) * 0x800 + 0x614100)
++#define NV50_PDISPLAY_CRTC_CLK_CTRL1_CONNECTED 0x00000600
++#define NV50_PDISPLAY_CRTC_CLK_CTRL1_CONNECTED__SHIFT 9
++#define NV50_PDISPLAY_CRTC_CLK_VPLL_A(i) ((i) * 0x800 + 0x614104)
++#define NV50_PDISPLAY_CRTC_CLK_VPLL_B(i) ((i) * 0x800 + 0x614108)
++#define NV50_PDISPLAY_CRTC_CLK_CTRL2(i) ((i) * 0x800 + 0x614200)
++
++#define NV50_PDISPLAY_DAC_CLK 0x00614000
++#define NV50_PDISPLAY_DAC_CLK__LEN 0x3
++#define NV50_PDISPLAY_DAC_CLK_CTRL2(i) ((i) * 0x800 + 0x614280)
++
++#define NV50_PDISPLAY_SOR_CLK 0x00614000
++#define NV50_PDISPLAY_SOR_CLK__LEN 0x3
++#define NV50_PDISPLAY_SOR_CLK_CTRL2(i) ((i) * 0x800 + 0x614300)
+
+# define NV50_PDISPLAY_DAC_REGS 0x0061a000
+# define NV50_PDISPLAY_DAC_REGS__LEN 0x3
@@ -16722,10 +16744,10 @@ index 0000000..1380845
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
new file mode 100644
-index 0000000..ba66375
+index 0000000..5d91c3f
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
-@@ -0,0 +1,966 @@
+@@ -0,0 +1,1031 @@
+/*
+ * Copyright 2005 Stephane Marchesin
+ * Copyright 2008 Stuart Bennett
@@ -16764,6 +16786,49 @@ index 0000000..ba66375
+static int nouveau_stub_init(struct drm_device *dev) { return 0; }
+static void nouveau_stub_takedown(struct drm_device *dev) {}
+
++static int
++sfbhack_init(struct drm_device *dev)
++{
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
++ struct nouveau_bo *nvbo = NULL;
++ int ret, size;
++
++ if (dev_priv->sfb_gem)
++ return 0;
++
++ size = nouveau_mem_fb_amount(dev);
++ if (size > drm_get_resource_len(dev, 1))
++ size = drm_get_resource_len(dev, 1);
++ size >>= 1;
++
++ ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
++ 0, 0x0000, false, true, &nvbo);
++ if (ret)
++ return ret;
++
++ ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM);
++ if (ret) {
++ nouveau_bo_ref(NULL, &nvbo);
++ return ret;
++ }
++
++ dev_priv->sfb_gem = nvbo->gem;
++ return 0;
++}
++
++static void
++sfbhack_takedown(struct drm_device *dev)
++{
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
++
++ if (dev_priv->sfb_gem) {
++ mutex_lock(&dev->struct_mutex);
++ drm_gem_object_unreference(dev_priv->sfb_gem);
++ mutex_unlock(&dev->struct_mutex);
++ dev_priv->sfb_gem = NULL;
++ }
++}
++
+static int nouveau_init_engine_ptrs(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -17354,6 +17419,8 @@ index 0000000..ba66375
+/* KMS: we need mmio at load time, not when the first drm client opens. */
+void nouveau_lastclose(struct drm_device *dev)
+{
++ sfbhack_takedown(dev);
++
+ if (drm_core_check_feature(dev, DRIVER_MODESET))
+ return;
+
@@ -17392,6 +17459,8 @@ index 0000000..ba66375
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ struct drm_nouveau_getparam *getparam = data;
++ uint32_t sfb_handle;
++ int ret;
+
+ NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
+
@@ -17441,6 +17510,24 @@ index 0000000..ba66375
+ case NOUVEAU_GETPARAM_VM_VRAM_BASE:
+ getparam->value = dev_priv->vm_vram_base;
+ break;
++ case 0xdeadcafe00000001: /* NOUVEAU_GETPARAM_SHAREDFB_HANDLE */
++ ret = sfbhack_init(dev);
++ if (ret)
++ return ret;
++
++ ret = drm_gem_handle_create(file_priv, dev_priv->sfb_gem,
++ &sfb_handle);
++ if (ret)
++ return ret;
++ getparam->value = sfb_handle;
++ break;
++ case 0xdeadcafe00000002: /* NOUVEAU_GETPARAM_SHAREDFB_SIZE */
++ ret = sfbhack_init(dev);
++ if (ret)
++ return ret;
++
++ getparam->value = dev_priv->sfb_gem->size;
++ break;
+ default:
+ NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
+ return -EINVAL;
@@ -26930,10 +27017,10 @@ index 0000000..e1595f9
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
new file mode 100644
-index 0000000..ecec1a9
+index 0000000..d8e8f1b
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
-@@ -0,0 +1,822 @@
+@@ -0,0 +1,807 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -27235,11 +27322,10 @@ index 0000000..ecec1a9
+ return 0;
+}
+
-+static int
-+nv50_crtc_set_clock(struct nouveau_crtc *crtc, struct drm_display_mode *mode)
++int
++nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
+{
-+ uint32_t pll_reg = NV50_PDISPLAY_CRTC_CLK_CLK_CTRL1(crtc->index);
-+ struct drm_device *dev = crtc->base.dev;
++ uint32_t pll_reg = NV50_PDISPLAY_CRTC_CLK_CTRL1(head);
+ struct nouveau_pll_vals pll;
+ struct pll_lims limits;
+ uint32_t reg1, reg2;
@@ -27266,7 +27352,7 @@ index 0000000..ecec1a9
+ limits.max_usable_log2p = 6;
+ }
+
-+ ret = nouveau_calc_pll_mnp(dev, &limits, mode->clock, &pll);
++ ret = nouveau_calc_pll_mnp(dev, &limits, pclk, &pll);
+ if (ret <= 0)
+ return ret;
+
@@ -27287,18 +27373,6 @@ index 0000000..ecec1a9
+ return 0;
+}
+
-+static int nv50_crtc_set_clock_mode(struct nouveau_crtc *crtc)
-+{
-+ struct drm_device *dev = crtc->base.dev;
-+
-+ NV_DEBUG(dev, "\n");
-+
-+ /* This acknowledges a clock request. */
-+ nv_wr32(NV50_PDISPLAY_CRTC_CLK_CLK_CTRL2(crtc->index), 0);
-+
-+ return 0;
-+}
-+
+static void nv50_crtc_destroy(struct drm_crtc *drm_crtc)
+{
+ struct drm_device *dev = drm_crtc->dev;
@@ -27742,8 +27816,6 @@ index 0000000..ecec1a9
+ /* set function pointers */
+ crtc->set_dither = nv50_crtc_set_dither;
+ crtc->set_scale = nv50_crtc_set_scale;
-+ crtc->set_clock = nv50_crtc_set_clock;
-+ crtc->set_clock_mode = nv50_crtc_set_clock_mode;
+
+ crtc->mode_set.crtc = &crtc->base;
+ crtc->mode_set.connectors = (struct drm_connector **)(crtc + 1);
@@ -27942,10 +28014,10 @@ index 0000000..23234e5
+
diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
new file mode 100644
-index 0000000..59296fd
+index 0000000..2da910e
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_dac.c
-@@ -0,0 +1,298 @@
+@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -28010,7 +28082,7 @@ index 0000000..59296fd
+
+ NV_DEBUG(dev, "or %d\n", encoder->or);
+
-+ nv_wr32(NV50_PDISPLAY_DAC_CLK_CLK_CTRL2(encoder->or), 0);
++ nv_wr32(NV50_PDISPLAY_DAC_CLK_CTRL2(encoder->or), 0);
+ return 0;
+}
+
@@ -28159,6 +28231,11 @@ index 0000000..59296fd
+
+ NV_DEBUG(dev, "or %d\n", encoder->or);
+
++ ret = dev_priv->in_modeset;
++ dev_priv->in_modeset = false;
++ nv50_dac_dpms(drm_encoder, DRM_MODE_DPMS_ON);
++ dev_priv->in_modeset = ret;
++
+ if (crtc->index == 1)
+ mode_ctl |= NV50_DAC_MODE_CTRL_CRTC1;
+ else
@@ -28246,10 +28323,10 @@ index 0000000..59296fd
+
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
new file mode 100644
-index 0000000..71bbd89
+index 0000000..5c38c78
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
-@@ -0,0 +1,637 @@
+@@ -0,0 +1,728 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -28401,8 +28478,8 @@ index 0000000..71bbd89
+ /* The precise purpose is unknown, i suspect it has something to do
+ * with text mode.
+ */
-+ if (nv_rd32(NV50_PDISPLAY_SUPERVISOR) & 0x100) {
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR, 0x100);
++ if (nv_rd32(NV50_PDISPLAY_INTR) & 0x100) {
++ nv_wr32(NV50_PDISPLAY_INTR, 0x100);
+ nv_wr32(0x006194e8, nv_rd32(0x006194e8) & ~1);
+ if (!nv_wait(0x006194e8, 2, 0)) {
+ NV_ERROR(dev, "timeout: (0x6194e8 & 2) != 0\n");
@@ -28496,7 +28573,9 @@ index 0000000..71bbd89
+ FIRE_RING (&evo->chan);
+
+ /* enable clock change interrupts. */
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR_INTR, 0x70);
++ nv_wr32(NV50_PDISPLAY_INTR_EN, (NV50_PDISPLAY_INTR_EN_CLK_UNK10 |
++ NV50_PDISPLAY_INTR_EN_CLK_UNK20 |
++ NV50_PDISPLAY_INTR_EN_CLK_UNK40));
+
+ /* enable hotplug interrupts */
+ nv_wr32(NV50_PCONNECTOR_HOTPLUG_CTRL, 0x7FFF7FFF);
@@ -28525,25 +28604,22 @@ index 0000000..71bbd89
+ OUT_RING (&dev_priv->evo.chan, 0);
+ FIRE_RING (&dev_priv->evo.chan);
+
-+ /* Almost like ack'ing a vblank interrupt, maybe in the spirit of cleaning up? */
++ /* Almost like ack'ing a vblank interrupt, maybe in the spirit of
++ * cleaning up?
++ */
+ list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
+ struct nouveau_crtc *crtc = to_nouveau_crtc(drm_crtc);
++ uint32_t mask = NV50_PDISPLAY_INTR_VBLANK_CRTC(crtc->index);
+
-+ if (crtc->base.enabled) {
-+ uint32_t mask;
-+
-+ if (crtc->index == 1)
-+ mask = NV50_PDISPLAY_SUPERVISOR_CRTC1;
-+ else
-+ mask = NV50_PDISPLAY_SUPERVISOR_CRTC0;
++ if (!crtc->base.enabled)
++ continue;
+
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR, mask);
-+ if (!nv_wait(NV50_PDISPLAY_SUPERVISOR, mask, mask)) {
-+ NV_ERROR(dev, "timeout: (0x610024 & 0x%08x) == "
-+ "0x%08x\n", mask, mask);
-+ NV_ERROR(dev, "0x610024 = 0x%08x\n",
-+ nv_rd32(0x610024));
-+ }
++ nv_wr32(NV50_PDISPLAY_INTR, mask);
++ if (!nv_wait(NV50_PDISPLAY_INTR, mask, mask)) {
++ NV_ERROR(dev, "timeout: (0x610024 & 0x%08x) == "
++ "0x%08x\n", mask, mask);
++ NV_ERROR(dev, "0x610024 = 0x%08x\n",
++ nv_rd32(NV50_PDISPLAY_INTR));
+ }
+ }
+
@@ -28564,9 +28640,8 @@ index 0000000..71bbd89
+ }
+ }
+
-+ /* disable clock change interrupts. */
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR_INTR,
-+ nv_rd32(NV50_PDISPLAY_SUPERVISOR_INTR) & ~0x70);
++ /* disable interrupts. */
++ nv_wr32(NV50_PDISPLAY_INTR_EN, 0x00000000);
+
+ /* disable hotplug interrupts */
+ nv_wr32(NV50_PCONNECTOR_HOTPLUG_INTR, 0);
@@ -28726,14 +28801,14 @@ index 0000000..71bbd89
+ }
+
+ if (clock_change)
-+ crtc->set_clock(crtc, crtc->mode);
++ nv50_crtc_set_clock(dev, crtc->index, crtc->mode->clock);
+
+ NV_DEBUG(dev, "index %d clock_change %d clock_ack %d\n", crtc_index, clock_change, clock_ack);
+
+ if (!clock_ack)
+ continue;
+
-+ crtc->set_clock_mode(crtc);
++ nv_wr32(NV50_PDISPLAY_CRTC_CLK_CTRL2(crtc->index), 0);
+
+ list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
+ encoder = to_nouveau_encoder(drm_encoder);
@@ -28750,149 +28825,242 @@ index 0000000..71bbd89
+void
+nv50_display_irq_handler_old(struct drm_device *dev)
+{
-+ uint32_t super = nv_rd32(NV50_PDISPLAY_SUPERVISOR);
++ uint32_t super = nv_rd32(NV50_PDISPLAY_INTR);
+ uint32_t state;
+
+ NV_DEBUG(dev, "0x610024 = 0x%08x\n", super);
+
+ if (super & 0x0000000c)
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR, super & 0x0000000c);
++ nv_wr32(NV50_PDISPLAY_INTR, super & 0x0000000c);
+
-+ state = (super & NV50_PDISPLAY_SUPERVISOR_CLK_MASK);
-+ state >>= NV50_PDISPLAY_SUPERVISOR_CLK_MASK__SHIFT;
++ state = (super >> 4) & 7;
+ if (state) {
+ if (state == 2)
+ nv50_display_vclk_update(dev);
+
-+ nv_wr32(NV50_PDISPLAY_SUPERVISOR,
-+ (super & NV50_PDISPLAY_SUPERVISOR_CLK_MASK));
++ nv_wr32(NV50_PDISPLAY_INTR, super & 0x00000070);
+ nv_wr32(NV50_PDISPLAY_UNK30_CTRL,
+ NV50_PDISPLAY_UNK30_CTRL_PENDING);
+ }
+}
+
+static int
-+nv50_crtc_encoder_from_610030(struct drm_device *dev,
-+ struct nouveau_crtc **pcrtc,
-+ struct nouveau_encoder **pencoder)
++nv50_display_irq_head(struct drm_device *dev, int *phead,
++ struct dcb_entry **pdcbent)
+{
-+ struct drm_encoder *drm_encoder;
-+ struct nouveau_encoder *encoder;
-+ struct drm_crtc *drm_crtc;
-+ struct nouveau_crtc *crtc;
-+ uint32_t unk30 = nv_rd32(0x610030);
-+ int mask = (unk30 >> 9) & 3;
++ struct drm_nouveau_private *dev_priv = dev->dev_private;
++ uint32_t unk30 = nv_rd32(NV50_PDISPLAY_UNK30_CTRL);
++ uint32_t dac = 0, sor = 0;
++ int head, i, or;
+
-+ *pcrtc = NULL;
-+ *pencoder = NULL;
++ /* We're assuming that head 0 *or* head 1 will be active here,
++ * and not both. I'm not sure if the hw will even signal both
++ * ever, but it definitely shouldn't for us as we commit each
++ * CRTC separately, and submission will be blocked by the GPU
++ * until we handle each in turn.
++ */
++ NV_DEBUG(dev, "0x610030: 0x%08x\n", unk30);
++ head = ffs((unk30 >> 9) & 3) - 1;
++ if (head < 0) {
++ NV_ERROR(dev, "no active heads: 0x%08x\n", nv_rd32(0x610030));
++ return -EINVAL;
++ }
+
-+ list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
-+ crtc = to_nouveau_crtc(drm_crtc);
-+ if (mask & (1 << crtc->index))
-+ break;
++ /* This assumes CRTCs are never bound to multiple encoders, which
++ * should be the case.
++ */
++ for (i = 0; i < 3; i++) {
++ if (nv_rd32(NV50_PDISPLAY_DAC_MODE_CTRL_P(i)) & (1 << head))
++ dac |= (1 << i);
+ }
+
-+ if (!(mask & (1 << crtc->index)))
-+ return -EINVAL;
++ if (dev_priv->chipset < 0x90 || dev_priv->chipset == 0x92 ||
++ dev_priv->chipset == 0xa0) {
++ for (i = 0; i < 4; i++) {
++ if (nv_rd32(NV50_PDISPLAY_SOR_MODE_CTRL_P(i)) & (1 << head))
++ sor |= (1 << i);
++ }
++ } else {
++ for (i = 0; i < 4; i++) {
++ if (nv_rd32(NV90_PDISPLAY_SOR_MODE_CTRL_P(i)) & (1 << head))
++ sor |= (1 << i);
++ }
++ }
+
-+ list_for_each_entry(drm_encoder, &dev->mode_config.encoder_list, head) {
-+ encoder = to_nouveau_encoder(drm_encoder);
-+ if (drm_encoder->crtc == drm_crtc)
-+ break;
++ NV_DEBUG(dev, "dac: 0x%08x, sor: 0x%08x\n", dac, sor);
++
++ if (dac && sor) {
++ NV_ERROR(dev, "multiple encoders: 0x%08x 0x%08x\n", dac, sor);
++ return -1;
++ } else
++ if (dac) {
++ or = ffs(dac) - 1;
++ if (dac & ~(1 << or)) {
++ NV_ERROR(dev, "multiple DAC: 0x%08x\n", dac);
++ return -1;
++ }
++ } else
++ if (sor) {
++ or = ffs(sor) - 1;
++ if (sor & ~(1 << or)) {
++ NV_ERROR(dev, "multiple SOR: 0x%08x\n", sor);
++ return -1;
++ }
++ } else {
++ NV_ERROR(dev, "no encoders!\n");
++ return -1;
+ }
+
-+ if (drm_encoder->crtc != drm_crtc)
-+ return -EINVAL;
++ for (i = 0; i < dev_priv->vbios->dcb->entries; i++) {
++ struct dcb_entry *dcbent = &dev_priv->vbios->dcb->entry[i];
++
++ if (dac && (dcbent->type != OUTPUT_ANALOG &&
++ dcbent->type != OUTPUT_TV))
++ continue;
++ else
++ if (sor && (dcbent->type != OUTPUT_TMDS &&
++ dcbent->type != OUTPUT_LVDS))
++ continue;
++
++ if (dcbent->or & (1 << or)) {
++ *phead = head;
++ *pdcbent = dcbent;
++ return 0;
++ }
++ }
+
-+ *pcrtc = crtc;
-+ *pencoder = encoder;
++ NV_ERROR(dev, "no DCB entry for %d %d\n", dac != 0, or);
+ return 0;
+}
+
-+void
-+nv50_display_irq_handler(struct drm_device *dev)
++static void
++nv50_display_vblank_handler(struct drm_device *dev, uint32_t intr)
++{
++ nv_wr32(NV50_PDISPLAY_INTR, intr & NV50_PDISPLAY_INTR_VBLANK_CRTCn);
++}
++
++static void
++nv50_display_unk10_handler(struct drm_device *dev)
++{
++ struct dcb_entry *dcbent;
++ int head, ret;
++
++ ret = nv50_display_irq_head(dev, &head, &dcbent);
++ if (ret)
++ goto ack;
++
++ nv_wr32(0x619494, nv_rd32(0x619494) & ~8);
++
++ nouveau_bios_run_display_table(dev, dcbent, -1);
++
++ack:
++ nv_wr32(NV50_PDISPLAY_INTR, NV50_PDISPLAY_INTR_CLK_UNK10);
++ nv_wr32(0x610030, 0x80000000);
++}
++
++static void
++nv50_display_unk20_handler(struct drm_device *dev)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
-+ static struct nouveau_encoder *encoder = NULL;
-+ static struct nouveau_crtc *crtc = NULL;
+ struct nvbios *bios = &dev_priv->VBIOS;
-+ uint32_t intr, tmp;
-+ int ret;
++ struct dcb_entry *dcbent;
++ uint32_t tmp, pclk;
++ int head, or, ret;
+
-+ for (;;) {
-+ uint32_t unk20 = nv_rd32(0x610020); (void)unk20;
++ ret = nv50_display_irq_head(dev, &head, &dcbent);
++ if (ret)
++ goto ack;
++ or = ffs(dcbent->or) - 1;
++ pclk = nv_rd32(NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
+
-+ intr = nv_rd32(0x610024);
-+ if (!intr)
-+ break;
++ NV_DEBUG(dev, "head %d pxclk: %dKHz\n", head, pclk);
+
-+ ret = nv50_crtc_encoder_from_610030(dev, &crtc, &encoder);
-+ if (ret) {
-+ NV_ERROR(dev, "can't determine outputs: 0x%08x\n",
-+ nv_rd32(0x610030));
-+ break;
-+ }
++ nouveau_bios_run_display_table(dev, dcbent, -2);
+
-+ if (intr & ~0x0000007c) {
-+ NV_ERROR(dev, "unknown PDISPLAY_INTR: 0x%08x\n", intr);
-+ break;
-+ }
++ nv50_crtc_set_clock(dev, head, pclk);
+
-+ if (intr & 0x00000010) {
-+ nv_wr32(0x619494, nv_rd32(0x619494) & ~8);
-+ nouveau_bios_run_display_table(dev, encoder->dcb, -1);
-+ nv_wr32(0x610024, 0x00000010);
-+ nv_wr32(0x610030, 0x80000000);
-+ } else
-+ if (intr & 0x00000020) {
-+ nouveau_bios_run_display_table(dev, encoder->dcb, -2);
-+ crtc->set_clock(crtc, crtc->mode);
-+ nouveau_bios_run_display_table(dev, encoder->dcb,
-+ crtc->mode->clock);
-+
-+ tmp = nv_rd32(0x614200 + (crtc->index * 0x800));
-+ tmp &= ~0x000000f;
-+ nv_wr32(0x614200 + (crtc->index * 0x800), tmp);
++ nouveau_bios_run_display_table(dev, dcbent, pclk);
+
-+ if (encoder->dcb->type != OUTPUT_ANALOG) {
-+ int tclk;
++ tmp = nv_rd32(NV50_PDISPLAY_CRTC_CLK_CTRL2(head));
++ tmp &= ~0x000000f;
++ nv_wr32(NV50_PDISPLAY_CRTC_CLK_CTRL2(head), tmp);
+
-+ if (encoder->dcb->type == OUTPUT_LVDS)
-+ tclk = bios->fp.duallink_transition_clk;
-+ else
-+ tclk = 165000;
++ if (dcbent->type != OUTPUT_ANALOG) {
++ int tclk;
+
-+ tmp = nv_rd32(0x614300 + (encoder->or * 0x800));
-+ tmp &= ~0x00000f0f;
-+ if (crtc->mode->clock > tclk)
-+ tmp |= 0x00000101;
-+ nv_wr32(0x614300 + (encoder->or * 0x800), tmp);
-+ } else {
-+ nv_wr32(0x614280 + (encoder->or * 0x800), 0);
-+ }
++ if (dcbent->type == OUTPUT_LVDS)
++ tclk = bios->fp.duallink_transition_clk;
++ else
++ tclk = 165000;
+
-+ nv_wr32(0x610024, 0x00000020);
-+ nv_wr32(0x610030, 0x80000000);
-+ } else
-+ if (intr & 0x00000040) {
-+ nouveau_bios_run_display_table(dev, encoder->dcb,
-+ -crtc->mode->clock);
-+ nv_wr32(0x610024, 0x00000040);
-+ nv_wr32(0x610030, 0x80000000);
-+ nv_wr32(0x619494, nv_rd32(0x619494) | 8);
-+ continue;
-+ } else
-+ if (intr & 0x0000000c) {
-+ nv_wr32(0x610024, intr & 0x0000000c);
++ tmp = nv_rd32(NV50_PDISPLAY_SOR_CLK_CTRL2(or));
++ tmp &= ~0x00000f0f;
++ if (pclk > tclk)
++ tmp |= 0x00000101;
++ nv_wr32(NV50_PDISPLAY_SOR_CLK_CTRL2(or), tmp);
++ } else {
++ nv_wr32(NV50_PDISPLAY_DAC_CLK_CTRL2(or), 0);
++ }
++
++ack:
++ nv_wr32(NV50_PDISPLAY_INTR, NV50_PDISPLAY_INTR_CLK_UNK20);
++ nv_wr32(0x610030, 0x80000000);
++}
++
++static void
++nv50_display_unk40_handler(struct drm_device *dev)
++{
++ struct dcb_entry *dcbent;
++ int head, pclk, ret;
++
++ ret = nv50_display_irq_head(dev, &head, &dcbent);
++ if (ret)
++ goto ack;
++ pclk = nv_rd32(NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
++
++ nouveau_bios_run_display_table(dev, dcbent, -pclk);
++
++ack:
++ nv_wr32(NV50_PDISPLAY_INTR, NV50_PDISPLAY_INTR_CLK_UNK40);
++ nv_wr32(0x610030, 0x80000000);
++ nv_wr32(0x619494, nv_rd32(0x619494) | 8);
++}
++
++void
++nv50_display_irq_handler(struct drm_device *dev)
++{
++ while (nv_rd32(NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) {
++ uint32_t unk20 = nv_rd32(0x610020);
++ uint32_t intr = nv_rd32(NV50_PDISPLAY_INTR);
++ (void)unk20;
++
++ if (!intr)
++ break;
++ NV_DEBUG(dev, "PDISPLAY_INTR 0x%08x\n", intr);
++
++ if (intr & NV50_PDISPLAY_INTR_CLK_UNK10)
++ nv50_display_unk10_handler(dev);
++ else
++ if (intr & NV50_PDISPLAY_INTR_CLK_UNK20)
++ nv50_display_unk20_handler(dev);
++ else
++ if (intr & NV50_PDISPLAY_INTR_CLK_UNK40)
++ nv50_display_unk40_handler(dev);
++ else
++ if (intr & NV50_PDISPLAY_INTR_VBLANK_CRTCn)
++ nv50_display_vblank_handler(dev, intr);
++ else {
++ NV_ERROR(dev, "unknown PDISPLAY_INTR: 0x%08x\n", intr);
++ nv_wr32(NV50_PDISPLAY_INTR, intr);
+ }
+ }
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_display.h b/drivers/gpu/drm/nouveau/nv50_display.h
new file mode 100644
-index 0000000..af1d10e
+index 0000000..c069075
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_display.h
-@@ -0,0 +1,44 @@
+@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2008 Maarten Maathuis.
+ * All Rights Reserved.
@@ -28935,6 +29103,7 @@ index 0000000..af1d10e
+int nv50_display_create(struct drm_device *dev);
+int nv50_display_destroy(struct drm_device *dev);
+int nv50_crtc_blank(struct nouveau_crtc *, bool blank);
++int nv50_crtc_set_clock(struct drm_device *, int head, int pclk);
+
+#endif /* __NV50_DISPLAY_H__ */
diff --git a/drivers/gpu/drm/nouveau/nv50_display_commands.h b/drivers/gpu/drm/nouveau/nv50_display_commands.h
@@ -51537,7 +51706,7 @@ index 0000000..6572f12
+}
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
new file mode 100644
-index 0000000..0ccd4ee
+index 0000000..8977aa3
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -0,0 +1,310 @@
@@ -51617,7 +51786,7 @@ index 0000000..0ccd4ee
+ * initialisation on certain gpu's. I presume it's some kind of
+ * clock setting, but what precisely i do not know.
+ */
-+ nv_wr32(NV50_PDISPLAY_SOR_CLK_CLK_CTRL2(encoder->or),
++ nv_wr32(NV50_PDISPLAY_SOR_CLK_CTRL2(encoder->or),
+ 0x70000 | ((mode->clock > limit) ? 0x101 : 0));
+
+ return 0;
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1294.2.35
retrieving revision 1.1294.2.36
diff -u -p -r1.1294.2.35 -r1.1294.2.36
--- kernel.spec 27 Jun 2009 12:42:28 -0000 1.1294.2.35
+++ kernel.spec 30 Jun 2009 18:06:04 -0000 1.1294.2.36
@@ -59,7 +59,7 @@ Summary: The Linux kernel
# The rc snapshot level
%define rcrev 1
# The git snapshot level
-%define gitrev 2
+%define gitrev 5
# Set rpm version accordingly
%define rpmversion 2.6.%{upstream_sublevel}
%endif
@@ -685,6 +685,9 @@ Patch10000: linux-2.6-missing-rfc2465-st
# VIA Nano / VX8xx updates
Patch11010: via-hwmon-temp-sensor.patch
+# temporary fixes
+Patch12000: linux-2.6-dm-fix-exstore-search.patch
+
# patches headed upstream
Patch19997: xen.pvops.pre.patch
@@ -1250,6 +1253,7 @@ ApplyPatch linux-2.6-silence-acpi-blackl
#ApplyPatch linux-2.6-revert-dvb-net-kabi-change.patch
# temporary fixes, headed upstream
+ApplyPatch linux-2.6-dm-fix-exstore-search.patch
ApplyPatch xen.pvops.pre.patch
ApplyPatch xen.pvops.patch
@@ -1854,6 +1858,20 @@ fi
%changelog
* Sat Jun 27 2009 Michael Young <m.a.young at durham.ac.uk>
+- update pvops from xen/rebase/master branch which should return disk
+ and network support
+
+* Tue Jun 30 2009 Ben Skeggs <bskeggs at redhat.com>
+- drm-nouveau.patch: match upstream
+
+* Mon Jun 29 2009 Chuck Ebbert <cebbert at redhat.com> 2.6.31-0.35.rc1.git5
+- 2.6.31-rc1-git5
+- CONFIG_LEDS_LP3944=m
+
+* Mon Jun 29 2009 Chuck Ebbert <cebbert at redhat.com>
+- Try to fix the dm overlay bug for real (#505121)
+
+* Sat Jun 27 2009 Michael Young <m.a.young at durham.ac.uk>
- switch pvops to xen/rebase/master branch
- rebase pvops on 2.6.31-rc1-git2
- drivers/gpu/drm/ttm/ttm_agp_backend.c doesn't like
Index: sources
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/sources,v
retrieving revision 1.976.2.17
retrieving revision 1.976.2.18
diff -u -p -r1.976.2.17 -r1.976.2.18
--- sources 27 Jun 2009 11:05:16 -0000 1.976.2.17
+++ sources 30 Jun 2009 18:06:05 -0000 1.976.2.18
@@ -1,3 +1,3 @@
7a80058a6382e5108cdb5554d1609615 linux-2.6.30.tar.bz2
33d2d730beb66aa82349df8b6096fd91 patch-2.6.31-rc1.bz2
-59ac384a81001592f0365149d7cff9fa patch-2.6.31-rc1-git2.bz2
+88cffbc86a85adf780014306bd05a602 patch-2.6.31-rc1-git5.bz2
Index: upstream
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/upstream,v
retrieving revision 1.888.2.16
retrieving revision 1.888.2.17
diff -u -p -r1.888.2.16 -r1.888.2.17
--- upstream 27 Jun 2009 11:05:16 -0000 1.888.2.16
+++ upstream 30 Jun 2009 18:06:05 -0000 1.888.2.17
@@ -1,3 +1,3 @@
linux-2.6.30.tar.bz2
patch-2.6.31-rc1.bz2
-patch-2.6.31-rc1-git2.bz2
+patch-2.6.31-rc1-git5.bz2
xen.pvops.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -p -N -r 1.1.2.25 -r 1.1.2.26 xen.pvops.patch
Index: xen.pvops.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/Attic/xen.pvops.patch,v
retrieving revision 1.1.2.25
retrieving revision 1.1.2.26
diff -u -p -r1.1.2.25 -r1.1.2.26
--- xen.pvops.patch 27 Jun 2009 11:05:17 -0000 1.1.2.25
+++ xen.pvops.patch 30 Jun 2009 18:06:05 -0000 1.1.2.26
@@ -1726,7 +1726,7 @@ index 7f3eba0..e4fc8ea 100644
extern void flush_tlb_current_task(void);
extern void flush_tlb_mm(struct mm_struct *);
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
-index 9c371e4..e5369db 100644
+index 9c371e4..3da450b 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -45,6 +45,7 @@
@@ -1775,8 +1775,37 @@ index 9c371e4..e5369db 100644
HYPERVISOR_set_debugreg(int reg, unsigned long value)
{
return _hypercall2(int, set_debugreg, reg, value);
+@@ -424,6 +449,14 @@ MULTI_fpu_taskswitch(struct multicall_entry *mcl, int set)
+ mcl->args[0] = set;
+ }
+
++#if defined(CONFIG_X86_64)
++#define MULTI_UVMFLAGS_INDEX 2
++#define MULTI_UVMDOMID_INDEX 3
++#else
++#define MULTI_UVMFLAGS_INDEX 3
++#define MULTI_UVMDOMID_INDEX 4
++#endif
++
+ static inline void
+ MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
+ pte_t new_val, unsigned long flags)
+@@ -432,12 +465,11 @@ MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va,
+ mcl->args[0] = va;
+ if (sizeof(new_val) == sizeof(long)) {
+ mcl->args[1] = new_val.pte;
+- mcl->args[2] = flags;
+ } else {
+ mcl->args[1] = new_val.pte;
+ mcl->args[2] = new_val.pte >> 32;
+- mcl->args[3] = flags;
+ }
++ mcl->args[MULTI_UVMFLAGS_INDEX] = flags;
+ }
+
+ static inline void
diff --git a/arch/x86/include/asm/xen/interface.h b/arch/x86/include/asm/xen/interface.h
-index e8506c1..1c10c88 100644
+index e8506c1..9539998 100644
--- a/arch/x86/include/asm/xen/interface.h
+++ b/arch/x86/include/asm/xen/interface.h
@@ -61,9 +61,9 @@ DEFINE_GUEST_HANDLE(void);
@@ -1792,6 +1821,15 @@ index e8506c1..1c10c88 100644
/* Maximum number of virtual CPUs in multi-processor guests. */
#define MAX_VIRT_CPUS 32
+@@ -97,6 +97,8 @@ DEFINE_GUEST_HANDLE(void);
+ #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2))
+
+ #ifndef __ASSEMBLY__
++#include <linux/types.h>
++
+ struct trap_info {
+ uint8_t vector; /* exception vector */
+ uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
diff --git a/arch/x86/include/asm/xen/interface_32.h b/arch/x86/include/asm/xen/interface_32.h
index 42a7e00..8413688 100644
--- a/arch/x86/include/asm/xen/interface_32.h
@@ -2675,7 +2713,7 @@ index ebefb54..a28279d 100644
}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
-index be5ae80..013c22d 100644
+index de2cab1..3539750 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -87,6 +87,7 @@
@@ -2686,7 +2724,7 @@ index be5ae80..013c22d 100644
#include <asm/system.h>
#include <asm/vsyscall.h>
-@@ -915,6 +916,9 @@ void __init setup_arch(char **cmdline_p)
+@@ -931,6 +932,9 @@ void __init setup_arch(char **cmdline_p)
initmem_init(0, max_pfn);
@@ -2697,10 +2735,10 @@ index be5ae80..013c22d 100644
/*
* Reserve low memory region for sleep support.
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
-index a0f48f5..82d27f6 100644
+index 5204332..22a5a6d 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
-@@ -813,6 +813,28 @@ asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
+@@ -816,6 +816,28 @@ asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
}
/*
@@ -2729,7 +2767,7 @@ index a0f48f5..82d27f6 100644
* 'math_state_restore()' saves the current math information in the
* old math state array, and gets the new ones from the current task
*
-@@ -843,17 +865,8 @@ asmlinkage void math_state_restore(void)
+@@ -846,17 +868,8 @@ asmlinkage void math_state_restore(void)
}
clts(); /* Allow maths ops (or we recurse) */
@@ -3258,7 +3296,7 @@ index 0a1700a..9b98567 100644
xen_raw_console_write("about to get started...\n");
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
-index 4ceb285..660ce70 100644
+index 4ceb285..d4c1f78 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -50,7 +50,9 @@
@@ -3293,7 +3331,15 @@ index 4ceb285..660ce70 100644
#ifdef CONFIG_XEN_DEBUG_FS
static struct {
-@@ -376,6 +386,34 @@ static bool xen_page_pinned(void *ptr)
+@@ -315,6 +325,7 @@ unsigned long arbitrary_virt_to_mfn(void *vaddr)
+
+ return PFN_DOWN(maddr.maddr);
+ }
++EXPORT_SYMBOL_GPL(set_phys_to_machine);
+
+ xmaddr_t arbitrary_virt_to_machine(void *vaddr)
+ {
+@@ -376,6 +387,34 @@ static bool xen_page_pinned(void *ptr)
return PagePinned(page);
}
@@ -3328,7 +3374,7 @@ index 4ceb285..660ce70 100644
static void xen_extend_mmu_update(const struct mmu_update *update)
{
struct multicall_space mcs;
-@@ -452,6 +490,11 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
+@@ -452,6 +491,11 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
pte_t *ptep, pte_t pteval)
{
@@ -3340,7 +3386,7 @@ index 4ceb285..660ce70 100644
ADD_STATS(set_pte_at, 1);
// ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
ADD_STATS(set_pte_at_current, mm == current->mm);
-@@ -522,8 +565,25 @@ static pteval_t pte_pfn_to_mfn(pteval_t val)
+@@ -522,8 +566,25 @@ static pteval_t pte_pfn_to_mfn(pteval_t val)
return val;
}
@@ -3366,7 +3412,7 @@ index 4ceb285..660ce70 100644
return pte_mfn_to_pfn(pte.pte);
}
PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
-@@ -536,7 +596,22 @@ PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
+@@ -536,7 +597,22 @@ PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
pte_t xen_make_pte(pteval_t pte)
{
@@ -3390,7 +3436,7 @@ index 4ceb285..660ce70 100644
return native_make_pte(pte);
}
PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
-@@ -592,6 +667,11 @@ void xen_set_pud(pud_t *ptr, pud_t val)
+@@ -592,6 +668,11 @@ void xen_set_pud(pud_t *ptr, pud_t val)
void xen_set_pte(pte_t *ptep, pte_t pte)
{
@@ -3402,7 +3448,7 @@ index 4ceb285..660ce70 100644
ADD_STATS(pte_update, 1);
// ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
-@@ -608,6 +688,11 @@ void xen_set_pte(pte_t *ptep, pte_t pte)
+@@ -608,6 +689,11 @@ void xen_set_pte(pte_t *ptep, pte_t pte)
#ifdef CONFIG_X86_PAE
void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
{
@@ -3414,7 +3460,7 @@ index 4ceb285..660ce70 100644
set_64bit((u64 *)ptep, native_pte_val(pte));
}
-@@ -1285,6 +1370,13 @@ static void xen_flush_tlb_single(unsigned long addr)
+@@ -1285,6 +1371,13 @@ static void xen_flush_tlb_single(unsigned long addr)
preempt_enable();
}
@@ -3428,7 +3474,7 @@ index 4ceb285..660ce70 100644
static void xen_flush_tlb_others(const struct cpumask *cpus,
struct mm_struct *mm, unsigned long va)
{
-@@ -1444,10 +1536,17 @@ static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
+@@ -1444,10 +1537,17 @@ static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
#ifdef CONFIG_X86_32
static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
[...6953 lines suppressed...]
+index a40f1cd..b89ee8a 100644
+--- a/include/xen/grant_table.h
++++ b/include/xen/grant_table.h
+@@ -37,10 +37,16 @@
+ #ifndef __ASM_GNTTAB_H__
+ #define __ASM_GNTTAB_H__
+
+-#include <asm/xen/hypervisor.h>
++#include <asm/page.h>
++
++#include <xen/interface/xen.h>
+ #include <xen/interface/grant_table.h>
++
++#include <asm/xen/hypervisor.h>
+ #include <asm/xen/grant_table.h>
+
++#include <xen/features.h>
++
+ /* NR_GRANT_FRAMES must be less than or equal to that configured in Xen */
+ #define NR_GRANT_FRAMES 4
+
+@@ -51,6 +57,8 @@ struct gnttab_free_callback {
+ u16 count;
+ };
+
++void gnttab_reset_grant_page(struct page *page);
++
+ int gnttab_suspend(void);
+ int gnttab_resume(void);
+
+@@ -80,6 +88,8 @@ unsigned long gnttab_end_foreign_transfer(grant_ref_t ref);
+
+ int gnttab_query_foreign_access(grant_ref_t ref);
+
++int gnttab_copy_grant_page(grant_ref_t ref, struct page **pagep);
++
+ /*
+ * operations on reserved batches of grant references
+ */
+@@ -106,6 +116,37 @@ void gnttab_grant_foreign_access_ref(grant_ref_t ref, domid_t domid,
+ void gnttab_grant_foreign_transfer_ref(grant_ref_t, domid_t domid,
+ unsigned long pfn);
+
++static inline void
++gnttab_set_map_op(struct gnttab_map_grant_ref *map, unsigned long addr,
++ uint32_t flags, grant_ref_t ref, domid_t domid)
++{
++ if (flags & GNTMAP_contains_pte)
++ map->host_addr = addr;
++ else if (xen_feature(XENFEAT_auto_translated_physmap))
++ map->host_addr = __pa(addr);
++ else
++ map->host_addr = addr;
++
++ map->flags = flags;
++ map->ref = ref;
++ map->dom = domid;
++}
++
++static inline void
++gnttab_set_unmap_op(struct gnttab_unmap_grant_ref *unmap, unsigned long addr,
++ uint32_t flags, grant_handle_t handle)
++{
++ if (flags & GNTMAP_contains_pte)
++ unmap->host_addr = addr;
++ else if (xen_feature(XENFEAT_auto_translated_physmap))
++ unmap->host_addr = __pa(addr);
++ else
++ unmap->host_addr = addr;
++
++ unmap->handle = handle;
++ unmap->dev_bus_addr = 0;
++}
++
+ int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes,
+ unsigned long max_nr_gframes,
+ struct grant_entry **__shared);
+diff --git a/include/xen/interface/grant_table.h b/include/xen/interface/grant_table.h
+index 39da93c..8211af8 100644
+--- a/include/xen/interface/grant_table.h
++++ b/include/xen/interface/grant_table.h
+@@ -321,6 +321,28 @@ struct gnttab_query_size {
+ DEFINE_GUEST_HANDLE_STRUCT(gnttab_query_size);
+
+ /*
++ * GNTTABOP_unmap_and_replace: Destroy one or more grant-reference mappings
++ * tracked by <handle> but atomically replace the page table entry with one
++ * pointing to the machine address under <new_addr>. <new_addr> will be
++ * redirected to the null entry.
++ * NOTES:
++ * 1. The call may fail in an undefined manner if either mapping is not
++ * tracked by <handle>.
++ * 2. After executing a batch of unmaps, it is guaranteed that no stale
++ * mappings will remain in the device or host TLBs.
++ */
++#define GNTTABOP_unmap_and_replace 7
++struct gnttab_unmap_and_replace {
++ /* IN parameters. */
++ uint64_t host_addr;
++ uint64_t new_addr;
++ grant_handle_t handle;
++ /* OUT parameters. */
++ int16_t status; /* GNTST_* */
++};
++DEFINE_GUEST_HANDLE_STRUCT(gnttab_unmap_and_replace);
++
++/*
+ * Bitfield values for update_pin_status.flags.
+ */
+ /* Map the grant entry for access by I/O devices. */
diff --git a/include/xen/interface/memory.h b/include/xen/interface/memory.h
index af36ead..eac3ce1 100644
--- a/include/xen/interface/memory.h
@@ -6454,10 +12640,19 @@ index 0000000..83e4714
+
+#endif /* __XEN_PUBLIC_PLATFORM_H__ */
diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h
-index 2befa3e..412326d 100644
+index 2befa3e..327db61 100644
--- a/include/xen/interface/xen.h
+++ b/include/xen/interface/xen.h
-@@ -449,6 +449,45 @@ struct start_info {
+@@ -184,6 +184,8 @@
+ #define MMUEXT_NEW_USER_BASEPTR 15
+
+ #ifndef __ASSEMBLY__
++#include <linux/types.h>
++
+ struct mmuext_op {
+ unsigned int cmd;
+ union {
+@@ -449,6 +451,45 @@ struct start_info {
int8_t cmd_line[MAX_GUEST_CMDLINE];
};
@@ -6503,7 +12698,7 @@ index 2befa3e..412326d 100644
/* These flags are passed in the 'flags' field of start_info_t. */
#define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */
#define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */
-@@ -461,6 +500,8 @@ typedef uint8_t xen_domain_handle_t[16];
+@@ -461,6 +502,8 @@ typedef uint8_t xen_domain_handle_t[16];
#define __mk_unsigned_long(x) x ## UL
#define mk_unsigned_long(x) __mk_unsigned_long(x)
@@ -6642,6 +12837,19 @@ index 883a21b..9769738 100644
+
+
#endif /* INCLUDE_XEN_OPS_H */
+diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h
+index b9763ba..542ca7c 100644
+--- a/include/xen/xenbus.h
++++ b/include/xen/xenbus.h
+@@ -93,7 +93,7 @@ struct xenbus_driver {
+ int (*remove)(struct xenbus_device *dev);
+ int (*suspend)(struct xenbus_device *dev, pm_message_t state);
+ int (*resume)(struct xenbus_device *dev);
+- int (*uevent)(struct xenbus_device *, char **, int, char *, int);
++ int (*uevent)(struct xenbus_device *, struct kobj_uevent_env *);
+ struct device_driver driver;
+ int (*read_otherend_details)(struct xenbus_device *dev);
+ int (*is_ready)(struct xenbus_device *dev);
diff --git a/lib/swiotlb.c b/lib/swiotlb.c
index bffe6d7..cec5f62 100644
--- a/lib/swiotlb.c
@@ -6670,3 +12878,35 @@ index bffe6d7..cec5f62 100644
if (!io_tlb_overflow_buffer)
panic("Cannot allocate SWIOTLB overflow buffer!\n");
+diff --git a/mm/page_alloc.c b/mm/page_alloc.c
+index 5d714f8..79a704e 100644
+--- a/mm/page_alloc.c
++++ b/mm/page_alloc.c
+@@ -566,6 +566,13 @@ static void __free_pages_ok(struct page *page, unsigned int order)
+ if (bad)
+ return;
+
++#ifdef CONFIG_XEN
++ if (PageForeign(page)) {
++ PageForeignDestructor(page, order);
++ return;
++ }
++#endif
++
+ if (!PageHighMem(page)) {
+ debug_check_no_locks_freed(page_address(page),PAGE_SIZE<<order);
+ debug_check_no_obj_freed(page_address(page),
+@@ -1025,6 +1032,13 @@ static void free_hot_cold_page(struct page *page, int cold)
+
+ kmemcheck_free_shadow(page, 0);
+
++#ifdef CONFIG_XEN
++ if (PageForeign(page)) {
++ PageForeignDestructor(page, 0);
++ return;
++ }
++#endif
++
+ if (PageAnon(page))
+ page->mapping = NULL;
+ if (free_pages_check(page))
--- patch-2.6.31-rc1-git2.bz2.sign DELETED ---
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