rpms/xorg-x11-drv-ati/devel radeon-6.11.0-git.patch, 1.1, 1.2 radeon-modeset.patch, 1.32, 1.33 xorg-x11-drv-ati.spec, 1.150, 1.151
Dave Airlie
airlied at fedoraproject.org
Mon Mar 2 23:42:19 UTC 2009
Author: airlied
Update of /cvs/pkgs/rpms/xorg-x11-drv-ati/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv5987
Modified Files:
radeon-6.11.0-git.patch radeon-modeset.patch
xorg-x11-drv-ati.spec
Log Message:
* Tue Mar 03 2009 Dave Airlie <airlied at redhat.com> 6.11.0-2
- rebase to latest upstream r600 accel
- fixup VT switch on DRI2
radeon-6.11.0-git.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -N -r 1.1 -r 1.2 radeon-6.11.0-git.patch
Index: radeon-6.11.0-git.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-6.11.0-git.patch,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- radeon-6.11.0-git.patch 27 Feb 2009 03:57:32 -0000 1.1
+++ radeon-6.11.0-git.patch 2 Mar 2009 23:42:19 -0000 1.2
@@ -1,5 +1,5 @@
diff --git a/configure.ac b/configure.ac
-index 0523cc0..28207d6 100644
+index 0523cc0..b094a50 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
@@ -11,34 +11,8 @@
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
xf86-video-ati)
-@@ -129,7 +129,7 @@ if test "x$EXA" = xyes; then
- AC_MSG_RESULT(yes)
-
- SAVE_CPPFLAGS="$CPPFLAGS"
-- CPPFLAGS="$CPPFLAGS $XORG_CFLAGS"
-+ CPPFLAGS="$CPPFLAGS $XORG_CFLAGS -DEXA_DRIVER_KNOWN_MAJOR=3"
- AC_CHECK_HEADER(exa.h,
- [have_exa_h="yes"], [have_exa_h="no"])
- CPPFLAGS="$SAVE_CPPFLAGS"
-@@ -138,7 +138,7 @@ else
- fi
-
- SAVE_CPPFLAGS="$CPPFLAGS"
--CPPFLAGS="$CPPFLAGS $XORG_CFLAGS"
-+CPPFLAGS="$CPPFLAGS $XORG_CFLAGS -DEXA_DRIVER_KNOWN_MAJOR=3"
- if test "x$have_exa_h" = xyes; then
- AC_MSG_CHECKING([whether EXA version is at least 2.0.0])
- AC_PREPROC_IFELSE([AC_LANG_PROGRAM([[
-@@ -153,6 +153,7 @@ if test "x$have_exa_h" = xyes; then
-
- if test "x$USE_EXA" = xyes; then
- AC_DEFINE(USE_EXA, 1, [Build support for Exa])
-+ AC_DEFINE(EXA_DRIVER_KNOWN_MAJOR, 3, [Major version of EXA we know how to handle])
- fi
- fi
-
diff --git a/src/Makefile.am b/src/Makefile.am
-index c15cc30..7ff7d31 100644
+index c15cc30..7cc2a6f 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -66,7 +66,7 @@ XMODE_SRCS=\
@@ -46,7 +20,7 @@
if USE_EXA
-RADEON_EXA_SOURCES = radeon_exa.c
-+RADEON_EXA_SOURCES = radeon_exa.c r600_exa.c r6xx_accel.c r600_textured_videofuncs.c
++RADEON_EXA_SOURCES = radeon_exa.c r600_exa.c r6xx_accel.c r600_textured_videofuncs.c r600_shader.c
endif
AM_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@ @XMODES_CFLAGS@ -DDISABLE_EASF -DENABLE_ALL_SERVICE_FUNCTIONS -DATOM_BIOS -DATOM_BIOS_PARSER -DDRIVER_PARSER
@@ -63,12 +37,24 @@
ati.h \
ativersion.h \
bicubic_table.h \
+diff --git a/src/atipciids.h b/src/atipciids.h
+index 7735e93..47c03c7 100644
+--- a/src/atipciids.h
++++ b/src/atipciids.h
+@@ -34,6 +34,7 @@
+ #define _ATIPCIIDS_H
+
+ /* PCI Vendor */
++#define PCI_VENDOR_ASUS 0x1043
+ #define PCI_VENDOR_ATI 0x1002
+ #define PCI_VENDOR_IBM 0x1014
+ #define PCI_VENDOR_AMD 0x1022
diff --git a/src/r600_exa.c b/src/r600_exa.c
new file mode 100644
-index 0000000..17c5567
+index 0000000..3a4dc8d
--- /dev/null
+++ b/src/r600_exa.c
-@@ -0,0 +1,4441 @@
+@@ -0,0 +1,2128 @@
+/*
+ * Copyright 2008 Advanced Micro Devices, Inc.
+ *
@@ -105,6 +91,7 @@
+
+#include "radeon.h"
+#include "radeon_macros.h"
++#include "radeon_reg.h"
+#include "r600_shader.h"
+#include "r600_reg.h"
+#include "r600_state.h"
@@ -112,7 +99,7 @@
+extern PixmapPtr
+RADEONGetDrawablePixmap(DrawablePtr pDrawable);
+
-+//#define SHOW_VERTEXES
++/* #define SHOW_VERTEXES */
+
+# define RADEON_ROP3_ZERO 0x00000000
+# define RADEON_ROP3_DSa 0x00880000
@@ -173,11 +160,11 @@
+ accel_state->dst_size = exaGetPixmapPitch(pPix) * pPix->drawable.height;
+ accel_state->dst_pitch = exaGetPixmapPitch(pPix) / (pPix->drawable.bitsPerPixel / 8);
+
-+ // bad pitch
++ /* bad pitch */
+ if (accel_state->dst_pitch & 7)
+ return FALSE;
+
-+ // bad offset
++ /* bad offset */
+ if (accel_state->dst_mc_addr & 0xff)
+ return FALSE;
+
@@ -188,7 +175,7 @@
+ CLEAR (vs_conf);
+ CLEAR (ps_conf);
+
-+ //return FALSE;
++ /* return FALSE; */
+
+#ifdef SHOW_VERTEXES
+ ErrorF("%dx%d @ %dbpp, 0x%08x\n", pPix->drawable.width, pPix->drawable.height,
@@ -200,13 +187,11 @@
+ /* Init */
+ start_3d(pScrn, accel_state->ib);
+
-+ //cp_set_surface_sync(pScrn, accel_state->ib);
-+
+ set_default_state(pScrn, accel_state->ib);
+
+ /* Scissor / viewport */
-+ ereg (accel_state->ib, PA_CL_VTE_CNTL, VTX_XY_FMT_bit);
-+ ereg (accel_state->ib, PA_CL_CLIP_CNTL, CLIP_DISABLE_bit);
++ EREG(accel_state->ib, PA_CL_VTE_CNTL, VTX_XY_FMT_bit);
++ EREG(accel_state->ib, PA_CL_CLIP_CNTL, CLIP_DISABLE_bit);
+
+ accel_state->vs_mc_addr = info->fbLocation + pScrn->fbOffset + accel_state->shaders->offset +
+ accel_state->solid_vs_offset;
@@ -240,17 +225,16 @@
+
+ /* Render setup */
+ if (pm & 0x000000ff)
-+ pmask |= 4; //B
++ pmask |= 4; /* B */
+ if (pm & 0x0000ff00)
-+ pmask |= 2; //G
++ pmask |= 2; /* G */
+ if (pm & 0x00ff0000)
-+ pmask |= 1; //R
++ pmask |= 1; /* R */
+ if (pm & 0xff000000)
-+ pmask |= 8; //A
-+ ereg (accel_state->ib, CB_SHADER_MASK, (pmask << OUTPUT0_ENABLE_shift));
-+ ereg (accel_state->ib, R7xx_CB_SHADER_CONTROL, (RT0_ENABLE_bit));
-+ ereg (accel_state->ib, CB_COLOR_CONTROL, RADEON_ROP[alu]);
-+
++ pmask |= 8; /* A */
++ EREG(accel_state->ib, CB_SHADER_MASK, (pmask << OUTPUT0_ENABLE_shift));
++ EREG(accel_state->ib, R7xx_CB_SHADER_CONTROL, (RT0_ENABLE_bit));
++ EREG(accel_state->ib, CB_COLOR_CONTROL, RADEON_ROP[alu]);
+
+ cb_conf.id = 0;
+ cb_conf.w = accel_state->dst_pitch;
@@ -259,67 +243,68 @@
+
+ if (pPix->drawable.bitsPerPixel == 8) {
+ cb_conf.format = COLOR_8;
-+ cb_conf.comp_swap = 3; //A
++ cb_conf.comp_swap = 3; /* A */
+ } else if (pPix->drawable.bitsPerPixel == 16) {
+ cb_conf.format = COLOR_5_6_5;
-+ cb_conf.comp_swap = 2; //RGB
++ cb_conf.comp_swap = 2; /* RGB */
+ } else {
+ cb_conf.format = COLOR_8_8_8_8;
-+ cb_conf.comp_swap = 1; //ARGB
++ cb_conf.comp_swap = 1; /* ARGB */
+ }
+ cb_conf.source_format = 1;
+ cb_conf.blend_clamp = 1;
+ set_render_target(pScrn, accel_state->ib, &cb_conf);
+
-+ ereg (accel_state->ib, PA_SU_SC_MODE_CNTL, (FACE_bit |
-+ (POLYMODE_PTYPE__TRIANGLES << POLYMODE_FRONT_PTYPE_shift) |
-+ (POLYMODE_PTYPE__TRIANGLES << POLYMODE_BACK_PTYPE_shift)));
-+ ereg (accel_state->ib, DB_SHADER_CONTROL, ((1 << Z_ORDER_shift) | /* EARLY_Z_THEN_LATE_Z */
-+ DUAL_EXPORT_ENABLE_bit)); /* Only useful if no depth export */
++ EREG(accel_state->ib, PA_SU_SC_MODE_CNTL, (FACE_bit |
++ (POLYMODE_PTYPE__TRIANGLES << POLYMODE_FRONT_PTYPE_shift) |
++ (POLYMODE_PTYPE__TRIANGLES << POLYMODE_BACK_PTYPE_shift)));
++ EREG(accel_state->ib, DB_SHADER_CONTROL, ((1 << Z_ORDER_shift) | /* EARLY_Z_THEN_LATE_Z */
++ DUAL_EXPORT_ENABLE_bit)); /* Only useful if no depth export */
+
+ /* Interpolator setup */
-+ // one unused export from VS (VS_EXPORT_COUNT is zero based, count minus one)
[...7293 lines suppressed...]
+ /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
+ { PCI_VENDOR_INTEL,0x3575, PCI_VENDOR_ATI,0x4c59, PCI_VENDOR_DELL,0x00e3, 2 },
++ /* Intel 82852/82855 host bridge / Mobility FireGL 9000 R250 Needs AGPMode 1 (lp #296617) */
++ { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4c66, PCI_VENDOR_DELL,0x0149, 1 },
+ /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
+- { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x1025,0x0061, 1 },
++ { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x1025,0x0061, 1 },
+ /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
+- { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x1025,0x0064, 1 },
++ { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x1025,0x0064, 1 },
+ /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
+- { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x1043,0x1942, 1 },
+- /* Intel 82852/82855 host bridge / Mobility FireGL 9000 R250 Needs AGPMode 1 (lp #296617) */
+- { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4c66, 0x1028,0x0149, 1 },
++ { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, PCI_VENDOR_ASUS,0x1942, 1 },
+ /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
+- { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x10cf,0x127f, 1 },
++ { PCI_VENDOR_INTEL,0x3580, PCI_VENDOR_ATI,0x4e50, 0x10cf,0x127f, 1 },
+
+- /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (LP: #133192) */
+- { 0x1849,0x3189, PCI_VENDOR_ATI,0x5960, 0x1787, 0x5960, 4 },
++ /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
++ { 0x1849,0x3189, PCI_VENDOR_ATI,0x5960, 0x1787,0x5960, 4 },
+
++ /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
++ { PCI_VENDOR_VIA,0x0204, PCI_VENDOR_ATI,0x5960, 0x17af,0x2020, 4 },
++ /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
++ { PCI_VENDOR_VIA,0x0269, PCI_VENDOR_ATI,0x4153, PCI_VENDOR_ASUS,0x003c, 4 },
+ /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
+- { 0x1106,0x0305, PCI_VENDOR_ATI,0x514c, 0x1002,0x013a, 2 },
++ { PCI_VENDOR_VIA,0x0305, PCI_VENDOR_ATI,0x514c, PCI_VENDOR_ATI,0x013a, 2 },
++ /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
++ { PCI_VENDOR_VIA,0x0691, PCI_VENDOR_ATI,0x5960, PCI_VENDOR_ASUS,0x004c, 2 },
++ /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
++ { PCI_VENDOR_VIA,0x0691, PCI_VENDOR_ATI,0x5960, PCI_VENDOR_ASUS,0x0054, 2 },
+ /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
+- { 0x1106,0x3189, PCI_VENDOR_ATI,0x514d, 0x174b,0x7149, 4 },
++ { PCI_VENDOR_VIA,0x3189, PCI_VENDOR_ATI,0x514d, 0x174b,0x7149, 4 },
+ /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
+- { 0x1106,0x3189, PCI_VENDOR_ATI,0x5960, 0x1462,0x0380, 4 },
++ { PCI_VENDOR_VIA,0x3189, PCI_VENDOR_ATI,0x5960, 0x1462,0x0380, 4 },
+ /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
+- { 0x1106,0x3189, PCI_VENDOR_ATI,0x5964, 0x148c,0x2073, 4 },
+- /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
+- { 0x1106,0x0691, PCI_VENDOR_ATI,0x5960, 0x1043,0x0054, 2 },
+- /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
+- { 0x1106,0x0691, PCI_VENDOR_ATI,0x5960, 0x1043,0x004c, 2 },
+- /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
+- { 0x1106,0x0204, PCI_VENDOR_ATI,0x5960, 0x17af,0x2020, 4 },
+- /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
+- { 0x1106,0x0269, PCI_VENDOR_ATI,0x4153, 0x1043,0x003c, 4 },
++ { PCI_VENDOR_VIA,0x3189, PCI_VENDOR_ATI,0x5964, 0x148c,0x2073, 4 },
+
+ /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
+- { 0x1002,0xcbb2, PCI_VENDOR_ATI,0x5c61, 0x104d,0x8175, 1 },
++ { PCI_VENDOR_ATI,0xcbb2, PCI_VENDOR_ATI,0x5c61, PCI_VENDOR_SONY,0x8175, 1 },
++
++ /* HP Host Bridge / R300 [FireGL X1] Needs AGPMode 2 (fdo #7770) */
++ { PCI_VENDOR_HP,0x122e, PCI_VENDOR_ATI,0x4e47, PCI_VENDOR_ATI,0x0152, 2 },
+
+ { 0, 0, 0, 0, 0, 0, 0 },
+ };
+@@ -790,92 +800,96 @@ static Bool RADEONSetAgpMode(RADEONInfoPtr info, ScreenPtr pScreen)
unsigned long mode = drmAgpGetMode(info->dri->drmFD); /* Default mode */
unsigned int vendor = drmAgpVendorId(info->dri->drmFD);
unsigned int device = drmAgpDeviceId(info->dri->drmFD);
@@ -11481,7 +11089,7 @@
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x 0x%04x/0x%04x]\n",
-@@ -910,6 +915,9 @@ static void RADEONSetAgpBase(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -910,6 +924,9 @@ static void RADEONSetAgpBase(RADEONInfoPtr info, ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
unsigned char *RADEONMMIO = info->MMIO;
@@ -11491,7 +11099,7 @@
/* drm already does this, so we can probably remove this.
* agp_base_2 ?
*/
-@@ -1183,13 +1191,14 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1183,13 +1200,14 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drm_radeon_init_t drmInfo;
memset(&drmInfo, 0, sizeof(drm_radeon_init_t));
@@ -11512,7 +11120,7 @@
drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
drmInfo.is_pci = (info->cardType!=CARD_AGP);
-@@ -1223,7 +1232,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1223,7 +1241,8 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
* registers back to their default values, so we need to restore
* those engine register here.
*/
@@ -11522,7 +11130,7 @@
return TRUE;
}
-@@ -1299,14 +1309,16 @@ static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1299,14 +1318,16 @@ static void RADEONDRIIrqInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[drm] falling back to irq-free operation\n");
info->dri->irq = 0;
} else {
@@ -11547,7 +11155,7 @@
}
}
-@@ -1840,7 +1852,8 @@ void RADEONDRIResume(ScreenPtr pScreen)
+@@ -1840,7 +1861,8 @@ void RADEONDRIResume(ScreenPtr pScreen)
/* FIXME: return? */
}
@@ -12033,19 +11641,10 @@
static Bool RADEONPrepareAccess(PixmapPtr pPix, int index)
{
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
-index cd97cc6..dec0285 100644
+index cd97cc6..59cb46f 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
-@@ -56,8 +56,6 @@
-
- #include "radeon.h"
-
--#include "exa.h"
--
- static int
- FUNC_NAME(RADEONMarkSync)(ScreenPtr pScreen)
- {
-@@ -129,7 +127,8 @@ FUNC_NAME(RADEONSolid)(PixmapPtr pPix, int x1, int y1, int x2, int y2)
+@@ -129,7 +129,8 @@ FUNC_NAME(RADEONSolid)(PixmapPtr pPix, int x1, int y1, int x2, int y2)
TRACE;
@@ -12055,7 +11654,7 @@
BEGIN_ACCEL(2);
OUT_ACCEL_REG(RADEON_DST_Y_X, (y1 << 16) | x1);
-@@ -230,7 +229,8 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
+@@ -230,7 +231,8 @@ FUNC_NAME(RADEONCopy)(PixmapPtr pDst,
dstY += h - 1;
}
@@ -12065,7 +11664,7 @@
BEGIN_ACCEL(3);
-@@ -281,7 +281,8 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -281,7 +283,8 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
RADEON_SWITCH_TO_2D();
@@ -12075,6 +11674,16 @@
while ((buf = RADEONHostDataBlit(pScrn,
cpp, w, dst_pitch_off, &buf_pitch,
+@@ -476,6 +479,9 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+ #endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
+
+ info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS;
++#ifdef EXA_SUPPORTS_PREPARE_AUX
++ info->accel_state->exa->flags |= EXA_SUPPORTS_PREPARE_AUX;
++#endif
+ info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
+ info->accel_state->exa->pixmapPitchAlign = 64;
+
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index c44502c..571204a 100644
--- a/src/radeon_exa_render.c
@@ -12201,20 +11810,10 @@
range[0] = 0; /* off */
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
-index 447ef57..49044e3 100644
+index 447ef57..f072b9c 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
-@@ -43,9 +43,6 @@
-
- #include "xf86Crtc.h"
-
--#ifdef USE_EXA
--#include "exa.h"
--#endif
- #ifdef USE_XAA
- #include "xaa.h"
- #endif
-@@ -373,7 +370,7 @@ struct avivo_state
+@@ -373,7 +373,7 @@ struct avivo_state
/* dvoa */
uint32_t dvoa[16];
@@ -12223,7 +11822,7 @@
uint32_t fmt1[18];
uint32_t fmt2[18];
uint32_t dig1[19];
-@@ -384,9 +381,15 @@ struct avivo_state
+@@ -384,9 +384,15 @@ struct avivo_state
uint32_t aux_cntl2[14];
uint32_t aux_cntl3[14];
uint32_t aux_cntl4[14];
radeon-modeset.patch:
Index: radeon-modeset.patch
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/radeon-modeset.patch,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -r1.32 -r1.33
--- radeon-modeset.patch 27 Feb 2009 03:57:32 -0000 1.32
+++ radeon-modeset.patch 2 Mar 2009 23:42:19 -0000 1.33
@@ -1,5 +1,5 @@
diff --git a/configure.ac b/configure.ac
-index 28207d6..051eca8 100644
+index b094a50..29a19e3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -114,8 +114,19 @@ if test "$DRI" = yes; then
@@ -23,7 +23,7 @@
CFLAGS="$XORG_CFLAGS"
AC_CHECK_HEADER(xf86Modes.h,[XMODES=yes],[XMODES=no],[#include "xorg-server.h"])
diff --git a/src/Makefile.am b/src/Makefile.am
-index 7ff7d31..c03a2c7 100644
+index 7cc2a6f..8a55d1c 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -90,12 +90,14 @@ radeon_drv_ladir = @moduledir@/drivers
@@ -1012,7 +1012,7 @@
+#endif
+#endif
diff --git a/src/radeon.h b/src/radeon.h
-index a7ed95e..69e41a6 100644
+index 355a949..9cdc12a 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -46,6 +46,8 @@
@@ -1118,7 +1118,7 @@
int fbX;
int fbY;
int backX;
-@@ -817,6 +852,7 @@ typedef struct {
+@@ -783,6 +818,7 @@ typedef struct {
RADEONCardType cardType; /* Current card is a PCI card */
struct radeon_cp *cp;
struct radeon_dri *dri;
@@ -1126,7 +1126,7 @@
#ifdef USE_EXA
Bool accelDFS;
#endif
-@@ -918,6 +954,44 @@ typedef struct {
+@@ -884,6 +920,44 @@ typedef struct {
int virtualX;
int virtualY;
@@ -1171,7 +1171,7 @@
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
-@@ -1170,6 +1244,23 @@ extern void
+@@ -1136,6 +1210,23 @@ extern void
radeon_legacy_free_memory(ScrnInfoPtr pScrn,
void *mem_struct);
@@ -1195,7 +1195,7 @@
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
-@@ -1188,7 +1279,9 @@ do { \
+@@ -1154,7 +1245,9 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
@@ -1206,7 +1206,7 @@
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
-@@ -1223,7 +1316,7 @@ do { \
+@@ -1189,7 +1282,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
@@ -1215,7 +1215,7 @@
if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
-@@ -1250,6 +1343,13 @@ do { \
+@@ -1216,6 +1309,13 @@ do { \
#define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0
#define BEGIN_RING(n) do { \
@@ -1229,7 +1229,7 @@
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
-@@ -1262,13 +1362,6 @@ do { \
+@@ -1228,13 +1328,6 @@ do { \
} \
info->cp->dma_debug_func = __FILE__; \
info->cp->dma_debug_lineno = __LINE__; \
@@ -1243,7 +1243,7 @@
__expected = n; \
__head = (pointer)((char *)info->cp->indirectBuffer->address + \
info->cp->indirectBuffer->used); \
-@@ -1311,6 +1404,14 @@ do { \
+@@ -1277,6 +1370,14 @@ do { \
OUT_RING(val); \
} while (0)
@@ -2481,7 +2481,7 @@
xf86CrtcPtr crtc = xf86_config->crtc[c];
RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
-index 45c927f..b9641a8 100644
+index 45f79ed..0b1f7d8 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -40,6 +40,8 @@
@@ -2493,16 +2493,16 @@
/* Driver data structures */
#include "radeon.h"
-@@ -51,6 +53,8 @@
- #include "radeon_dri.h"
- #include "radeon_version.h"
+@@ -53,6 +55,8 @@
+
+ #include "atipciids.h"
+#include "radeon_drm.h"
+
/* X and server generic header files */
#include "xf86.h"
#include "xf86PciInfo.h"
-@@ -68,16 +72,31 @@ static size_t radeon_drm_page_size;
+@@ -70,16 +74,31 @@ static size_t radeon_drm_page_size;
extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs,
void **configprivs);
@@ -2536,7 +2536,7 @@
static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num);
#endif
#endif
-@@ -350,6 +369,129 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
+@@ -352,6 +371,133 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
#endif
}
@@ -2645,7 +2645,7 @@
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ RADEONInfoPtr info = RADEONPTR(pScrn);
+ Bool success;
-+ drm_radeon_sarea_t * sarea = DRIGetSAREAPrivate(pScreen);
++ drm_radeon_sarea_t *sarea;
+
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+ return TRUE;
@@ -2653,6 +2653,10 @@
+ if (!info->drm_mm)
+ return TRUE;
+
++ if (info->dri2.enabled)
++ return TRUE;
++
++ sarea = DRIGetSAREAPrivate(pScreen);
+ success = radeon_update_dri_mappings(pScrn, sarea);
+
+ if (!success)
@@ -2666,7 +2670,7 @@
/* Called when the X server is woken up to allow the last client's
* context to be saved and the X server's context to be loaded. This is
* not necessary for the Radeon since the client detects when it's
-@@ -699,25 +841,35 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
+@@ -701,25 +847,35 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info)
info->dri->gartOffset = 0;
@@ -2721,7 +2725,7 @@
}
/* AGP Mode Quirk List - Certain hostbridge/gfx-card combos don't work with
-@@ -979,6 +1131,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -988,6 +1144,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[agp] ring handle = 0x%08x\n",
(unsigned int)info->dri->ringHandle);
@@ -2730,7 +2734,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
&info->dri->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n");
-@@ -987,9 +1141,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -996,9 +1154,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring mapped at 0x%08lx\n",
(unsigned long)info->dri->ring);
@@ -2742,7 +2746,7 @@
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[agp] Could not add ring read ptr mapping\n");
return FALSE;
-@@ -998,6 +1153,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1007,6 +1166,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[agp] ring read ptr handle = 0x%08x\n",
(unsigned int)info->dri->ringReadPtrHandle);
@@ -2751,7 +2755,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize,
&info->dri->ringReadPtr) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR,
-@@ -1007,6 +1164,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1016,6 +1177,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[agp] Ring read ptr mapped at 0x%08lx\n",
(unsigned long)info->dri->ringReadPtr);
@@ -2759,7 +2763,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize,
DRM_AGP, 0, &info->dri->bufHandle) < 0) {
-@@ -1084,6 +1242,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1093,6 +1255,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[pci] ring handle = 0x%08x\n",
(unsigned int)info->dri->ringHandle);
@@ -2767,7 +2771,7 @@
if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize,
&info->dri->ring) < 0) {
xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n");
-@@ -1095,6 +1254,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1104,6 +1267,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring contents 0x%08lx\n",
*(unsigned long *)(pointer)info->dri->ring);
@@ -2775,7 +2779,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize,
DRM_SCATTER_GATHER, flags, &info->dri->ringReadPtrHandle) < 0) {
-@@ -1106,8 +1266,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1115,8 +1279,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
"[pci] ring read ptr handle = 0x%08x\n",
(unsigned int)info->dri->ringReadPtrHandle);
@@ -2786,7 +2790,7 @@
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[pci] Could not map ring read ptr\n");
return FALSE;
-@@ -1118,6 +1280,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1127,6 +1293,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
xf86DrvMsg(pScreen->myNum, X_INFO,
"[pci] Ring read ptr contents 0x%08lx\n",
*(unsigned long *)(pointer)info->dri->ringReadPtr);
@@ -2794,7 +2798,7 @@
if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize,
DRM_SCATTER_GATHER, 0, &info->dri->bufHandle) < 0) {
-@@ -1170,6 +1333,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1179,6 +1346,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
*/
static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen)
{
@@ -2804,7 +2808,7 @@
/* Map registers */
info->dri->registerSize = info->MMIOSize;
if (drmAddMap(info->dri->drmFD, info->MMIOAddr, info->dri->registerSize,
-@@ -1210,20 +1376,23 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1219,20 +1389,23 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drmInfo.fb_bpp = info->CurrentLayout.pixel_code;
drmInfo.depth_bpp = (info->dri->depthBits - 8) * 2;
@@ -2842,7 +2846,7 @@
if (drmCommandWrite(info->dri->drmFD, DRM_RADEON_CP_INIT,
&drmInfo, sizeof(drm_radeon_init_t)) < 0)
return FALSE;
-@@ -1232,8 +1401,9 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
+@@ -1241,8 +1414,9 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
* registers back to their default values, so we need to restore
* those engine register here.
*/
@@ -2854,7 +2858,7 @@
return TRUE;
}
-@@ -1431,12 +1601,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1440,12 +1614,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
/* Get DRM version & close DRM */
info->dri->pKernelDRMVersion = drmGetVersion(fd);
@@ -2868,7 +2872,7 @@
}
/* Now check if we qualify */
-@@ -1470,10 +1639,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
+@@ -1479,10 +1652,29 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn)
req_patch);
drmFreeVersion(info->dri->pKernelDRMVersion);
info->dri->pKernelDRMVersion = NULL;
@@ -2899,7 +2903,7 @@
}
Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
-@@ -1482,6 +1670,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1491,6 +1683,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int value = 0;
@@ -2909,7 +2913,7 @@
if (!info->want_vblank_interrupts)
on = FALSE;
-@@ -1501,6 +1692,48 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
+@@ -1510,6 +1705,48 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
return TRUE;
}
@@ -2958,7 +2962,7 @@
/* Initialize the screen-specific data structures for the DRI and the
* Radeon. This is the main entry point to the device-specific
-@@ -1564,10 +1797,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1573,10 +1810,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4;
pDRIInfo->ddxDriverMinorVersion = 3;
pDRIInfo->ddxDriverPatchVersion = 0;
@@ -2985,7 +2989,7 @@
pDRIInfo->ddxDrawableTableEntry = RADEON_MAX_DRAWABLES;
pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES
< RADEON_MAX_DRAWABLES
-@@ -1620,9 +1865,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1629,9 +1878,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d;
pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d;
pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d;
@@ -2996,7 +3000,7 @@
pDRIInfo->ClipNotify = RADEONDRIClipNotify;
#endif
-@@ -1654,57 +1897,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
+@@ -1663,57 +1910,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
pDRIInfo = NULL;
return FALSE;
}
@@ -3101,7 +3105,7 @@
static Bool RADEONDRIDoCloseScreen(int scrnIndex, ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-@@ -1746,17 +1992,21 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1755,17 +2005,21 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
return FALSE;
}
@@ -3131,7 +3135,7 @@
/* Initialize and start the CP if required */
RADEONDRICPInit(pScrn);
-@@ -1765,6 +2015,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
+@@ -1774,6 +2028,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
pSAREAPriv = (drm_radeon_sarea_t*)DRIGetSAREAPrivate(pScreen);
memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
@@ -3142,7 +3146,7 @@
pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate;
pRADEONDRI->deviceID = info->Chipset;
-@@ -1922,6 +2176,8 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1931,6 +2189,8 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->dri->buf, info->dri->bufMapSize);
info->dri->buf = NULL;
}
@@ -3151,7 +3155,7 @@
if (info->dri->ringReadPtr) {
drmUnmap(info->dri->ringReadPtr, info->dri->ringReadMapSize);
info->dri->ringReadPtr = NULL;
-@@ -1930,6 +2186,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
+@@ -1939,6 +2199,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
drmUnmap(info->dri->ring, info->dri->ringMapSize);
info->dri->ring = NULL;
}
@@ -3159,7 +3163,7 @@
if (info->dri->agpMemHandle != DRM_AGP_NO_HANDLE) {
drmAgpUnbind(info->dri->drmFD, info->dri->agpMemHandle);
drmAgpFree(info->dri->drmFD, info->dri->agpMemHandle);
-@@ -2335,3 +2592,16 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
+@@ -2344,3 +2605,16 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value)
&radeonsetparam, sizeof(drm_radeon_setparam_t));
return ret;
}
@@ -6093,10 +6097,10 @@
}
#endif
diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c
-index dec0285..6e9c212 100644
+index 59cb46f..7172cc2 100644
--- a/src/radeon_exa_funcs.c
+++ b/src/radeon_exa_funcs.c
-@@ -72,21 +72,73 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
+@@ -74,21 +74,73 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
RADEONInfoPtr info = RADEONPTR(pScrn);
@@ -6171,7 +6175,7 @@
ACCEL_PREAMBLE();
TRACE;
-@@ -95,25 +147,58 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
+@@ -97,25 +149,58 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg)
RADEON_FALLBACK(("24bpp unsupported\n"));
if (!RADEONGetDatatypeBpp(pPix->drawable.bitsPerPixel, &datatype))
RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n"));
@@ -6245,7 +6249,7 @@
return TRUE;
}
-@@ -144,6 +229,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
+@@ -146,6 +231,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
TRACE;
@@ -6253,7 +6257,7 @@
BEGIN_ACCEL(2);
OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
-@@ -151,6 +237,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
+@@ -153,6 +239,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix)
FINISH_ACCEL();
}
@@ -6261,7 +6265,7 @@
void
FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
uint32_t dst_pitch_offset, uint32_t datatype, int rop,
-@@ -161,23 +248,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
+@@ -163,23 +250,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset,
RADEON_SWITCH_TO_2D();
@@ -6307,7 +6311,7 @@
}
static Bool
-@@ -188,9 +280,46 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
+@@ -190,9 +282,46 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
{
RINFO_FROM_SCREEN(pDst->drawable.pScreen);
uint32_t datatype, src_pitch_offset, dst_pitch_offset;
@@ -6355,7 +6359,7 @@
info->accel_state->xdir = xdir;
info->accel_state->ydir = ydir;
-@@ -198,10 +327,11 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
+@@ -200,10 +329,11 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst,
RADEON_FALLBACK(("24bpp unsupported"));
if (!RADEONGetDatatypeBpp(pDst->drawable.bitsPerPixel, &datatype))
RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n"));
@@ -6369,7 +6373,7 @@
FUNC_NAME(RADEONDoPrepareCopy)(pScrn, src_pitch_offset, dst_pitch_offset,
datatype, rop, planemask);
-@@ -249,6 +379,7 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
+@@ -251,6 +381,7 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
TRACE;
@@ -6377,7 +6381,7 @@
BEGIN_ACCEL(2);
OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL);
OUT_ACCEL_REG(RADEON_WAIT_UNTIL,
-@@ -259,12 +390,15 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
+@@ -261,12 +392,15 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst)
#ifdef ACCEL_CP
@@ -6393,7 +6397,7 @@
unsigned int hpass;
uint32_t buf_pitch, dst_pitch_off;
-@@ -273,9 +407,45 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -275,9 +409,45 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
if (bpp < 8)
return FALSE;
@@ -6442,7 +6446,7 @@
int cpp = bpp / 8;
ACCEL_PREAMBLE();
-@@ -298,17 +468,24 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
+@@ -300,17 +470,24 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h,
return FALSE;
}
@@ -6469,7 +6473,7 @@
OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL,
RADEON_GMC_DST_PITCH_OFFSET_CNTL |
RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
-@@ -319,8 +496,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset,
+@@ -321,8 +498,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset,
RADEON_DP_SRC_SOURCE_MEMORY |
RADEON_GMC_CLR_CMP_CNTL_DIS |
RADEON_GMC_WR_MSK_DIS);
@@ -6484,7 +6488,7 @@
OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX);
OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX);
OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w);
-@@ -332,6 +515,173 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset,
+@@ -334,6 +517,173 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset,
FINISH_ACCEL();
}
@@ -6658,7 +6662,7 @@
static Bool
RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
-@@ -345,12 +695,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
+@@ -347,12 +697,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
TRACE;
@@ -6677,7 +6681,7 @@
RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) &&
(scratch = RADEONCPGetBuffer(pScrn)))
{
-@@ -365,7 +720,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
+@@ -367,7 +722,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
RADEON_SWITCH_TO_2D();
/* Kick the first blit as early as possible */
@@ -6687,7 +6691,7 @@
x, y, 0, 0, w, hpass);
FLUSH_RING();
-@@ -392,7 +748,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
+@@ -394,7 +750,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h,
/* Prepare next blit if anything's left */
if (hpass) {
scratch_off = scratch->total/2 - scratch_off;
@@ -6697,7 +6701,7 @@
x, y, 0, 0, w, hpass);
}
-@@ -466,19 +823,22 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+@@ -468,15 +825,13 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
info->accel_state->exa->MarkSync = FUNC_NAME(RADEONMarkSync);
info->accel_state->exa->WaitMarker = FUNC_NAME(RADEONSync);
#ifdef ACCEL_CP
@@ -6713,18 +6717,20 @@
-#endif /* X_BYTE_ORDER == X_BIG_ENDIAN */
info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS;
-- info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
+ #ifdef EXA_SUPPORTS_PREPARE_AUX
+@@ -485,6 +840,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+ info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
info->accel_state->exa->pixmapPitchAlign = 64;
-+ info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1;
-+
+
+ if (info->drm_mm) {
+ info->accel_state->exa->flags |= EXA_HANDLES_PIXMAPS;
+ } else {
+ }
-
++
#ifdef RENDER
if (info->RenderAccel) {
-@@ -488,7 +848,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+ if (info->ChipFamily >= CHIP_FAMILY_R600)
+@@ -493,7 +853,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
else if (IS_R300_3D || IS_R500_3D) {
if ((info->ChipFamily < CHIP_FAMILY_RS400)
#ifdef XF86DRI
@@ -6733,7 +6739,7 @@
#endif
) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration "
-@@ -523,6 +883,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
+@@ -528,6 +888,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen)
}
#endif
@@ -7779,10 +7785,10 @@
+}
+
diff --git a/src/radeon_probe.h b/src/radeon_probe.h
-index 49044e3..9a01a24 100644
+index f072b9c..6d31e39 100644
--- a/src/radeon_probe.h
+++ b/src/radeon_probe.h
-@@ -142,6 +142,27 @@ typedef struct
+@@ -145,6 +145,27 @@ typedef struct
Bool hw_capable;
} RADEONI2CBusRec, *RADEONI2CBusPtr;
@@ -7810,7 +7816,7 @@
typedef struct _RADEONCrtcPrivateRec {
void *crtc_rotate_mem;
void *cursor_mem;
-@@ -155,6 +176,8 @@ typedef struct _RADEONCrtcPrivateRec {
+@@ -158,6 +179,8 @@ typedef struct _RADEONCrtcPrivateRec {
int can_tile;
Bool enabled;
Bool initialized;
Index: xorg-x11-drv-ati.spec
===================================================================
RCS file: /cvs/pkgs/rpms/xorg-x11-drv-ati/devel/xorg-x11-drv-ati.spec,v
retrieving revision 1.150
retrieving revision 1.151
diff -u -r1.150 -r1.151
--- xorg-x11-drv-ati.spec 27 Feb 2009 03:57:32 -0000 1.150
+++ xorg-x11-drv-ati.spec 2 Mar 2009 23:42:19 -0000 1.151
@@ -5,7 +5,7 @@
Summary: Xorg X11 ati video driver
Name: xorg-x11-drv-ati
Version: 6.11.0
-Release: 1%{?dist}
+Release: 2%{?dist}
URL: http://www.x.org
License: MIT
Group: User Interface/X Hardware Support
@@ -76,6 +76,10 @@
%{_mandir}/man4/radeon.4*
%changelog
+* Tue Mar 03 2009 Dave Airlie <airlied at redhat.com> 6.11.0-2
+- rebase to latest upstream r600 accel
+- fixup VT switch on DRI2
+
* Fri Feb 27 2009 Dave Airlie <airlied at redhat.com> 6.11.0-1
- rebase to latest upstream
- enable R600 acceleration for EXA and Xv.
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