rpms/kernel/devel drm-modesetting-radeon.patch, 1.59, 1.60 kernel.spec, 1.1363, 1.1364
Dave Airlie
airlied at fedoraproject.org
Tue Mar 3 09:09:16 UTC 2009
Author: airlied
Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv17924
Modified Files:
drm-modesetting-radeon.patch kernel.spec
Log Message:
* Tue Mar 03 2009 Dave Airlie <airlied at redhat.com> 2.6.29-0.184.rc6.git6
- drm-modesetting-radeon.patch: fix suspend/resume, proc->debugfs
drm-modesetting-radeon.patch:
View full diff with command:
/usr/bin/cvs -f diff -kk -u -N -r 1.59 -r 1.60 drm-modesetting-radeon.patch
Index: drm-modesetting-radeon.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-modesetting-radeon.patch,v
retrieving revision 1.59
retrieving revision 1.60
diff -u -r1.59 -r1.60
--- drm-modesetting-radeon.patch 28 Feb 2009 15:35:25 -0000 1.59
+++ drm-modesetting-radeon.patch 3 Mar 2009 09:09:15 -0000 1.60
@@ -1,3 +1,59 @@
+commit 524351732a7a48d274f5a4e48e004284ba673ebf
+Author: Dave Airlie <airlied at redhat.com>
+Date: Tue Mar 3 18:23:22 2009 +1000
+
+ radeon: port proc debug files to new debugfs interface
+
+commit 8030b34a3383a6b490c128b7cbafb4e1a201f5d4
+Author: Dave Airlie <airlied at redhat.com>
+Date: Tue Mar 3 15:33:52 2009 +1000
+
+ radeon: pin framebuffer and cursors dynamically
+
+commit a00b8f579d6fafc16149902445697255062b45b1
+Author: Alex Deucher <alexdeucher at gmail.com>
+Date: Fri Feb 27 20:25:36 2009 -0500
+
+ radeon: fix MC setup on systems with more than 512 MB of VRAM
+
+ Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
+
+commit 5ad681c0f59c99dee86781a049fc41c66ff7d3b8
+Author: Alex Deucher <alexdeucher at gmail.com>
+Date: Fri Feb 27 20:18:20 2009 -0500
+
+ radeon: leave the MC_FB_LOCATION alone on RS780
+
+ Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
+
+commit 7400fdab0318a2b04d06b2cb6466e9c585d23115
+Author: Alex Deucher <alexdeucher at gmail.com>
+Date: Fri Feb 27 20:15:04 2009 -0500
+
+ radeon: wait for MC idle on r6xx/r7xx chips
+
+ Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
+
+commit b95e633f684312ccc260112ee6a58875f2d1e143
+Author: Alex Deucher <alexdeucher at gmail.com>
+Date: Fri Feb 27 20:07:13 2009 -0500
+
+ radeon: fix up RS600 mc setup and unify mc reg access
+
+ Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
+
+commit 0b64b9965802b5455e9ea6a69eca2f6171235559
+Author: Dave Airlie <airlied at redhat.com>
+Date: Mon Mar 2 23:51:30 2009 +1100
+
+ radeon: fixup suspend/resume hooks
+
+commit af74fbead4da9cfd979e4092c7e1ffe912c978c7
+Author: Dave Airlie <airlied at redhat.com>
+Date: Sun Mar 1 18:25:07 2009 +1100
+
+ radeon: fix rs480 gart size
+
commit 1f756299d935d5a0a4beb82ddeaf0e4b2935861a
Author: Dave Airlie <airlied at redhat.com>
Date: Fri Feb 27 15:37:14 2009 +1000
@@ -6764,7 +6820,7 @@
default:
DRM_ERROR("Can't update pipe %d in SAREA\n", pipe);
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
-index 52ce439..3abfd0d 100644
+index 52ce439..0eea827 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -3,7 +3,11 @@
@@ -6776,7 +6832,7 @@
+ radeon_gem.o radeon_buffer.o radeon_fence.o radeon_cs.o \
+ radeon_i2c.o radeon_fb.o radeon_encoders.o radeon_connectors.o radeon_display.o \
+ atombios_crtc.o atom.o radeon_atombios.o radeon_combios.o radeon_legacy_crtc.o \
-+ radeon_legacy_encoders.o radeon_cursor.o radeon_pm.o radeon_gem_proc.o
++ radeon_legacy_encoders.o radeon_cursor.o radeon_pm.o radeon_gem_debugfs.o
radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
@@ -13848,10 +13904,10 @@
+#endif /* _ATOMBIOS_H */
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
new file mode 100644
-index 0000000..b9f3257
+index 0000000..64d2e09
--- /dev/null
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
-@@ -0,0 +1,463 @@
+@@ -0,0 +1,469 @@
+/*
+ * Copyright 2007-8 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
@@ -13951,7 +14007,6 @@
+
+void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
+{
-+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct drm_radeon_private *dev_priv = dev->dev_private;
+
@@ -13978,7 +14033,6 @@
+static void
+atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, SET_CRTC_USING_DTD_TIMING_PARAMETERS *crtc_param)
+{
-+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct drm_radeon_private *dev_priv = dev->dev_private;
+ SET_CRTC_USING_DTD_TIMING_PARAMETERS conv_param;
@@ -14001,7 +14055,6 @@
+
+void atombios_crtc_set_timing(struct drm_crtc *crtc, SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_param)
+{
-+ struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+ struct drm_device *dev = crtc->dev;
+ struct drm_radeon_private *dev_priv = dev->dev_private;
+ SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION conv_param;
@@ -14133,6 +14186,9 @@
+ obj = radeon_fb->obj;
+ obj_priv = obj->driver_private;
+
++ if (radeon_gem_object_pin(obj, 0, RADEON_GEM_DOMAIN_VRAM))
++ return -EINVAL;
++
+ fb_location = obj_priv->bo->offset + dev_priv->fb_location;
+
+ switch(crtc->fb->bits_per_pixel) {
@@ -14148,7 +14204,7 @@
+ break;
+ default:
+ DRM_ERROR("Unsupported screen depth %d\n", crtc->fb->bits_per_pixel);
-+ return;
++ return -EINVAL;
+ }
+
+ /* TODO tiling */
@@ -14184,6 +14240,12 @@
+ else
+ RADEON_WRITE(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset,
+ 0);
++
++ if (old_fb) {
++ radeon_fb = to_radeon_framebuffer(old_fb);
++ radeon_gem_object_unpin(radeon_fb->obj);
++ }
++ return 0;
+}
+
+int atombios_crtc_mode_set(struct drm_crtc *crtc,
@@ -17854,7 +17916,7 @@
+ return NULL;
+}
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
-index 15cfe56..cead67d 100644
+index 15cfe56..a5b1078 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -46,8 +46,12 @@ static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
@@ -17918,40 +17980,40 @@
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return radeon_read_ring_rptr(dev_priv,
R600_SCRATCHOFF(index));
-@@ -159,7 +175,24 @@ static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+@@ -151,15 +167,18 @@ static u32 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+ return ret;
+ }
+
+-static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
++u32 RADEON_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+ {
+ if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+ ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
+ return RS690_READ_MCIND(dev_priv, addr);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
return RS600_READ_MCIND(dev_priv, addr);
- else
-- return RS480_READ_MCIND(dev_priv, addr);
-+ return RS480_READ_MCIND(dev_priv, addr);
-+}
-+
-+u32 radeon_read_mc_reg(drm_radeon_private_t *dev_priv, int addr)
-+{
-+ if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
-+ return IGP_READ_MCIND(dev_priv, addr);
-+ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515)
+- else
++ else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
++ ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480))
+ return RS480_READ_MCIND(dev_priv, addr);
++ else
+ return R500_READ_MCIND(dev_priv, addr);
-+ return 0;
-+}
-+
[...1631 lines suppressed...]
new file mode 100644
-index 0000000..18e4082
+index 0000000..cfe9682
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
-@@ -0,0 +1,1078 @@
+@@ -0,0 +1,1097 @@
+/*
+ * Copyright 2007-8 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
@@ -26656,7 +26878,8 @@
+ }
+}
+
-+static bool radeon_set_crtc1_base(struct drm_crtc *crtc, int x, int y)
++static bool radeon_set_crtc1_base(struct drm_crtc *crtc, int x, int y,
++ struct drm_framebuffer *old_fb)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_radeon_private *dev_priv = dev->dev_private;
@@ -26675,6 +26898,9 @@
+ obj = radeon_fb->obj;
+ obj_priv = obj->driver_private;
+
++ if (radeon_gem_object_pin(obj, 0, RADEON_GEM_DOMAIN_VRAM))
++ return -EINVAL;
++
+ crtc_offset = obj_priv->bo->offset;
+
+ crtc_offset_cntl = 0;
@@ -26753,6 +26979,11 @@
+ disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
+ RADEON_WRITE(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
+
++ if (old_fb) {
++ radeon_fb = to_radeon_framebuffer(old_fb);
++ radeon_gem_object_unpin(radeon_fb->obj);
++ }
++
+ return true;
+}
+
@@ -27079,7 +27310,8 @@
+
+}
+
-+static bool radeon_set_crtc2_base(struct drm_crtc *crtc, int x, int y)
++static bool radeon_set_crtc2_base(struct drm_crtc *crtc, int x, int y,
++ struct drm_framebuffer *old_fb)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_radeon_private *dev_priv = dev->dev_private;
@@ -27098,6 +27330,9 @@
+ obj = radeon_fb->obj;
+ obj_priv = obj->driver_private;
+
++ if (radeon_gem_object_pin(obj, 0, RADEON_GEM_DOMAIN_VRAM))
++ return -EINVAL;
++
+ crtc2_offset = obj_priv->bo->offset;
+
+ crtc2_offset_cntl = 0;
@@ -27146,7 +27381,7 @@
+ offset *= 4;
+ break;
+ default:
-+ return false;
++ goto out;
+ }
+ base += offset;
+ }
@@ -27174,6 +27409,12 @@
+ disp2_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
+ RADEON_WRITE(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);
+
++ out:
++ if (old_fb) {
++ radeon_fb = to_radeon_framebuffer(old_fb);
++ radeon_gem_object_unpin(radeon_fb->obj);
++ }
++
+ return true;
+}
+
@@ -27455,10 +27696,10 @@
+
+ switch(radeon_crtc->crtc_id) {
+ case 0:
-+ radeon_set_crtc1_base(crtc, x, y);
++ radeon_set_crtc1_base(crtc, x, y, old_fb);
+ break;
+ case 1:
-+ radeon_set_crtc2_base(crtc, x, y);
++ radeon_set_crtc2_base(crtc, x, y, old_fb);
+ break;
+
+ }
@@ -28909,10 +29150,10 @@
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
new file mode 100644
-index 0000000..e80903f
+index 0000000..43668b7
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
-@@ -0,0 +1,354 @@
+@@ -0,0 +1,356 @@
+/*
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
+ * VA Linux Systems Inc., Fremont, California.
@@ -29108,6 +29349,8 @@
+ uint32_t crtc_offset;
+ struct radeon_framebuffer *fbdev_fb;
+ struct drm_mode_set mode_set;
++ struct drm_gem_object *cursor_bo;
++ uint64_t cursor_addr;
+};
+
+#define RADEON_USE_RMX 1
@@ -29269,10 +29512,10 @@
+#endif
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
new file mode 100644
-index 0000000..af348ae
+index 0000000..ac7bc0a
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
-@@ -0,0 +1,248 @@
+@@ -0,0 +1,257 @@
+/*
+ * Copyright 2007-8 Advanced Micro Devices, Inc.
+ * Copyright 2008 Red Hat Inc.
@@ -29319,8 +29562,13 @@
+ if (state.event == PM_EVENT_PRETHAW)
+ return 0;
+
-+ if (!drm_core_check_feature(dev, DRIVER_MODESET))
++ if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
++ /* Disable *all* interrupts */
++ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
++ RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
++ RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
+ return 0;
++ }
+
+ /* unpin the front buffers */
+ list_for_each_entry(fb, &dev->mode_config.fb_kernel_list, filp_head) {
@@ -29369,8 +29617,12 @@
+ struct drm_framebuffer *fb;
+ int i;
+
-+ if (!drm_core_check_feature(dev, DRIVER_MODESET))
++ if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
++ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
++ RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
++ RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
+ return 0;
++ }
+
+ pci_set_power_state(dev->pdev, PCI_D0);
+ pci_restore_state(dev->pdev);
@@ -29523,10 +29775,10 @@
+
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
new file mode 100644
-index 0000000..3341d38
+index 0000000..bb9ad4a
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
-@@ -0,0 +1,5343 @@
+@@ -0,0 +1,5335 @@
+/*
+ * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
+ * VA Linux Systems Inc., Fremont, California.
@@ -33016,16 +33268,6 @@
+#define RS690_MC_STATUS 0x90
+#define RS690_MC_STATUS_IDLE (1 << 0)
+
-+#define RS600_MC_INDEX 0x78
-+# define RS600_MC_INDEX_MASK 0xff
-+# define RS600_MC_INDEX_WR_EN (1 << 8)
-+# define RS600_MC_INDEX_WR_ACK 0xff
-+#define RS600_MC_DATA 0x7c
-+
-+#define RS600_MC_FB_LOCATION 0xA
-+#define RS600_MC_STATUS 0x0
-+#define RS600_MC_STATUS_IDLE (1 << 0)
-+
+#define AVIVO_MC_INDEX 0x0070
+#define R520_MC_STATUS 0x00
+#define R520_MC_STATUS_IDLE (1<<1)
@@ -33052,6 +33294,8 @@
+# define R600_CHANSIZE (1 << 7)
+# define R600_CHANSIZE_OVERRIDE (1 << 10)
+
++#define R600_SRBM_STATUS 0x0e50
++
+#define AVIVO_HDP_FB_LOCATION 0x134
+
+#define AVIVO_VGA_RENDER_CONTROL 0x0300
Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1363
retrieving revision 1.1364
diff -u -r1.1363 -r1.1364
--- kernel.spec 3 Mar 2009 02:01:55 -0000 1.1363
+++ kernel.spec 3 Mar 2009 09:09:16 -0000 1.1364
@@ -1785,6 +1785,9 @@
# and build.
%changelog
+* Tue Mar 03 2009 Dave Airlie <airlied at redhat.com> 2.6.29-0.184.rc6.git6
+- drm-modesetting-radeon.patch: fix suspend/resume, proc->debugfs
+
* Mon Mar 02 2009 Dave Jones <davej at redhat.com> 2.6.29-0.183.rc6.git6
- 2.6.29-rc6-git6
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