rpms/gcc/devel gcc44-power7.patch,NONE,1.1 power7.patch,1.1,NONE

[Jakub Jelinek]

Author: jakub

Update of /cvs/pkgs/rpms/gcc/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv26693

Added Files:
	gcc44-power7.patch 
Removed Files:
	power7.patch 
Log Message:
4.4.0-0.23


gcc44-power7.patch:

--- NEW FILE gcc44-power7.patch ---
2009-03-06  Michael Meissner  <meissner at linux.vnet.ibm.com>

	* doc/invoke.texi (-mvsx-scalar-memory): New switch, to switch to
	use VSX reg+reg addressing for all scalar double precision
	floating point.
	* config/rs6000/rs6000.opt (-vsx-scalar-memory): Ditto.
	
	* configure.ac (gcc_cv_as_powerpc_mfpgpr): Set binutils version to
	2.19.2.
	(gcc_cv_as_powerpc_cmpb): Ditto.
	(gcc_cv_as_powerpc_dfp): Ditto.
	(gcc_cv_as_powerpc_vsx): Ditto.
	(gcc_cv_as_powerpc_popcntd): Ditto.
	* configure: Regenerate.

	* config/rs6000/vector.md (VEC_int): New mode attribute for vector
	conversions.
	(VEC_INT): Ditto.
	(ftrunc<mode>2): Make this a define_expand.
	(float<VEC_int><mode>2): New vector conversion support to add VSX
	32 bit int/32 bit floating point convert and 64 bit int/64 bit
	floating point vector instructions.
	(unsigned_float<VEC_int><mode>2): Ditto.
	(fix_trunc<mode><VEC_int>2): Ditto.
	(fixuns_trunc<mode><VEC_int>2): Ditto.

	* config/rs6000/predicates.md (easy_fp_constant): 0.0 is an easy
	constant under VSX.
	(indexed_or_indirect_operand): Add VSX load/store with update
	support.

	* config/rs6000/rs6000.c (rs6000_debug_addr): New global for
	-mdebug=addr.
	(rs6000_init_hard_regno_mode_ok): Add -mvsx-scalar-memory
	support.
	(rs6000_override_options): Add -mdebug=addr support.
	(rs6000_builtin_conversion): Add VSX same size conversions.
	(rs6000_legitimize_address): Add -mdebug=addr support.  Add
	support for VSX load/store with update instructions.
	(rs6000_legitimize_reload_address): Ditto.
	(rs6000_legitimate_address): Ditto.
	(rs6000_mode_dependent_address): Ditto.
	(print_operand): Ditto.
	(bdesc_1arg): Add builtins for conversion that calls either the
	VSX or Altivec insn pattern.
	(rs6000_common_init_builtins): Ditto.

	* config/rs6000/vsx.md (VSX_I): Delete, no longer used.
	(VSi): New mode attribute for conversions.
	(VSI): Ditto.
	(VSc): Ditto.
	(vsx_mov<mode>): Add load/store with update support.
	(vsx_load<mode>_update*): New insns for load/store with update
	support.
	(vsx_store<mode>_update*): Ditto.
	(vsx_fmadd<mode>4): Generate correct code for V4SF.
	(vsx_fmsub<mode>4): Ditto.
	(vsx_fnmadd<mode>4_*): Ditto.
	(vsx_fnmsub<mode>4_*): Ditto.
	(vsx_float<VSi><mode>2): New insn for vector conversion.
	(vsx_floatuns<VSi><mode>2): Ditto.
	(vsx_fix_trunc<mode><VSi>2): Ditto.
	(vsx_fixuns_trunc<mode><VSi>2): Ditto.
	(vsx_xxmrghw): New insn for V4SF interleave.
	(vsx_xxmrglw): Ditto.

	* config/rs6000/rs6000.h (rs6000_debug_addr): -mdebug=addr
	support.
	(TARGET_DEBUG_ADDR): Ditto.
	(rs6000_builtins): Add VSX instructions for eventual VSX
	builtins.

	* config/rs6000/altivec.md (altivec_vmrghsf): Don't do the altivec
	instruction if VSX.
	(altivec_vmrglsf): Ditto.

	* config/rs6000/rs6000.md (movdf_hardfloat32): Add support for
	using xxlxor to zero a floating register if VSX.
	(movdf_hardfloat64_mfpgpr): Ditto.
	(movdf_hardfloat64): Ditto.

2009-03-03  Michael Meissner  <meissner at linux.vnet.ibm.com>

	* config/rs6000/vsx.md (vsx_xxmrglw): Delete for now, use Altivec.
	(vsx_xxmrghw): Ditto.

	* config/rs6000/altivec.md (altivec_vmrghsf): Use this insn even
	on VSX systems.
	(altivec_vmrglsf): Ditto.

	* config/rs6000/rs6000.h (ASM_CPU_NATIVE_SPEC): Use %(asm_default)
	if we are running as a cross compiler.

	* config/rs6000/vector.md (vec_interleave_highv4sf): Use correct
	constants for the extraction.
	(vec_interleave_lowv4sf): Ditto.

	* config/rs6000/rs6000.md (floordf2): Fix typo, make this a
	define_expand, not define_insn.

	* config/rs6000/aix53.h (ASM_CPU_SPEC): If -mcpu=native, call
	%:local_cpu_detect(asm) to get the appropriate assembler flags for
	the machine.
	* config/rs6000/aix61.h (ASM_CPU_SPEC): Ditto.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Ditto.
	(ASM_CPU_NATIVE_SPEC): New spec to get asm options if
	-mcpu=native.
	(EXTRA_SPECS): Add ASM_CPU_NATIVE_SPEC.

	* config/rs6000/driver-rs6000.c (asm_names): New static array to
	give the appropriate asm switches if -mcpu=native.
	(host_detect_local_cpu): Add support for "asm".

	* config/rs6000/rs6000.c (processor_target_table): Don't turn on
	-misel by default for power7.

2009-03-02  Michael Meissner  <meissner at linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_swdivdf): Revert last
	change, since we reverted the floating multiply/add changes.

	* doc/md.texi (Machine Constraints): Update rs6000 constraints.

	* config/rs6000/vector.md (neg<mode>2): Fix typo to enable
	vectorized negation.
	(ftrunc<mode>2): Move ftrunc expander here from altivec.md, and
	add V2DF case.
	(vec_interleave_highv4sf): Correct type to be V4SF, not V4SI.
	(vec_extract_evenv2df): Add expander.
	(vec_extract_oddv2df): Ditto.

	* config/rs6000/vsx.md (vsx_ftrunc<mode>2): New VSX pattern for
	truncate.
	(vsx_ftruncdf2): Ditto.
	(vsx_xxspltw): New instruction for word splat.
	(vsx_xxmrglw): Whitespace changes.  Fix typo from V4SI to v4SF.
	(vsx_xxmrghw): Ditto.

	* config/rs6000/altivec.md (altivec_vmrghsf): Whitespace changes.
	(altivec_vmrglsf): Ditto.
	(altivec_vspltsf): Disable if we have VSX.
	(altivec_ftruncv4sf2): Move expander to vector.md, rename insn.

	* config/rs6000/rs6000.md (ftruncdf2): Add expander for VSX.

	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok):
	Reenable vectorizing V4SF under altivec.
	(rs6000_hard_regno_mode_ok): Don't allow floating values in LR,
	CTR, MQ.  Also, VRSAVE/VSCR are both 32-bits.
	(rs6000_init_hard_regno_mode_ok): Print some of the special
	registers if -mdebug=reg.

	* config/rs6000/rs6000.md (floating multiply/add insns): Go back
	to the original semantics for multiply add/subtract, particularly
	with -ffast-math.

	* config/rs6000/vsx.md (floating multiply/add insns): Mirror the
	rs6000 floating point multiply/add insns in VSX.

2009-03-01  Michael Meissner  <meissner at linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_L): At TImode.
	(VEC_M): Like VEC_L, except no TImode.
	(VEC_base): Add TImode support.
	(mov<mode>): Use VEC_M, not VEC_L.  If there is no extra
	optimization for the move, just generate the standard move.
	(vector_store_<mode>): Ditto.
	(vector_load_<mode>): Ditto.
	(vec_init<mode>): Use vec_init_operand predicate.

	* config/rs6000/predicates.md (vec_init_operand): New predicate.

	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow mode
	in a VSX register if there is a move operation.
	(rs6000_vector_reg_class): Add internal register number to the
	debug output.
	(rs6000_init_hard_regno_mode_ok): Reorganize so all of the code
	for a given type is located together.  If not -mvsx, make "ws"
	constraint become NO_REGS, not FLOAT_REGS.  Change -mdebug=reg
	output.
	(rs6000_expand_vector_init): Before calling gen_vsx_concat_v2df,
	make sure the two float arguments are copied into registers.
	(rs6000_legitimate_offset_address_p): If no vsx or altivec, don't
	disallow offset addressing.  Add V2DImode.  If TImode is handled
	by the vector unit, allow indexed addressing.  Change default case
	to be a fatal_insn instead of gcc_unreachable.
	(rs6000_handle_altivec_attribute): Add support for vector double
	if -mvsx.
	(rs6000_register_move_cost): Add support for VSX_REGS.  Know that
	under VSX, you can move between float and altivec registers
	cheaply.
	(rs6000_emit_swdivdf): Change the pattern of the negate multiply
	and subtract operation.

	* config/rs6000/vsx.md (VSX_I): Add TImode.
	(VSX_L): Add TImode.
	(VSm): Ditto.
	(VSs): Ditto.
	(VSr): Ditto.
[...9107 lines suppressed...]
 	if (TARGET_64BIT)						\
 	  error ("64-bit E500 not supported");				\
 	if (TARGET_HARD_FLOAT && TARGET_FPRS)				\
--- gcc/config/rs6000/driver-rs6000.c	(.../trunk)	(revision 144557)
+++ gcc/config/rs6000/driver-rs6000.c	(.../branches/ibm/power7-meissner)	(revision 144692)
@@ -343,11 +343,115 @@ detect_processor_aix (void)
 #endif /* _AIX */
 
 
+/*
+ * Array to map -mcpu=native names to the switches passed to the assembler.
+ * This list mirrors the specs in ASM_CPU_SPEC, and any changes made here
+ * should be made there as well.
+ */
+
+struct asm_name {
+  const char *cpu;
+  const char *asm_sw;
+};
+
+static const
+struct asm_name asm_names[] = {
+#if defined (_AIX)
+  { "power3",	"-m620" },
+  { "power4",	"-mpwr4" },
+  { "power5",	"-mpwr5" },
+  { "power5+",	"-mpwr5x" },
+  { "power6",	"-mpwr6" },
+  { "power6x",	"-mpwr6" },
+  { "power7",	"-mpwr7" },
+  { "powerpc",	"-mppc" },
+  { "rs64a",	"-mppc" },
+  { "603",	"-m603" },
+  { "603e",	"-m603" },
+  { "604",	"-m604" },
+  { "604e",	"-m604" },
+  { "620",	"-m620" },
+  { "630",	"-m620" },
+  { "970",	"-m970" },
+  { "G5",	"-m970" },
+  { NULL,	"\
+%{!maix64: \
+%{mpowerpc64: -mppc64} \
+%{maltivec: -m970} \
+%{!maltivec: %{!mpower64: %(asm_default)}}}" },
+
+#else
+  { "common",	"-mcom" },
+  { "cell",	"-mcell" },
+  { "power",	"-mpwr" },
+  { "power2",	"-mpwrx" },
+  { "power3",	"-mppc64" },
+  { "power4",	"-mpower4" },
+  { "power5",	"%(asm_cpu_power5)" },
+  { "power5+",	"%(asm_cpu_power5)" },
+  { "power6",	"%(asm_cpu_power6) -maltivec" },
+  { "power6x",	"%(asm_cpu_power6) -maltivec" },
+  { "power7",	"%(asm_cpu_power7)" },
+  { "powerpc",	"-mppc" },
+  { "rios",	"-mpwr" },
+  { "rios1",	"-mpwr" },
+  { "rios2",	"-mpwrx" },
+  { "rsc",	"-mpwr" },
+  { "rsc1",	"-mpwr" },
+  { "rs64a",	"-mppc64" },
+  { "401",	"-mppc" },
+  { "403",	"-m403" },
+  { "405",	"-m405" },
+  { "405fp",	"-m405" },
+  { "440",	"-m440" },
+  { "440fp",	"-m440" },
+  { "464",	"-m440" },
+  { "464fp",	"-m440" },
+  { "505",	"-mppc" },
+  { "601",	"-m601" },
+  { "602",	"-mppc" },
+  { "603",	"-mppc" },
+  { "603e",	"-mppc" },
+  { "ec603e",	"-mppc" },
+  { "604",	"-mppc" },
+  { "604e",	"-mppc" },
+  { "620",	"-mppc64" },
+  { "630",	"-mppc64" },
+  { "740",	"-mppc" },
+  { "750",	"-mppc" },
+  { "G3",	"-mppc" },
+  { "7400",	"-mppc -maltivec" },
+  { "7450",	"-mppc -maltivec" },
+  { "G4",	"-mppc -maltivec" },
+  { "801",	"-mppc" },
+  { "821",	"-mppc" },
+  { "823",	"-mppc" },
+  { "860",	"-mppc" },
+  { "970",	"-mpower4 -maltivec" },
+  { "G5",	"-mpower4 -maltivec" },
+  { "8540",	"-me500" },
+  { "8548",	"-me500" },
+  { "e300c2",	"-me300" },
+  { "e300c3",	"-me300" },
+  { "e500mc",	"-me500mc" },
+  { NULL,	"\
+%{mpower: %{!mpower2: -mpwr}} \
+%{mpower2: -mpwrx} \
+%{mpowerpc64*: -mppc64} \
+%{!mpowerpc64*: %{mpowerpc*: -mppc}} \
+%{mno-power: %{!mpowerpc*: -mcom}} \
+%{!mno-power: %{!mpower*: %(asm_default)}}" },
+#endif
+};
+
 /* This will be called by the spec parser in gcc.c when it sees
    a %:local_cpu_detect(args) construct.  Currently it will be called
    with either "arch" or "tune" as argument depending on if -march=native
    or -mtune=native is to be substituted.
 
+   Additionally it will be called with "asm" to select the appropriate flags
+   for the assembler.
+
    It returns a string containing new command line parameters to be
    put at the place of the above two options, depending on what CPU
    this is executed.
@@ -361,29 +465,35 @@ const char
   const char *cache = "";
   const char *options = "";
   bool arch;
+  bool assembler;
+  size_t i;
 
   if (argc < 1)
     return NULL;
 
   arch = strcmp (argv[0], "cpu") == 0;
-  if (!arch && strcmp (argv[0], "tune"))
+  assembler = (!arch && strcmp (argv[0], "asm") == 0);
+  if (!arch && !assembler && strcmp (argv[0], "tune"))
     return NULL;
 
+  if (! assembler)
+    {
 #if defined (_AIX)
-  cache = detect_caches_aix ();
+      cache = detect_caches_aix ();
 #elif defined (__APPLE__)
-  cache = detect_caches_darwin ();
+      cache = detect_caches_darwin ();
 #elif defined (__FreeBSD__)
-  cache = detect_caches_freebsd ();
-  /* FreeBSD PPC does not provide any cache information yet.  */
-  cache = "";
+      cache = detect_caches_freebsd ();
+      /* FreeBSD PPC does not provide any cache information yet.  */
+      cache = "";
 #elif defined (__linux__)
-  cache = detect_caches_linux ();
-  /* PPC Linux does not provide any cache information yet.  */
-  cache = "";
+      cache = detect_caches_linux ();
+      /* PPC Linux does not provide any cache information yet.  */
+      cache = "";
 #else
-  cache = "";
+      cache = "";
 #endif
+    }
 
 #if defined (_AIX)
   cpu = detect_processor_aix ();
@@ -397,6 +507,17 @@ const char
   cpu = "powerpc";
 #endif
 
+  if (assembler)
+    {
+      for (i = 0; i < sizeof (asm_names) / sizeof (asm_names[0]); i++)
+	{
+	  if (!asm_names[i].cpu || !strcmp (asm_names[i].cpu, cpu))
+	    return asm_names[i].asm_sw;
+	}
+
+      return NULL;
+    }
+
   return concat (cache, "-m", argv[0], "=", cpu, " ", options, NULL);
 }
 
--- gcc/config/rs6000/sysv4.h	(.../trunk)	(revision 144557)
+++ gcc/config/rs6000/sysv4.h	(.../branches/ibm/power7-meissner)	(revision 144692)
@@ -119,9 +119,9 @@ do {									\
   else if (!strcmp (rs6000_abi_name, "i960-old"))			\
     {									\
       rs6000_current_abi = ABI_V4;					\
-      target_flags |= (MASK_LITTLE_ENDIAN | MASK_EABI			\
-		       | MASK_NO_BITFIELD_WORD);			\
+      target_flags |= (MASK_LITTLE_ENDIAN | MASK_EABI);			\
       target_flags &= ~MASK_STRICT_ALIGN;				\
+      TARGET_NO_BITFIELD_WORD = 1;					\
     }									\
   else									\
     {									\



--- power7.patch DELETED ---