rpms/kernel/devel drm-nouveau.patch, 1.25, 1.26 kernel.spec, 1.1444, 1.1445

Ben Skeggs bskeggs at fedoraproject.org
Thu Mar 19 06:06:12 UTC 2009 

Author: bskeggs

Update of /cvs/pkgs/rpms/kernel/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv20008

Modified Files:
	drm-nouveau.patch kernel.spec 
Log Message:
* Thu Mar 19 2009 Ben Skeggs <bskeggs at redhat.com>
- drm-nouveau.patch: kms fixes and cleanups



drm-nouveau.patch:

Index: drm-nouveau.patch
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/drm-nouveau.patch,v
retrieving revision 1.25
retrieving revision 1.26
diff -u -r1.25 -r1.26
--- drm-nouveau.patch	13 Mar 2009 07:41:58 -0000	1.25
+++ drm-nouveau.patch	19 Mar 2009 06:06:09 -0000	1.26
@@ -1445,10 +1445,10 @@
 +#endif /* __NOUVEAU_BIOS_H__ */
 diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
 new file mode 100644
-index 0000000..dc52670
+index 0000000..c9bf513
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
-@@ -0,0 +1,414 @@
+@@ -0,0 +1,415 @@
 +/*
 + * Copyright 2007 Dave Airlied
 + * All Rights Reserved.
@@ -1612,10 +1612,11 @@
 +{
 +	struct drm_device *dev = bo->dev;
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
-+	struct nouveau_channel *chan = dev_priv->fifos[bo->new_fence_class];
++	struct nouveau_channel *chan;
 +	uint64_t src_offset, dst_offset;
 +	uint32_t page_count;
 +
++	chan = nouveau_fence_channel(dev, bo->new_fence_class);
 +	if (!chan) {
 +		DRM_ERROR("channel %d non-existant, using kchan\n",
 +			  bo->fence_class);
@@ -1923,10 +1924,10 @@
 +#endif /* __NOUVEAU_CONNECTOR_H__ */
 diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h b/drivers/gpu/drm/nouveau/nouveau_crtc.h
 new file mode 100644
-index 0000000..53b9584
+index 0000000..5104431
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h
-@@ -0,0 +1,64 @@
+@@ -0,0 +1,74 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -1970,7 +1971,15 @@
 +		uint32_t offset;
 +	} fb;
 +
-+	struct nv50_cursor *cursor;
++	struct {
++		struct drm_gem_object *gem;
++		bool visible;
++		uint32_t offset;
++		void (*set_offset)(struct nouveau_crtc *, uint32_t offset);
++		void (*set_pos)(struct nouveau_crtc *, int x, int y);
++		void (*hide)(struct nouveau_crtc *, bool update);
++		void (*show)(struct nouveau_crtc *, bool update);
++	} cursor;
 +
 +	struct {
 +		struct mem_block *mem;
@@ -1989,6 +1998,8 @@
 +#define to_nouveau_crtc(x) container_of((x), struct nouveau_crtc, base)
 +
 +int nv50_crtc_create(struct drm_device *dev, int index);
++int nv50_cursor_init(struct nouveau_crtc *);
++void nv50_cursor_fini(struct nouveau_crtc *);
 +
 +#endif /* __NOUVEAU_CRTC_H__ */
 diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -2612,10 +2623,10 @@
 +MODULE_LICENSE("GPL and additional rights");
 diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
 new file mode 100644
-index 0000000..c281440
+index 0000000..fa22fd1
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
-@@ -0,0 +1,746 @@
+@@ -0,0 +1,750 @@
 +/*
 + * Copyright 2005 Stephane Marchesin.
 + * All Rights Reserved.
@@ -2965,6 +2976,7 @@
 +	struct list_head gpuobj_list;
 +
 +	void *display_priv; /* internal modesetting */
++	bool in_modeset;
 +
 +	struct bios bios;
 +
@@ -3304,6 +3316,8 @@
 +/* nouveau_fence.c */
 +extern struct drm_fence_driver nouveau_fence_driver;
 +extern void nouveau_fence_handler(struct drm_device *dev, int channel);
++extern struct nouveau_channel *
++nouveau_fence_channel(struct drm_device *dev, uint32_t fence_class);
 +
 +/* nouveau_gem.c */
 +extern int nouveau_gem_object_new(struct drm_gem_object *);
@@ -3312,6 +3326,7 @@
 +			   int size, int align, uint32_t domain,
 +			   struct drm_gem_object **);
 +extern int nouveau_gem_pin(struct drm_gem_object *, uint32_t domain);
++extern int nouveau_gem_unpin(struct drm_gem_object *);
 +extern int nouveau_gem_ioctl_new(struct drm_device *, void *,
 +				 struct drm_file *);
 +extern int nouveau_gem_ioctl_pushbuf(struct drm_device *, void *,
@@ -4469,7 +4484,7 @@
 +
 diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
 new file mode 100644
-index 0000000..26f98c0
+index 0000000..6ba3c04
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
 @@ -0,0 +1,127 @@
@@ -4504,7 +4519,7 @@
 +#include "nouveau_drv.h"
 +#include "nouveau_dma.h"
 +
-+static struct nouveau_channel *
++struct nouveau_channel *
 +nouveau_fence_channel(struct drm_device *dev, uint32_t class)
 +{
 +	struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -5284,10 +5299,10 @@
 +int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);
 diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
 new file mode 100644
-index 0000000..94a2dab
+index 0000000..80bc785
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
-@@ -0,0 +1,716 @@
+@@ -0,0 +1,727 @@
 +/*
 + * Copyright (C) 2008 Ben Skeggs.
 + * All Rights Reserved.
@@ -5444,6 +5459,17 @@
 +}
 +
 +int
++nouveau_gem_unpin(struct drm_gem_object *gem)
++{
++	struct nouveau_gem_object *ngem = gem->driver_private;
++	int ret;
++
++	ret = drm_bo_do_validate(ngem->bo, 0, DRM_BO_FLAG_NO_EVICT,
++				 DRM_BO_HINT_DONT_FENCE, 0);
++	return ret;
++}
++
++int
 +nouveau_gem_ioctl_new(struct drm_device *dev, void *data,
 +		      struct drm_file *file_priv)
 +{
@@ -17274,10 +17300,10 @@
 +}
 diff --git a/drivers/gpu/drm/nouveau/nv50_connector.c b/drivers/gpu/drm/nouveau/nv50_connector.c
 new file mode 100644
-index 0000000..b7ce637
+index 0000000..27fea86
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_connector.c
-@@ -0,0 +1,588 @@
+@@ -0,0 +1,591 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -17820,7 +17846,10 @@
 +		break;
 +	}
 +
-+	connector->use_dithering = false;
++	if (type == DRM_MODE_CONNECTOR_LVDS)
++		connector->use_dithering = true;
++	else
++		connector->use_dithering = false;
 +
 +	if (i2c_index < 0xf) {
 +		i2c_index = dev_priv->dcb_table.i2c_read[i2c_index];
@@ -17868,10 +17897,10 @@
 +}
 diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
 new file mode 100644
-index 0000000..707461d
+index 0000000..32238b7
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
-@@ -0,0 +1,765 @@
+@@ -0,0 +1,804 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -17908,7 +17937,6 @@
 +#include "nouveau_fb.h"
 +#include "nouveau_fbcon.h"
 +#include "nouveau_connector.h"
-+#include "nv50_cursor.h"
 +
 +#define NV50_LUT_INDEX(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8)))
 +static int
@@ -17969,7 +17997,7 @@
 +	DRM_DEBUG("%s\n", blanked ? "blanked" : "unblanked");
 +
 +	if (blanked) {
-+		crtc->cursor->hide(crtc, false);
++		crtc->cursor.hide(crtc, false);
 +
 +		OUT_MODE(NV50_CRTC0_CLUT_MODE + offset,
 +			 NV50_CRTC0_CLUT_MODE_BLANK);
@@ -17981,11 +18009,11 @@
 +		OUT_MODE(NV50_CRTC0_BLANK_CTRL + offset,
 +			 NV50_CRTC0_BLANK_CTRL_BLANK);
 +	} else {
-+		crtc->cursor->set_offset(crtc);
-+		if (crtc->cursor->visible)
-+			crtc->cursor->show(crtc, false);
++		crtc->cursor.set_offset(crtc, crtc->cursor.offset);
++		if (crtc->cursor.visible)
++			crtc->cursor.show(crtc, false);
 +		else
-+			crtc->cursor->hide(crtc, false);
++			crtc->cursor.hide(crtc, false);
 +
 +		OUT_MODE(NV50_CRTC0_CLUT_MODE + offset, crtc->lut.depth == 8 ?
 +			 NV50_CRTC0_CLUT_MODE_OFF : NV50_CRTC0_CLUT_MODE_ON);
@@ -18284,7 +18312,7 @@
 +
 +	drm_crtc_cleanup(&crtc->base);
 +
-+	nv50_cursor_destroy(crtc);
++	nv50_cursor_fini(crtc);
 +
 +	if (crtc->lut.mem)
 +		nouveau_mem_free(drm_crtc->dev, crtc->lut.mem);
@@ -18305,10 +18333,23 @@
 +	if (width != 64 || height != 64)
 +		return -EINVAL;
 +
++	if (crtc->cursor.gem) {
++		nouveau_gem_unpin(crtc->cursor.gem);
++
++		mutex_lock(&dev->struct_mutex);
++		drm_gem_object_unreference(crtc->cursor.gem);
++		mutex_unlock(&dev->struct_mutex);
++		crtc->cursor.gem = NULL;
++	}
++
 +	if (buffer_handle) {
++		struct drm_nouveau_private *dev_priv = dev->dev_private;
++		struct nouveau_gem_object *ngem;
++
 +		gem = drm_gem_object_lookup(dev, file_priv, buffer_handle);
 +		if (!gem)
 +			return -EINVAL;
++		ngem = gem->driver_private;
 +
 +		ret = nouveau_gem_pin(gem, NOUVEAU_GEM_DOMAIN_VRAM);
 +		if (ret) {
@@ -18318,22 +18359,25 @@
 +			return ret;
 +		}
 +
-+		crtc->cursor->set_bo(crtc, gem);
-+		crtc->cursor->set_offset(crtc);
-+		ret = crtc->cursor->show(crtc, true);
++		crtc->cursor.offset = ngem->bo->offset -
++				      dev_priv->vm_vram_base;
++		crtc->cursor.set_offset(crtc, crtc->cursor.offset);
++		crtc->cursor.show(crtc, true);
++		crtc->cursor.gem = gem;
 +	} else {
-+		crtc->cursor->set_bo(crtc, NULL);
-+		crtc->cursor->hide(crtc, true);
++		crtc->cursor.hide(crtc, true);
 +	}
 +
 +	return ret;
 +}
 +
-+static int nv50_crtc_cursor_move(struct drm_crtc *drm_crtc, int x, int y)
++static int
++nv50_crtc_cursor_move(struct drm_crtc *drm_crtc, int x, int y)
 +{
 +	struct nouveau_crtc *crtc = to_nouveau_crtc(drm_crtc);
 +
-+	return crtc->cursor->set_pos(crtc, x, y);
++	crtc->cursor.set_pos(crtc, x, y);
++	return 0;
 +}
 +
 +void
@@ -18365,25 +18409,39 @@
 +	nv50_crtc_lut_load(crtc);
 +}
 +
++static int
++nv50_crtc_helper_set_config(struct drm_mode_set *set)
++{
++	struct drm_nouveau_private *dev_priv = set->crtc->dev->dev_private;
++	int ret;
++
++	dev_priv->in_modeset = true;
++	ret = drm_crtc_helper_set_config(set);
++	dev_priv->in_modeset = false;
++	return ret;
++}
++
 +static const struct drm_crtc_funcs nv50_crtc_funcs = {
 +	.save = NULL,
 +	.restore = NULL,
 +	.cursor_set = nv50_crtc_cursor_set,
 +	.cursor_move = nv50_crtc_cursor_move,
 +	.gamma_set = nv50_crtc_gamma_set,
-+	.set_config = drm_crtc_helper_set_config,
++	.set_config = nv50_crtc_helper_set_config,
 +	.destroy = nv50_crtc_destroy,
 +};
 +
 +static void nv50_crtc_dpms(struct drm_crtc *drm_crtc, int mode)
 +{
++	struct drm_nouveau_private *dev_priv = drm_crtc->dev->dev_private;
++	struct nouveau_crtc *crtc = to_nouveau_crtc(drm_crtc);
++
++	if (dev_priv->in_modeset)
++		nv50_crtc_blank(crtc, true);
 +}
 +
 +static void nv50_crtc_prepare(struct drm_crtc *drm_crtc)
 +{
-+	struct nouveau_crtc *crtc = to_nouveau_crtc(drm_crtc);
-+
-+	nv50_crtc_blank(crtc, true);
 +}
 +
 +static void nv50_crtc_commit(struct drm_crtc *drm_crtc)
@@ -18414,6 +18472,16 @@
 +	struct nouveau_framebuffer *fb = to_nouveau_framebuffer(drm_fb);
 +	struct nouveau_gem_object *ngem = nouveau_gem_object(fb->gem);
 +	uint32_t offset = crtc->index * 0x400;
++	int ret;
++
++	ret = nouveau_gem_pin(fb->gem, NOUVEAU_GEM_DOMAIN_VRAM);
++	if (ret)
++		return ret;
++
++	if (old_fb) {
++		struct nouveau_framebuffer *fb = to_nouveau_framebuffer(old_fb);
++		nouveau_gem_unpin(fb->gem);
++	}
 +
 +	crtc->fb.offset = ngem->bo->offset - dev_priv->vm_vram_base;
 +
@@ -18634,15 +18702,15 @@
 +	drm_crtc_helper_add(&crtc->base, &nv50_crtc_helper_funcs);
 +	drm_mode_crtc_set_gamma_size(&crtc->base, 256);
 +
-+	nv50_cursor_create(crtc);
++	nv50_cursor_init(crtc);
 +	return 0;
 +}
 diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c
 new file mode 100644
-index 0000000..10736de
+index 0000000..61cf304
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_cursor.c
-@@ -0,0 +1,217 @@
+@@ -0,0 +1,146 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -18674,62 +18742,10 @@
 +#include "nouveau_reg.h"
 +#include "nouveau_drv.h"
 +#include "nouveau_crtc.h"
-+#include "nv50_cursor.h"
 +#include "nv50_display.h"
 +
-+static int nv50_cursor_enable(struct nouveau_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_nouveau_private *dev_priv = dev->dev_private;
-+	int idx = crtc->index;
-+
-+	DRM_DEBUG("\n");
-+
-+	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0x2000);
-+	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
-+		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_MASK, 0)) {
-+		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS == 0\n");
-+		DRM_ERROR("CURSOR_CTRL2 = 0x%08x\n",
-+			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
-+		return -EBUSY;
-+	}
-+
-+	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(crtc->index),
-+		NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON);
-+	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
-+		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE,
-+		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE)) {
-+		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS_ACTIVE(%d)\n", idx);
-+		DRM_ERROR("CURSOR_CTRL2(%d) = 0x%08x\n", idx,
-+			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
-+		return -EBUSY;
-+	}
-+
-+	return 0;
-+}
-+
-+static int nv50_cursor_disable(struct nouveau_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_nouveau_private *dev_priv = dev->dev_private;
-+	int idx = crtc->index;
-+
-+	DRM_DEBUG("\n");
-+
-+	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
-+	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
-+		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_MASK, 0)) {
-+		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS == 0\n");
-+		DRM_ERROR("CURSOR_CTRL2 = 0x%08x\n",
-+			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
-+		return -EBUSY;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Calling update or changing the stored cursor state is left to the higher level ioctl's. */
-+static int nv50_cursor_show(struct nouveau_crtc *crtc, bool update)
++static void
++nv50_cursor_show(struct nouveau_crtc *crtc, bool update)
 +{
 +	struct drm_nouveau_private *dev_priv = crtc->base.dev->dev_private;
 +	struct drm_device *dev = crtc->base.dev;
@@ -18737,13 +18753,6 @@
 +
 +	DRM_DEBUG("\n");
 +
-+	/* Better not show the cursor when we have none. */
-+	/* TODO: is cursor offset actually set? */
-+	if (!crtc->cursor->gem) {
-+		DRM_ERROR("No cursor available on crtc %d\n", crtc->index);
-+		return -EINVAL;
-+	}
-+
 +	if (dev_priv->chipset != 0x50)
 +		OUT_MODE(NV84_CRTC0_CURSOR_DMA + offset,
 +			 NV84_CRTC0_CURSOR_DMA_LOCAL);
@@ -18751,13 +18760,12 @@
 +			 
 +	if (update) {
 +		OUT_MODE(NV50_UPDATE_DISPLAY, 0);
-+		crtc->cursor->visible = true;
++		crtc->cursor.visible = true;
 +	}
-+
-+	return 0;
 +}
 +
-+static int nv50_cursor_hide(struct nouveau_crtc *crtc, bool update)
++static void
++nv50_cursor_hide(struct nouveau_crtc *crtc, bool update)
 +{
 +	struct drm_nouveau_private *dev_priv = crtc->base.dev->dev_private;
 +	struct drm_device *dev = crtc->base.dev;
@@ -18772,151 +18780,89 @@
 +
 +	if (update) {
 +		OUT_MODE(NV50_UPDATE_DISPLAY, 0);
-+		crtc->cursor->visible = false;
++		crtc->cursor.visible = false;
 +	}
-+
-+	return 0;
 +}
 +
-+static int nv50_cursor_set_pos(struct nouveau_crtc *crtc, int x, int y)
++static void
++nv50_cursor_set_pos(struct nouveau_crtc *crtc, int x, int y)
 +{
 +	struct drm_nouveau_private *dev_priv = crtc->base.dev->dev_private;
 +
-+	nv_wr32(NV50_HW_CURSOR_POS(crtc->index), ((y & 0xFFFF) << 16) | (x & 0xFFFF));
++	nv_wr32(NV50_HW_CURSOR_POS(crtc->index),
++		((y & 0xFFFF) << 16) | (x & 0xFFFF));
 +	/* Needed to make the cursor move. */
 +	nv_wr32(NV50_HW_CURSOR_POS_CTRL(crtc->index), 0);
-+
-+	return 0;
 +}
 +
-+static int nv50_cursor_set_offset(struct nouveau_crtc *crtc)
++static void
++nv50_cursor_set_offset(struct nouveau_crtc *crtc, uint32_t offset)
 +{
 +	struct drm_device *dev = crtc->base.dev;
-+	struct drm_nouveau_private *dev_priv = dev->dev_private;
-+	struct nouveau_gem_object *ngem = nouveau_gem_object(crtc->cursor->gem);
 +
 +	DRM_DEBUG("\n");
 +
-+	if (ngem) {
-+		OUT_MODE(NV50_CRTC0_CURSOR_OFFSET + crtc->index * 0x400,
-+			 (ngem->bo->offset - dev_priv->vm_vram_base) >> 8);
-+	} else {
-+		OUT_MODE(NV50_CRTC0_CURSOR_OFFSET + crtc->index * 0x400, 0);
-+	}
-+
-+	return 0;
++	OUT_MODE(NV50_CRTC0_CURSOR_OFFSET + crtc->index * 0x0400, offset >> 8);
 +}
 +
-+static int
-+nv50_cursor_set_bo(struct nouveau_crtc *crtc, struct drm_gem_object *gem)
++int
++nv50_cursor_init(struct nouveau_crtc *crtc)
 +{
-+	struct nv50_cursor *cursor = crtc->cursor;
++	struct drm_device *dev = crtc->base.dev;
++	struct drm_nouveau_private *dev_priv = dev->dev_private;
++	int idx = crtc->index;
 +
-+	if (cursor->gem) {
-+		mutex_lock(&crtc->base.dev->struct_mutex);
-+		drm_gem_object_unreference(cursor->gem);
-+		mutex_unlock(&crtc->base.dev->struct_mutex);
++	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0x2000);
++	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
++		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_MASK, 0)) {
++		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS == 0\n");
++		DRM_ERROR("CURSOR_CTRL2 = 0x%08x\n",
++			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
++		return -EBUSY;
++	}
 +
-+		cursor->gem = NULL;
++	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(crtc->index),
++		NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_ON);
++	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
++		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE,
++		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_ACTIVE)) {
++		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS_ACTIVE(%d)\n", idx);
++		DRM_ERROR("CURSOR_CTRL2(%d) = 0x%08x\n", idx,
++			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
++		return -EBUSY;
 +	}
 +
-+	cursor->gem = gem;
++	crtc->cursor.set_offset = nv50_cursor_set_offset;
++	crtc->cursor.set_pos = nv50_cursor_set_pos;
++	crtc->cursor.hide = nv50_cursor_hide;
++	crtc->cursor.show = nv50_cursor_show;
 +	return 0;
 +}
 +
-+int nv50_cursor_create(struct nouveau_crtc *crtc)
++void
++nv50_cursor_fini(struct nouveau_crtc *crtc)
 +{
-+	DRM_DEBUG("\n");
-+
-+	if (!crtc || crtc->cursor)
-+		return -EINVAL;
-+
-+	crtc->cursor = kzalloc(sizeof(struct nv50_cursor), GFP_KERNEL);
-+	if (!crtc->cursor)
-+		return -ENOMEM;
-+
-+	nv50_cursor_enable(crtc);
-+
-+	/* function pointers */
-+	crtc->cursor->show = nv50_cursor_show;
-+	crtc->cursor->hide = nv50_cursor_hide;
-+	crtc->cursor->set_pos = nv50_cursor_set_pos;
-+	crtc->cursor->set_offset = nv50_cursor_set_offset;
-+	crtc->cursor->set_bo = nv50_cursor_set_bo;
-+	return 0;
-+}
++	struct drm_device *dev = crtc->base.dev;
++	struct drm_nouveau_private *dev_priv = dev->dev_private;
++	int idx = crtc->index;
 +
-+int nv50_cursor_destroy(struct nouveau_crtc *crtc)
-+{
 +	DRM_DEBUG("\n");
 +
-+	if (!crtc || !crtc->cursor)
-+		return -EINVAL;
-+
-+	nv50_cursor_disable(crtc);
-+
-+	kfree(crtc->cursor);
-+	crtc->cursor = NULL;
-+
-+	return 0;
++	nv_wr32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
++	if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
++		     NV50_PDISPLAY_CURSOR_CURSOR_CTRL2_STATUS_MASK, 0)) {
++		DRM_ERROR("timeout: CURSOR_CTRL2_STATUS == 0\n");
++		DRM_ERROR("CURSOR_CTRL2 = 0x%08x\n",
++			  nv_rd32(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx)));
++	}
 +}
-diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.h b/drivers/gpu/drm/nouveau/nv50_cursor.h
-new file mode 100644
-index 0000000..089a69c
---- /dev/null
-+++ b/drivers/gpu/drm/nouveau/nv50_cursor.h
-@@ -0,0 +1,45 @@
-+/*
-+ * Copyright (C) 2008 Maarten Maathuis.
-+ * All Rights Reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining
-+ * a copy of this software and associated documentation files (the
-+ * "Software"), to deal in the Software without restriction, including
-+ * without limitation the rights to use, copy, modify, merge, publish,
-+ * distribute, sublicense, and/or sell copies of the Software, and to
-+ * permit persons to whom the Software is furnished to do so, subject to
-+ * the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the
-+ * next paragraph) shall be included in all copies or substantial
-+ * portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
-+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
-+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
-+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-+ *
-+ */
-+
-+#ifndef __NV50_CURSOR_H__
-+#define __NV50_CURSOR_H__
 +
-+struct nv50_cursor {
-+	struct drm_gem_object *gem;
-+	int x, y;
-+	bool visible;
-+
-+	int (*show) (struct nouveau_crtc *crtc, bool update);
-+	int (*hide) (struct nouveau_crtc *crtc, bool update);
-+	int (*set_pos) (struct nouveau_crtc *crtc, int x, int y);
-+	int (*set_offset) (struct nouveau_crtc *crtc);
-+	int (*set_bo) (struct nouveau_crtc *crtc, struct drm_gem_object *gem);
-+};
-+
-+int nv50_cursor_create(struct nouveau_crtc *crtc);
-+int nv50_cursor_destroy(struct nouveau_crtc *crtc);
-+
-+#endif /* __NV50_CURSOR_H__ */
 diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
 new file mode 100644
-index 0000000..98c378f
+index 0000000..31c73d2
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_dac.c
-@@ -0,0 +1,280 @@
+@@ -0,0 +1,284 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -19040,6 +18986,11 @@
 +
 +	DRM_DEBUG("or %d\n", or);
 +
++	if (dev_priv->in_modeset) {
++		nv50_dac_disconnect(encoder);
++		return;
++	}
++
 +	/* wait for it to be done */
 +	if (!nv_wait(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or),
 +		     NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING, 0)) {
@@ -19130,15 +19081,14 @@
 +		mode_ctl |= 0x100;
 +	}
 +
-+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
++	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 +		mode_ctl2 |= NV50_DAC_MODE_CTRL2_NHSYNC;
 +
-+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
++	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 +		mode_ctl2 |= NV50_DAC_MODE_CTRL2_NVSYNC;
 +
 +	OUT_MODE(NV50_DAC0_MODE_CTRL + offset, mode_ctl);
 +	OUT_MODE(NV50_DAC0_MODE_CTRL2 + offset, mode_ctl2);
-+	OUT_MODE(NV50_UPDATE_DISPLAY, 0);
 +}
 +
 +static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
@@ -42660,10 +42610,10 @@
 +}
 diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
 new file mode 100644
-index 0000000..a147fb6
+index 0000000..ff3dd42
 --- /dev/null
 +++ b/drivers/gpu/drm/nouveau/nv50_sor.c
-@@ -0,0 +1,274 @@
+@@ -0,0 +1,273 @@
 +/*
 + * Copyright (C) 2008 Maarten Maathuis.
 + * All Rights Reserved.
@@ -42746,6 +42696,11 @@
 +
 +	DRM_DEBUG("or %d\n", encoder->or);
 +
++	if (dev_priv->in_modeset) {
++		nv50_sor_disconnect(encoder);
++		return;
++	}
++
 +	/* wait for it to be done */
 +	if (!nv_wait(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or),
 +		     NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_PENDING, 0)) {
@@ -42813,15 +42768,10 @@
 +
 +static void nv50_sor_prepare(struct drm_encoder *drm_encoder)
 +{
-+	struct nouveau_encoder *encoder = to_nouveau_encoder(drm_encoder);
-+
-+	nv50_sor_dpms(drm_encoder, DRM_MODE_DPMS_OFF);
-+	nv50_sor_disconnect(encoder);
 +}
 +
 +static void nv50_sor_commit(struct drm_encoder *drm_encoder)
 +{
-+	nv50_sor_dpms(drm_encoder, DRM_MODE_DPMS_ON);
 +}
 +
 +static void nv50_sor_mode_set(struct drm_encoder *drm_encoder,
@@ -42840,7 +42790,7 @@
 +		mode_ctl |= NV50_SOR_MODE_CTRL_LVDS;
 +	} else {
 +		mode_ctl |= NV50_SOR_MODE_CTRL_TMDS;
-+		if (mode->clock > 165000)
++		if (adjusted_mode->clock > 165000)
 +			mode_ctl |= NV50_SOR_MODE_CTRL_TMDS_DUAL_LINK;
 +	}
 +
@@ -42849,14 +42799,13 @@
 +	else
 +		mode_ctl |= NV50_SOR_MODE_CTRL_CRTC0;
 +
-+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
++	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 +		mode_ctl |= NV50_SOR_MODE_CTRL_NHSYNC;
 +
-+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
++	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 +		mode_ctl |= NV50_SOR_MODE_CTRL_NVSYNC;
 +
 +	OUT_MODE(NV50_SOR0_MODE_CTRL + offset, mode_ctl);
-+	OUT_MODE(NV50_UPDATE_DISPLAY, 0);
 +}
 +
 +static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {


Index: kernel.spec
===================================================================
RCS file: /cvs/pkgs/rpms/kernel/devel/kernel.spec,v
retrieving revision 1.1444
retrieving revision 1.1445
diff -u -r1.1444 -r1.1445
--- kernel.spec	19 Mar 2009 05:20:04 -0000	1.1444
+++ kernel.spec	19 Mar 2009 06:06:10 -0000	1.1445
@@ -1810,6 +1810,9 @@
 # and build.
 
 %changelog
+* Thu Mar 19 2009 Ben Skeggs <bskeggs at redhat.com>
+- drm-nouveau.patch: kms fixes and cleanups
+
 * Thu Mar 19 2009 Chuck Ebbert <cebbert at redhat.com>
 - 2.6.29-rc8-git4
 - Dropped patches, merged upstream:

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