rpms/mesa/devel mesa.spec, 1.233, 1.234 radeon-rewrite.patch, 1.12, 1.13

Dave Airlie airlied at fedoraproject.org
Tue Mar 24 05:22:49 UTC 2009 

Author: airlied

Update of /cvs/pkgs/rpms/mesa/devel
In directory cvs1.fedora.phx.redhat.com:/tmp/cvs-serv15212

Modified Files:
	mesa.spec radeon-rewrite.patch 
Log Message:
* Tue Mar 24 2009 Dave Airlie <airlied at redhat.com> 7.5-0.3
- radeon-rewrite: add FBO support for radeon on KMS/DRI2



Index: mesa.spec
===================================================================
RCS file: /cvs/pkgs/rpms/mesa/devel/mesa.spec,v
retrieving revision 1.233
retrieving revision 1.234
diff -u -r1.233 -r1.234
--- mesa.spec	23 Mar 2009 13:01:12 -0000	1.233
+++ mesa.spec	24 Mar 2009 05:22:18 -0000	1.234
@@ -20,7 +20,7 @@
 Summary: Mesa graphics libraries
 Name: mesa
 Version: 7.5
-Release: 0.2%{?dist}
+Release: 0.3%{?dist}
 License: MIT
 Group: System Environment/Libraries
 URL: http://www.mesa3d.org
@@ -429,6 +429,9 @@
 %{_libdir}/mesa-demos-data
 
 %changelog
+* Tue Mar 24 2009 Dave Airlie <airlied at redhat.com> 7.5-0.3
+- radeon-rewrite: add FBO support for radeon on KMS/DRI2
+
 * Mon Mar 23 2009 Karsten Hopp <karsten at redhat.com> 7.5-0.2
 - fix filelist on s390x where dri isn't available and
   where libGL.so has a different version

radeon-rewrite.patch:

View full diff with command:
/usr/bin/cvs -f diff  -kk -u -N -r 1.12 -r 1.13 radeon-rewrite.patch
Index: radeon-rewrite.patch
===================================================================
RCS file: /cvs/pkgs/rpms/mesa/devel/radeon-rewrite.patch,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -r1.12 -r1.13
--- radeon-rewrite.patch	22 Mar 2009 02:39:21 -0000	1.12
+++ radeon-rewrite.patch	24 Mar 2009 05:22:18 -0000	1.13
@@ -735,7 +735,7 @@
 -   cmd[0].wait.flags = flags;
 -}
 diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
-index c067515..10a6362 100644
+index c067515..d3898d0 100644
 --- a/src/mesa/drivers/dri/r200/r200_context.c
 +++ b/src/mesa/drivers/dri/r200/r200_context.c
 @@ -54,7 +54,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
@@ -755,7 +755,15 @@
  #define need_GL_ARB_vertex_program
  #define need_GL_ATI_fragment_shader
  #define need_GL_EXT_blend_minmax
-@@ -78,9 +79,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+@@ -71,6 +72,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ #define need_GL_EXT_blend_func_separate
+ #define need_GL_NV_vertex_program
+ #define need_GL_ARB_point_parameters
++#define need_GL_EXT_framebuffer_object
+ #include "extension_helper.h"
+ 
+ #define DRIVER_DATE	"20060602"
+@@ -78,9 +80,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  #include "vblank.h"
  #include "utils.h"
  #include "xmlpool.h" /* for symbolic values of enum-type options */
@@ -765,7 +773,7 @@
  
  /* Return various strings for glGetString().
   */
-@@ -89,8 +87,8 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
+@@ -89,8 +88,8 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
     r200ContextPtr rmesa = R200_CONTEXT(ctx);
     static char buffer[128];
     unsigned   offset;
@@ -776,7 +784,7 @@
  
     switch ( name ) {
     case GL_VENDOR:
-@@ -101,7 +99,7 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
+@@ -101,7 +100,7 @@ static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
  				     agp_mode );
  
        sprintf( & buffer[ offset ], " %sTCL",
@@ -785,7 +793,27 @@
  	       ? "" : "NO-" );
  
        return (GLubyte *)buffer;
-@@ -234,6 +232,40 @@ static const struct dri_debug_control debug_control[] =
+@@ -126,6 +125,7 @@ const struct dri_extension card_extensions[] =
+     { "GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions },
+     { "GL_EXT_blend_subtract",             NULL },
+     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
++    { "GL_EXT_packed_depth_stencil",	   NULL},
+     { "GL_EXT_secondary_color",            GL_EXT_secondary_color_functions },
+     { "GL_EXT_stencil_wrap",               NULL },
+     { "GL_EXT_texture_edge_clamp",         NULL },
+@@ -167,6 +167,11 @@ const struct dri_extension point_extensions[] = {
+     { NULL,                                NULL }
+ };
+ 
++const struct dri_extension mm_extensions[] = {
++  { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
++  { NULL, NULL }
++};
++
+ extern const struct tnl_pipeline_stage _r200_render_stage;
+ extern const struct tnl_pipeline_stage _r200_tcl_stage;
+ 
+@@ -234,6 +239,40 @@ static const struct dri_debug_control debug_control[] =
      { NULL,    0 }
  };
  
@@ -826,7 +854,7 @@
  
  /* Create the device specific rendering context.
   */
-@@ -245,9 +277,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -245,9 +284,9 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
     radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
     struct dd_function_table functions;
     r200ContextPtr rmesa;
@@ -838,7 +866,7 @@
  
     assert(glVisual);
     assert(driContextPriv);
-@@ -257,7 +289,8 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -257,7 +296,8 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
     rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
     if ( !rmesa )
        return GL_FALSE;
@@ -848,7 +876,7 @@
     /* init exp fog table data */
     r200InitStaticFogData();
  
-@@ -265,12 +298,12 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -265,12 +305,12 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
      * Do this here so that initialMaxAnisotropy is set before we create
      * the default textures.
      */
@@ -865,7 +893,7 @@
        if ( sPriv->drm_version.minor < 13 )
  	 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
  			  "disabling.\n", sPriv->drm_version.minor );
-@@ -291,59 +324,21 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -291,59 +331,15 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
     r200InitTextureFuncs(&functions);
     r200InitShaderFuncs(&functions); 
  
@@ -879,7 +907,12 @@
 -   if (!rmesa->glCtx) {
 -      FREE(rmesa);
 -      return GL_FALSE;
--   }
++   if (!radeonInitContext(&rmesa->radeon, &functions,
++			  glVisual, driContextPriv,
++			  sharedContextPrivate)) {
++     FREE(rmesa);
++     return GL_FALSE;
+    }
 -   driContextPriv->driverPrivate = rmesa;
 -
 -   /* Init r200 context data */
@@ -913,21 +946,12 @@
 -	    & rmesa->swapped,
 -	    sizeof( r200TexObj ),
 -	    (destroy_texture_object_t *) r200DestroyTexObj );
-+   if (!radeonInitContext(&rmesa->radeon, &functions,
-+			  glVisual, driContextPriv,
-+			  sharedContextPrivate)) {
-+     FREE(rmesa);
-+     return GL_FALSE;
-    }
+-   }
 -   rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
-+
-+   rmesa->radeon.texture_depth = driQueryOptioni (&rmesa->radeon.optionCache,
- 					   "texture_depth");
+-					   "texture_depth");
 -   if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
 -      rmesa->texture_depth = ( screen->cpp == 4 ) ?
-+   if (rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
-+      rmesa->radeon.texture_depth = ( screen->cpp == 4 ) ?
- 	 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
+-	 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
  
 -   rmesa->swtcl.RenderIndex = ~0;
 -   rmesa->hw.all_dirty = 1;
@@ -936,7 +960,7 @@
  
     /* Set the maximum texture size small enough that we can guarentee that
      * all texture units can bind a maximal texture and have all of them in
-@@ -351,29 +346,13 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -351,29 +347,13 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
      * setting allow larger textures.
      */
  
@@ -969,7 +993,7 @@
  
     ctx->Const.MaxTextureMaxAnisotropy = 16.0;
  
-@@ -383,7 +362,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -383,7 +363,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
     ctx->Const.MinPointSizeAA = 1.0;
     ctx->Const.MaxPointSizeAA = 1.0;
     ctx->Const.PointSizeGranularity = 0.0625;
@@ -978,11 +1002,14 @@
        ctx->Const.MaxPointSize = 2047.0;
     else
        ctx->Const.MaxPointSize = 1.0;
-@@ -439,32 +418,32 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -439,32 +419,35 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
     _math_matrix_set_identity( &rmesa->tmpmat );
  
     driInitExtensions( ctx, card_extensions, GL_TRUE );
 -   if (!(rmesa->r200Screen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
++
++   if (rmesa->radeon.radeonScreen->kernel_mm)
++     driInitExtensions(ctx, mm_extensions, GL_FALSE);
 +   if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
       /* yuv textures don't work with some chips - R200 / rv280 okay so far
  	others get the bit ordering right but don't actually do YUV-RGB conversion */
@@ -1020,10 +1047,11 @@
        driInitExtensions( ctx, point_extensions, GL_FALSE );
  #if 0
     r200InitDriverFuncs( ctx );
-@@ -474,33 +453,15 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
+@@ -474,33 +457,16 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
  #endif
     /* plug in a few more device driver functions */
     /* XXX these should really go right after _mesa_init_driver_functions() */
++   radeon_fbo_init(&rmesa->radeon);
[...6151 lines suppressed...]
  
  
-@@ -2306,7 +2082,7 @@ static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
+@@ -2306,7 +2103,7 @@ static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
     _vbo_InvalidateState( ctx, new_state );
     _tnl_InvalidateState( ctx, new_state );
     _ae_invalidate_state( ctx, new_state );
@@ -31155,7 +31969,7 @@
  }
  
  
-@@ -2330,15 +2106,15 @@ static GLboolean check_material( GLcontext *ctx )
+@@ -2330,15 +2127,15 @@ static GLboolean check_material( GLcontext *ctx )
  
  static void radeonWrapRunPipeline( GLcontext *ctx )
  {
@@ -31214,7 +32028,7 @@
  
  
 diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
-index 57dc380..8b6caf1 100644
+index 57dc380..3d0cd8d 100644
 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
 +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
 @@ -38,39 +38,156 @@
@@ -31406,7 +32220,7 @@
  }
  
  
-@@ -146,81 +263,379 @@ CHECK( txr0, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT))
+@@ -146,81 +263,373 @@ CHECK( txr0, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT))
  CHECK( txr1, (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_RECT_BIT))
  CHECK( txr2, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_RECT_BIT))
  
@@ -31760,7 +32574,6 @@
 -      depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z;
 -      rmesa->state.stencil.clear = 0x00000000;
 +      rmesa->radeon.state.depth.clear = 0x0000ffff;
-+      rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffff;
 +      rmesa->radeon.state.stencil.clear = 0x00000000;
        break;
     case 24:
@@ -31769,7 +32582,6 @@
 -      depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z;
 -      rmesa->state.stencil.clear = 0xffff0000;
 +      rmesa->radeon.state.depth.clear = 0x00ffffff;
-+      rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffffff;
 +      rmesa->radeon.state.stencil.clear = 0xffff0000;
        break;
     default:
@@ -31779,11 +32591,10 @@
 +      break;
     }
  
-    /* Only have hw stencil when depth buffer is 24 bits deep */
+-   /* Only have hw stencil when depth buffer is 24 bits deep */
 -   rmesa->state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 &&
-+   rmesa->radeon.state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 &&
- 				     ctx->Visual.depthBits == 24 );
- 
+-				     ctx->Visual.depthBits == 24 );
+-
 -   rmesa->Fallback = 0;
 +   rmesa->radeon.Fallback = 0;
  
@@ -31832,7 +32643,7 @@
     ALLOC_STATE( lin, always, LIN_STATE_SIZE, "LIN/line", 0 );
     ALLOC_STATE( msk, always, MSK_STATE_SIZE, "MSK/mask", 0 );
     ALLOC_STATE( vpt, always, VPT_STATE_SIZE, "VPT/viewport", 0 );
-@@ -233,20 +648,29 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -233,20 +642,29 @@ void radeonInitState( radeonContextPtr rmesa )
     ALLOC_STATE( fog, fog, FOG_STATE_SIZE, "FOG/fog", 1 );
     ALLOC_STATE( glt, tcl_lighting, GLT_STATE_SIZE, "GLT/light-global", 1 );
     ALLOC_STATE( eye, tcl_lighting, EYE_STATE_SIZE, "EYE/eye-vector", 1 );
@@ -31872,7 +32683,7 @@
     }
     ALLOC_STATE( mat[0], tcl, MAT_STATE_SIZE, "MAT/modelproject", 1 );
     ALLOC_STATE( mat[1], tcl_eyespace_or_fog, MAT_STATE_SIZE, "MAT/modelview", 1 );
-@@ -268,43 +692,43 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -268,43 +686,43 @@ void radeonInitState( radeonContextPtr rmesa )
     ALLOC_STATE( lit[5], tcl_lit5, LIT_STATE_SIZE, "LIT/light-5", 1 );
     ALLOC_STATE( lit[6], tcl_lit6, LIT_STATE_SIZE, "LIT/light-6", 1 );
     ALLOC_STATE( lit[7], tcl_lit7, LIT_STATE_SIZE, "LIT/light-7", 1 );
@@ -31947,7 +32758,7 @@
     rmesa->hw.grd.cmd[GRD_CMD_0] = 
        cmdscl( RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR, 1, 4 );
     rmesa->hw.fog.cmd[FOG_CMD_0] = 
-@@ -331,6 +755,22 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -331,6 +749,22 @@ void radeonInitState( radeonContextPtr rmesa )
  	 cmdvec( RADEON_VS_UCP_ADDR + i, 1, 4 );
     }
  
@@ -31970,7 +32781,7 @@
     rmesa->last_ReallyEnabled = -1;
  
     /* Initial Harware state:
-@@ -352,19 +792,7 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -352,19 +786,7 @@ void radeonInitState( radeonContextPtr rmesa )
  					    RADEON_SRC_BLEND_GL_ONE |
  					    RADEON_DST_BLEND_GL_ZERO );
  
@@ -31991,7 +32802,7 @@
  					       RADEON_STENCIL_TEST_ALWAYS |
  					       RADEON_STENCIL_FAIL_KEEP |
  					       RADEON_STENCIL_ZPASS_KEEP |
-@@ -374,7 +802,7 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -374,7 +796,7 @@ void radeonInitState( radeonContextPtr rmesa )
     if (rmesa->using_hyperz) {
         rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_COMPRESSION_ENABLE |
  						   RADEON_Z_DECOMPRESSION_ENABLE;
@@ -32000,7 +32811,7 @@
  	 /* works for q3, but slight rendering errors with glxgears ? */
  /*	 rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/
  	 /* need this otherwise get lots of lockups with q3 ??? */
-@@ -386,10 +814,9 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -386,10 +808,9 @@ void radeonInitState( radeonContextPtr rmesa )
  				     RADEON_ANTI_ALIAS_NONE);
  
     rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = (RADEON_PLANE_MASK_ENABLE |
@@ -32012,7 +32823,7 @@
     case DRI_CONF_DITHER_XERRORDIFFRESET:
        rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_INIT;
        break;
-@@ -397,30 +824,17 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -397,30 +818,17 @@ void radeonInitState( radeonContextPtr rmesa )
        rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_SCALE_DITHER_ENABLE;
        break;
     }
@@ -32048,7 +32859,7 @@
  
     rmesa->hw.set.cmd[SET_SE_CNTL] = (RADEON_FFACE_CULL_CCW |
  				     RADEON_BFACE_SOLID |
-@@ -444,7 +858,7 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -444,7 +852,7 @@ void radeonInitState( radeonContextPtr rmesa )
    					    RADEON_VC_NO_SWAP;
  #endif
  
@@ -32057,7 +32868,7 @@
       rmesa->hw.set.cmd[SET_SE_CNTL_STATUS] |= RADEON_TCL_BYPASS;
     }
  
-@@ -491,8 +905,8 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -491,8 +899,8 @@ void radeonInitState( radeonContextPtr rmesa )
  	   (2 << RADEON_TXFORMAT_HEIGHT_SHIFT));
  
        /* Initialize the texture offset to the start of the card texture heap */
@@ -32068,7 +32879,7 @@
  
        rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
        rmesa->hw.tex[i].cmd[TEX_PP_TXCBLEND] =  
-@@ -513,15 +927,15 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -513,15 +921,15 @@ void radeonInitState( radeonContextPtr rmesa )
  
        rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
        rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_0] =
@@ -32089,7 +32900,7 @@
     }
  
     /* Can only add ST1 at the time of doing some multitex but can keep
-@@ -613,5 +1027,7 @@ void radeonInitState( radeonContextPtr rmesa )
+@@ -613,5 +1021,7 @@ void radeonInitState( radeonContextPtr rmesa )
     rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE;
     rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE;
     
@@ -33397,7 +34208,7 @@
     driInitTextureFormats();
  }
 diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.h b/src/mesa/drivers/dri/radeon/radeon_tex.h
-index 8000880..8d8afb4 100644
+index 8000880..a4aaddc 100644
 --- a/src/mesa/drivers/dri/radeon/radeon_tex.h
 +++ b/src/mesa/drivers/dri/radeon/radeon_tex.h
 @@ -41,12 +41,16 @@ extern void radeonSetTexOffset(__DRIcontext *pDRICtx, GLint texname,
@@ -34811,10 +35622,10 @@
  }
 diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
 new file mode 100644
-index 0000000..63680b4
+index 0000000..d212898
 --- /dev/null
 +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
-@@ -0,0 +1,966 @@
+@@ -0,0 +1,969 @@
 +/*
 + * Copyright (C) 2008 Nicolai Haehnle.
 + * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
@@ -34956,9 +35767,12 @@
 +	radeonTexObj* t = radeon_tex_obj(texObj);
 +	int face, level;
 +
++	if (!radeon_validate_texture_miptree(ctx, texObj))
++	  return;
++
 +	/* for r100 3D sw fallbacks don't have mt */
 +	if (!t->mt)
-+	  return;
++	    return;
 +
 +	radeon_bo_map(t->mt->bo, GL_FALSE);
 +	for(face = 0; face < t->mt->faces; ++face) {

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