How to put shell script to Makefile

[gb spam]

> KNL_VER     := $(shell uname -r)
> KNL_MAJOR   := $(shell echo $(KNL_VER) | cut -c -3)
>
> all:
>         $(SHELL) if [2.4 == $(KNL_MAJOR)]; then \
>                 $(MAKE) -C AppDir -f makefile \
>         else \
>                 $(MAKE) -C AppDir -f Makefile \
>         fi
>  But it doesn't work, I don't know how to do it.

what you need to know, is that each line is a shell command.  the
reason for the continuaiton character is because an "if" on its own is
a syntax error, so your 5 line if is run as a "single" command.  This
also means that you need a ";" at the end of each command within  the
if/else.

hence, you don't need $(SHELL) prior to the if.

also, you need spaces after the "[" and before the "]".

you'll need to adjust the spaces to tabs as appropriate, but the
following should work:

KNL_VER:= $(shell uname -r)
KNL_MAJOR:= $(shell echo $(KNL_VER) | cut -c -3)

all:
	if [ 2.4 == $(KNL_MAJOR) ]; then \
		$(MAKE) -C AppDir -f makefile; \
	else \
		$(MAKE) -C AppDir -f Makefile; \
	fi


> I found some project use something like this in makefile
>
> all:
>         - at if [ ! -f .config ]; then \
>                 cp a.file b.file \
>         fi

the '@' just means don't echo the command that is about to be run