Please clearify

[Mikkel L. Ellertson]

Chris wrote:
> 
> 
> Actually - isn't an Ultra Sparc a Risc processor
> (http://en.wikipedia.org/wiki/SPARC)?
> 
> Additionally, isn't a PowerPC also a Risc?
> (http://en.wikipedia.org/wiki/PowerPC)
> 
You may want to read about what a RISC process is:

The reduced instruction set computer, or RISC, is a CPU design
philosophy that favors a reduced instruction set as well as a
simpler set of instructions. The most common RISC microprocessors
are Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PIC, Power Architecture,
and SPARC. ( http://en.wikipedia.org/wiki/RISC )

Mikkel
-- 

  Do not meddle in the affairs of dragons,
for thou art crunchy and taste good with Ketchup!

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 189 bytes
Desc: OpenPGP digital signature
URL: <http://listman.redhat.com/archives/fedora-list/attachments/20070704/991b627d/attachment-0001.sig>