Difference between IDE and SCSI ??
hlhowell at pacbell.net
Mon Feb 4 17:50:48 UTC 2008
On Mon, 2008-02-04 at 22:49 +1030, Tim wrote:
> >> speed in the, then, current serial circuitry. If you could get faster,
> >> and accurate electronics, which you *now* can, serial can manage faster
> >> rates, easier and more reliably.
> Alan Cox:
> > No.
> I don't think you read what I wrote.
> > The reason is quite different. When you have a parallel cable all the
> > wires are never quite the same length, diameter or metal properties
> > (ditto tracks on a board). That means that the signals arrive at the ends
> > of each wire at different times. Your clock rate is thus limited by the
> > cable quality and length as well as these propogation delays. That is
> > what limits PATA to UDMA/133. Any faster and the bits just won't turn up
> > on time.
> I know that. But *IN* *THE* *PAST* serial devices were generally the
> slower device, because the top speed that those devices could manage, at
> that time was slower than the speeds of parallel devices. At that time,
> the parallel technology was faster than the serial technology. Yes,
> parallel still had those limits, but was still operating faster than the
> current serial technology. I'd certainly never come across personal
> computers where the serial ports could move data faster than a parallel
> If that weren't the case, we would have had other technologies than
> parallel drive ports., etc., a lot earlier on.
Well, the technology always had the capability of faster serial
transmission, but the issue was the requirements for circuitry to
receive and decode it, and with the technology available at the time,
wire was cheaper and smaller than the associated technology. Today it
is not, so you see USB2.0 and firewire and other external serial
streams, but internally the serial paths are phenomenal in speed, and
fidelity, and have been for years. Some microprocessors have been
taking advantage of it for some time, where the paths are extremely
controlled and the circuitry can have the computation implemented in
hardware at a microscopic level.
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