[Bug 229657] Review Request: iverilog - Icarus Verilg is a verilog compiler, simulator.

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Summary: Review Request: iverilog - Icarus Verilg is a verilog compiler, simulator.


https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=229657





------- Additional Comments From wolfy at nobugconsulting.ro  2007-02-26 14:30 EST -------
pong :)
Look for the review a bit later. 
WRT your questions:
1. I see no reason to bring pcnet into discussion. I am in no way related to them.
2. visually == visual inspection of the new spec.
3. In a review I try to take into account all the aspects you have mentioned. By
accident (or not) I happen to work in a hardware company so I can also do more
tests then just "this program does not segfault at start". Yes, emphasize is on
how it is packed but a non-functional program would not be useful, no matter how
well packaged it is.
4.As of testing, I just want to see it compiling a Verilog program created by
one of my colleagues. Nothing fancy. During the review I have absolutely no
intention to compare its performances with commercial programs with the same
functionality.
5. I happen to know quite well the program, I've watched it (together with gEDA)
with very great interest over the years, exactly because I would like to have
our current tools (which require licenses which go monthly for amounts expressed
with 5 digits) replaced.

Since you intend to extend a bit the package (I suggest creating a separate
package for test cases, BTW) maybe you could include the FAQ -
http://www.icarus.com/eda/verilog/FAQ.html in the main package)

And last but not least, since you need a sponsor, I MAY NOT approve your
package, no matter how well packed it is.

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