[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL
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Sun Jan 4 18:07:40 UTC 2009
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https://bugzilla.redhat.com/show_bug.cgi?id=468516
--- Comment #24 from Chitlesh GOORAH <cgoorah at yahoo.com.au> 2009-01-04 13:07:39 EDT ---
Use perl-SystemPerl as from now on:
Bug 478759 - Review Request: perl-SystemPerl - SystemPerl Perl module
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