[Bug 474980] Review Request: ovm - Open Verification Methodology : IEEE 1800 SystemVerilog standard
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Sat Jan 24 02:08:58 UTC 2009
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--- Comment #15 from Chitlesh GOORAH <cgoorah at yahoo.com.au> 2009-01-23 21:08:57 EDT ---
Maybe from mailing posts with respect to OVM :
http://sourceforge.net/mailarchive/forum.php?forum_name=iverilog-devel
will clarify any of your doubts.
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