[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

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https://bugzilla.redhat.com/show_bug.cgi?id=468516





--- Comment #40 from Chitlesh GOORAH <chitlesh at gmail.com>  2009-07-10 23:21:18 EDT ---
hehe to you Lane. No the process isn't over yet. You have to put verilator on
fedora cvs, then build it on koji(fedora's build system) then finally push to
mirrors.

Currently you are here at "Add_Package_to_CVS_and_Set_Owner"

https://fedoraproject.org/wiki/PackageMaintainers/Join#Add_Package_to_CVS_and_Set_Owner

Can you please add me as one of the owners please ?

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