[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL
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Thu Jun 4 08:31:58 UTC 2009
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https://bugzilla.redhat.com/show_bug.cgi?id=468516
--- Comment #30 from Chitlesh GOORAH <chitlesh at gmail.com> 2009-06-04 04:31:52 EDT ---
ping Lane ?
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