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[libvirt] [PATCH V2 0/2] cpu: Handle only high order 16 bits of PVR for IBM Power processors



IBM Power processors encode PVR as CPU family in high order 16 bits and a CPU
version in lower 16 bits. Since there is no significant  change in behavior
between versions, there is no point adding every single CPU version in
cpu_map.xml.  Qemu for ppc64 already have the necessary changes.

V2:
- Incorporate Martin comments from V1
- Rewrite the cpu_map.xml for IBM Power processors


Pradipta Kr. Banerjee (2):
  Handle only high order 16 bits for PVR
  Update cputest test cases for the updated IBM Power processor models

 src/cpu/cpu_map.xml                                | 22 ++++++++--------------
 src/cpu/cpu_powerpc.c                              |  7 ++++++-
 tests/cputest.c                                    |  4 ++--
 tests/cputestdata/ppc64-baseline-1-result.xml      |  2 +-
 .../ppc64-baseline-incompatible-vendors.xml        |  4 ++--
 .../ppc64-baseline-no-vendor-result.xml            |  2 +-
 tests/cputestdata/ppc64-baseline-no-vendor.xml     |  2 +-
 tests/cputestdata/ppc64-exact.xml                  |  2 +-
 tests/cputestdata/ppc64-guest-nofallback.xml       |  2 +-
 tests/cputestdata/ppc64-guest.xml                  |  2 +-
 .../ppc64-host+guest,ppc_models-result.xml         |  2 +-
 ...st-nofallback,ppc_models,POWER7_v2.1-result.xml |  5 -----
 tests/cputestdata/ppc64-host.xml                   |  2 +-
 tests/cputestdata/ppc64-strict.xml                 |  2 +-
 .../qemuxml2argv-pseries-cpu-exact.args            |  4 ++--
 .../qemuxml2argv-pseries-cpu-exact.xml             |  2 +-
 16 files changed, 30 insertions(+), 36 deletions(-)
 delete mode 100644 tests/cputestdata/ppc64-host+guest-nofallback,ppc_models,POWER7_v2.1-result.xml

-- 
1.9.3


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