[libvirt] [PATCH 4/4] cpu: split x86 map data into separate files

John Ferlan jferlan at redhat.com
Mon Aug 13 22:27:29 UTC 2018



On 08/01/2018 01:02 PM, Daniel P. Berrangé wrote:
> Signed-off-by: Daniel P. Berrangé <berrange at redhat.com>
> ---
>  src/cpu/cpu_map.xml                          | 2374 +-----------------
>  src/cpu/cpu_map_x86_486.xml                  |    7 +
>  src/cpu/cpu_map_x86_Broadwell-IBRS.xml       |   61 +
>  src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml |   59 +
>  src/cpu/cpu_map_x86_Broadwell-noTSX.xml      |   58 +
>  src/cpu/cpu_map_x86_Broadwell.xml            |   60 +
>  src/cpu/cpu_map_x86_Conroe.xml               |   33 +
>  src/cpu/cpu_map_x86_EPYC-IBRS.xml            |   73 +
>  src/cpu/cpu_map_x86_EPYC.xml                 |   72 +
>  src/cpu/cpu_map_x86_Haswell-IBRS.xml         |   57 +
>  src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml   |   55 +
>  src/cpu/cpu_map_x86_Haswell-noTSX.xml        |   54 +
>  src/cpu/cpu_map_x86_Haswell.xml              |   56 +
>  src/cpu/cpu_map_x86_IvyBridge-IBRS.xml       |   51 +
>  src/cpu/cpu_map_x86_IvyBridge.xml            |   50 +
>  src/cpu/cpu_map_x86_Nehalem-IBRS.xml         |   38 +
>  src/cpu/cpu_map_x86_Nehalem.xml              |   37 +
>  src/cpu/cpu_map_x86_Opteron_G1.xml           |   31 +
>  src/cpu/cpu_map_x86_Opteron_G2.xml           |   35 +
>  src/cpu/cpu_map_x86_Opteron_G3.xml           |   40 +
>  src/cpu/cpu_map_x86_Opteron_G4.xml           |   50 +
>  src/cpu/cpu_map_x86_Opteron_G5.xml           |   53 +
>  src/cpu/cpu_map_x86_Penryn.xml               |   35 +
>  src/cpu/cpu_map_x86_SandyBridge-IBRS.xml     |   45 +
>  src/cpu/cpu_map_x86_SandyBridge.xml          |   44 +
>  src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml  |   70 +
>  src/cpu/cpu_map_x86_Skylake-Client.xml       |   69 +
>  src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml  |   77 +
>  src/cpu/cpu_map_x86_Skylake-Server.xml       |   76 +
>  src/cpu/cpu_map_x86_Westmere-IBRS.xml        |   39 +
>  src/cpu/cpu_map_x86_Westmere.xml             |   38 +
>  src/cpu/cpu_map_x86_athlon.xml               |   28 +
>  src/cpu/cpu_map_x86_core2duo.xml             |   33 +
>  src/cpu/cpu_map_x86_coreduo.xml              |   29 +
>  src/cpu/cpu_map_x86_cpu64-rhel5.xml          |   29 +
>  src/cpu/cpu_map_x86_cpu64-rhel6.xml          |   31 +
>  src/cpu/cpu_map_x86_features.xml             |  440 ++++
>  src/cpu/cpu_map_x86_kvm32.xml                |   26 +
>  src/cpu/cpu_map_x86_kvm64.xml                |   30 +
>  src/cpu/cpu_map_x86_n270.xml                 |   30 +
>  src/cpu/cpu_map_x86_pentium.xml              |   13 +
>  src/cpu/cpu_map_x86_pentium2.xml             |   22 +
>  src/cpu/cpu_map_x86_pentium3.xml             |   23 +
>  src/cpu/cpu_map_x86_pentiumpro.xml           |   21 +
>  src/cpu/cpu_map_x86_phenom.xml               |   36 +
>  src/cpu/cpu_map_x86_qemu32.xml               |   22 +
>  src/cpu/cpu_map_x86_qemu64.xml               |   40 +
>  src/cpu/cpu_map_x86_vendors.xml              |    4 +
>  48 files changed, 2427 insertions(+), 2327 deletions(-)
>  create mode 100644 src/cpu/cpu_map_x86_486.xml
>  create mode 100644 src/cpu/cpu_map_x86_Broadwell-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX.xml
>  create mode 100644 src/cpu/cpu_map_x86_Broadwell.xml
>  create mode 100644 src/cpu/cpu_map_x86_Conroe.xml
>  create mode 100644 src/cpu/cpu_map_x86_EPYC-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_EPYC.xml
>  create mode 100644 src/cpu/cpu_map_x86_Haswell-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX.xml
>  create mode 100644 src/cpu/cpu_map_x86_Haswell.xml
>  create mode 100644 src/cpu/cpu_map_x86_IvyBridge-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_IvyBridge.xml
>  create mode 100644 src/cpu/cpu_map_x86_Nehalem-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Nehalem.xml
>  create mode 100644 src/cpu/cpu_map_x86_Opteron_G1.xml
>  create mode 100644 src/cpu/cpu_map_x86_Opteron_G2.xml
>  create mode 100644 src/cpu/cpu_map_x86_Opteron_G3.xml
>  create mode 100644 src/cpu/cpu_map_x86_Opteron_G4.xml
>  create mode 100644 src/cpu/cpu_map_x86_Opteron_G5.xml
>  create mode 100644 src/cpu/cpu_map_x86_Penryn.xml
>  create mode 100644 src/cpu/cpu_map_x86_SandyBridge-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_SandyBridge.xml
>  create mode 100644 src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Skylake-Client.xml
>  create mode 100644 src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Skylake-Server.xml
>  create mode 100644 src/cpu/cpu_map_x86_Westmere-IBRS.xml
>  create mode 100644 src/cpu/cpu_map_x86_Westmere.xml
>  create mode 100644 src/cpu/cpu_map_x86_athlon.xml
>  create mode 100644 src/cpu/cpu_map_x86_core2duo.xml
>  create mode 100644 src/cpu/cpu_map_x86_coreduo.xml
>  create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel5.xml
>  create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel6.xml
>  create mode 100644 src/cpu/cpu_map_x86_features.xml
>  create mode 100644 src/cpu/cpu_map_x86_kvm32.xml
>  create mode 100644 src/cpu/cpu_map_x86_kvm64.xml
>  create mode 100644 src/cpu/cpu_map_x86_n270.xml
>  create mode 100644 src/cpu/cpu_map_x86_pentium.xml
>  create mode 100644 src/cpu/cpu_map_x86_pentium2.xml
>  create mode 100644 src/cpu/cpu_map_x86_pentium3.xml
>  create mode 100644 src/cpu/cpu_map_x86_pentiumpro.xml
>  create mode 100644 src/cpu/cpu_map_x86_phenom.xml
>  create mode 100644 src/cpu/cpu_map_x86_qemu32.xml
>  create mode 100644 src/cpu/cpu_map_x86_qemu64.xml
>  create mode 100644 src/cpu/cpu_map_x86_vendors.xml
> 

Reviewed-by: John Ferlan <jferlan at redhat.com>

John




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