[libvirt] [PATCH] cpu: add CLZERO CPUID support for AMD platforms

[Jiri Denemark]

On Tue, Dec 03, 2019 at 03:09:12 -0800, Ani Sinha wrote:
> Qemu commit e900135dcfb67 ("i386: Add CPUID bit for CLZERO and XSAVEERPTR")
> adds support for CLZERO CPUID bit.
> This commit extends support for this CPUID bit into libvirt.
> 
> Signed-off-by: Ani Sinha <ani.sinha at nutanix.com>
> ---
>  src/cpu_map/x86_EPYC-IBPB.xml | 1 +
>  src/cpu_map/x86_EPYC.xml      | 1 +
>  src/cpu_map/x86_features.xml  | 3 +++
>  3 files changed, 5 insertions(+)
> 
> diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml
> index 283697e..a70fbd8 100644
> --- a/src/cpu_map/x86_EPYC-IBPB.xml
> +++ b/src/cpu_map/x86_EPYC-IBPB.xml
> @@ -14,6 +14,7 @@
>      <feature name='bmi2'/>
>      <feature name='clflush'/>
>      <feature name='clflushopt'/>
> +    <feature name='clzero'/>
>      <feature name='cmov'/>
>      <feature name='cr8legacy'/>
>      <feature name='cx16'/>
> diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml
> index f060139..6c11d82 100644
> --- a/src/cpu_map/x86_EPYC.xml
> +++ b/src/cpu_map/x86_EPYC.xml
> @@ -14,6 +14,7 @@
>      <feature name='bmi2'/>
>      <feature name='clflush'/>
>      <feature name='clflushopt'/>
> +    <feature name='clzero'/>
>      <feature name='cmov'/>
>      <feature name='cr8legacy'/>
>      <feature name='cx16'/>

We don't normally change existing CPU models as it can cause issues with
migration between non-matching versions of libvirt. If QEMU enables a
new feature for a given model (which doesn't seem to be the case of
clzero and EPYC, however), you'd automatically get it just by asking for
EPYC in libvirt. Otherwise, you need to ask for clzero explicitly
(adding it to libvirt's EPYC would not cause the feature to be enabled
anyway). Or you can use host-model CPU in which case, clzero will be
automatically added as long as it is supported by QEMU.

> diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
> index 2bed1e0..dd62755 100644
> --- a/src/cpu_map/x86_features.xml
> +++ b/src/cpu_map/x86_features.xml
> @@ -473,6 +473,9 @@
>    <feature name='ibpb'>
>      <cpuid eax_in='0x80000008' ebx='0x00001000'/>
>    </feature>
> +  <feature name='clzero'>
> +    <cpuid eax_in='0x80000008' ebx='0x00000001'/>
> +  </feature>
>    <feature name='amd-ssbd'>
>      <cpuid eax_in='0x80000008' ebx='0x01000000'/>
>    </feature>

We want to keep the bits sorted by their position, I moved it up a bit,
just above wbnoinvd.

Also several cputest results have to be updated since our CPU data
describe some CPUs which already support clzero.

That said, I dropped the changes to EPYC* CPU models, moved the feature
definition in x86_features a bit, updated the test results, and pushed
this as commit 1d17f881a278c408ede19c7e6a5330e3f19fe0f0

Reviewed-by: Jiri Denemark <jdenemar at redhat.com>