[libvirt] [PATCH 2/4] cpu: Add new Dhyana CPU model

Yingle Hou houyingle at hygon.cn
Thu Nov 21 11:18:19 UTC 2019


Add Hygon Dhyana CPU model to the processor model.

Signed-off-by: Yingle Hou <houyingle at hygon.cn>
---
 src/cpu_map/Makefile.inc.am |  1 +
 src/cpu_map/index.xml       |  3 ++
 src/cpu_map/x86_Dhyana.xml  | 70 +++++++++++++++++++++++++++++++++++++++++++++
 src/cpu_map/x86_vendors.xml |  1 +
 4 files changed, 75 insertions(+)
 create mode 100644 src/cpu_map/x86_Dhyana.xml

diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
index 7eb86c8..e935178 100644
--- a/src/cpu_map/Makefile.inc.am
+++ b/src/cpu_map/Makefile.inc.am
@@ -25,6 +25,7 @@ cpumap_DATA = \
 	cpu_map/x86_coreduo.xml \
 	cpu_map/x86_cpu64-rhel5.xml \
 	cpu_map/x86_cpu64-rhel6.xml \
+	cpu_map/x86_Dhyana.xml \
 	cpu_map/x86_EPYC.xml \
 	cpu_map/x86_EPYC-IBPB.xml \
 	cpu_map/x86_Haswell.xml \
diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index ed45083..ffb2f6f 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -60,6 +60,9 @@
     <include filename="x86_Opteron_G5.xml"/>
     <include filename="x86_EPYC.xml"/>
     <include filename="x86_EPYC-IBPB.xml"/>
+
+    <!-- Hygon CPU models -->
+    <include filename="x86_Dhyana.xml"/>
   </arch>
 
   <arch name='ppc64'>
diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml
new file mode 100644
index 0000000..cbc8020
--- /dev/null
+++ b/src/cpu_map/x86_Dhyana.xml
@@ -0,0 +1,70 @@
+<cpus>
+  <model name='Dhyana'>
+    <signature family='24' model='0'/> <!-- 900f00 -->
+    <vendor name='Hygon'/>
+    <feature name='3dnowprefetch'/>
+    <feature name='abm'/>
+    <feature name='adx'/>
+    <feature name='apic'/>
+    <feature name='arat'/>
+    <feature name='avx'/>
+    <feature name='avx2'/>
+    <feature name='bmi1'/>
+    <feature name='bmi2'/>
+    <feature name='clflush'/>
+    <feature name='clflushopt'/>
+    <feature name='cmov'/>
+    <feature name='cr8legacy'/>
+    <feature name='cx16'/>
+    <feature name='cx8'/>
+    <feature name='de'/>
+    <feature name='f16c'/>
+    <feature name='fma'/>
+    <feature name='fpu'/>
+    <feature name='fsgsbase'/>
+    <feature name='fxsr'/>
+    <feature name='fxsr_opt'/>
+    <feature name='ibpb'/>
+    <feature name='lahf_lm'/>
+    <feature name='lm'/>
+    <feature name='mca'/>
+    <feature name='mce'/>
+    <feature name='misalignsse'/>
+    <feature name='mmx'/>
+    <feature name='mmxext'/>
+    <feature name='monitor'/>
+    <feature name='movbe'/>
+    <feature name='msr'/>
+    <feature name='mtrr'/>
+    <feature name='nx'/>
+    <feature name='osvw'/>
+    <feature name='pae'/>
+    <feature name='pat'/>
+    <feature name='pdpe1gb'/>
+    <feature name='pge'/>
+    <feature name='pni'/>
+    <feature name='popcnt'/>
+    <feature name='pse'/>
+    <feature name='pse36'/>
+    <feature name='rdrand'/>
+    <feature name='rdseed'/>
+    <feature name='rdtscp'/>
+    <feature name='sep'/>
+    <feature name='smap'/>
+    <feature name='smep'/>
+    <feature name='sse'/>
+    <feature name='sse2'/>
+    <feature name='sse4.1'/>
+    <feature name='sse4.2'/>
+    <feature name='sse4a'/>
+    <feature name='ssse3'/>
+    <feature name='svm'/>
+    <feature name='syscall'/>
+    <feature name='tsc'/>
+    <feature name='vme'/>
+    <feature name='xgetbv1'/>
+    <feature name='xsave'/>
+    <feature name='xsavec'/>
+    <feature name='xsaveopt'/>
+  </model>
+</cpus>
diff --git a/src/cpu_map/x86_vendors.xml b/src/cpu_map/x86_vendors.xml
index 418712a..840179d 100644
--- a/src/cpu_map/x86_vendors.xml
+++ b/src/cpu_map/x86_vendors.xml
@@ -1,4 +1,5 @@
 <cpus>
   <vendor name='Intel' string='GenuineIntel'/>
   <vendor name='AMD' string='AuthenticAMD'/>
+  <vendor name='Hygon' string='HygonGenuine'/>
 </cpus>
-- 
1.8.3.1





More information about the libvir-list mailing list