[PATCH v2 4/4] MAINTAINERS: Agree to maintain nanoMIPS TCG frontend
Philippe Mathieu-Daudé
f4bug at amsat.org
Wed Oct 27 04:14:16 UTC 2021
As of this commit, the nanoMIPS toolchains haven't been merged
in mainstream projects. However MediaTek provides a toolchain:
https://github.com/MediaTek-Labs/nanomips-gnu-toolchain/releases/tag/nanoMIPS-2021.02-01
QEMU deprecation policy schedules code for removal. If we don't
need / want to remove, we should un-deprecated [*].
Since I now have spent more time with the ISA, I agree to maintain
it along with the other MIPS ISA. Therefore remove its deprecation
notice.
For historical notes, see commit a60442eb8 ("Deprecate nanoMIPS ISA").
[*] https://lore.kernel.org/qemu-devel/YVx7YGqUENP83vNF@redhat.com/
Cc: Vince Del Vecchio <Vince.DelVecchio at mediatek.com>
Cc: Petar Jovanovic <petar.jovanovic at syrmia.com>
Reviewed-by: Jiaxun Yang <jiaxun.yang at flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug at amsat.org>
---
v2: un-deprecate (danpb)
---
docs/about/deprecated.rst | 23 -----------------------
MAINTAINERS | 6 +-----
2 files changed, 1 insertion(+), 28 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 0bed6ecb1da..5f4e4eeb2b0 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -246,13 +246,6 @@ System emulator CPUS
``Icelake-Client`` CPU Models are deprecated. Use ``Icelake-Server`` CPU
Models instead.
-MIPS ``I7200`` CPU Model (since 5.2)
-''''''''''''''''''''''''''''''''''''
-
-The ``I7200`` guest CPU relies on the nanoMIPS ISA, which is deprecated
-(the ISA has never been upstreamed to a compiler toolchain). Therefore
-this CPU is also deprecated.
-
QEMU API (QAPI) events
----------------------
@@ -342,13 +335,6 @@ The ``ppc64abi32`` architecture has a number of issues which regularly
trip up our CI testing and is suspected to be quite broken. For that
reason the maintainers strongly suspect no one actually uses it.
-MIPS ``I7200`` CPU (since 5.2)
-''''''''''''''''''''''''''''''
-
-The ``I7200`` guest CPU relies on the nanoMIPS ISA, which is deprecated
-(the ISA has never been upstreamed to a compiler toolchain). Therefore
-this CPU is also deprecated.
-
Related binaries
----------------
@@ -380,12 +366,3 @@ point to a version that doesn't break runnability guarantees
versions, aliases will point to newer CPU model versions
depending on the machine type, so management software must
resolve CPU model aliases before starting a virtual machine.
-
-Guest Emulator ISAs
--------------------
-
-nanoMIPS ISA
-''''''''''''
-
-The ``nanoMIPS`` ISA has never been upstreamed to any compiler toolchain.
-As it is hard to generate binaries for it, declare it deprecated.
diff --git a/MAINTAINERS b/MAINTAINERS
index efcfa57cd6a..71b198139c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -237,14 +237,10 @@ R: Aleksandar Rikalo <aleksandar.rikalo at syrmia.com>
S: Odd Fixes
F: target/mips/
F: disas/mips.c
+X: disas/nanomips.*
F: docs/system/cpu-models-mips.rst.inc
F: tests/tcg/mips/
-MIPS TCG CPUs (nanoMIPS ISA)
-S: Orphan
-F: disas/nanomips.*
-F: target/mips/tcg/*nanomips*
-
NiosII TCG CPUs
M: Chris Wulff <crwulff at gmail.com>
M: Marek Vasut <marex at denx.de>
--
2.31.1
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