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Re: First cut of PowerPC support in NPTL

On Sat, Mar 08, 2003 at 03:37:05AM -0800, Roland McGrath wrote:
> Looks pretty good!  I count five, maybe seven, macros in lowlevellock.h
> that are machine-dependent, and the rest of that file and all the rest of
> the locking code (except spinlocks) can move up to linux/ and be common to
> all the machines where compare_and_swap is as good as it gets.

If we can get compare_and_swap macro with the same semantics, yes.
E.g. the atomic_compare_and_exchange_acq from atomic.h is not ideal for
the loops, since it only returns whether the operation succeeded or not,
but doesn't return the value in memory. So say atomic increment then looks
	  oldval = *mem;
	while (atomic_compare_and_exchange_acq (mem, oldval + incr, oldval));
With the IA-64 compare_and_swap, this can be changed into:
	val = *mem;
	  oldval = val;
	while ((val = lll_compare_and_swap (mem, oldval, oldval + incr)) != oldval);
(note just one memory load before the loop in addition to CAS, not load in
every loop).

Maybe this could be just custom IA-64 atomic_increment macro
(and perhaps similarly on other arches) and the common linux/ code would use
atomic_increment. There is still atomic_decrement_if_positive used
in the code and that at least ATM doesn't have any such macro.

> td_ta_map_lwp2thr should not use ps_get_thread_area on machines using a
> normal register.  Just use the thread register value from ps_lgetregs with
> appropriate arithmetic directly.



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