[edk2-devel][edk2-platforms][PATCH V1 1/9] WhitleyOpenBoardPkg: Add definitions needed for AcpiPlatform driver
Oram, Isaac W
isaac.w.oram at intel.com
Thu Mar 10 22:41:06 UTC 2022
Adds various definitions needed to move the AcpiPlatform driver from
FvLateOpenBoard binary to open source.
Cc: Nate DeSimone <nathaniel.l.desimone at intel.com>
Cc: Chasel Chiu <chasel.chiu at intel.com>
Signed-off-by: Isaac Oram <isaac.w.oram at intel.com>
---
Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf | 1 +
Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf | 1 +
Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Madt.h | 118 +++++
Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Slit.h | 75 +++
Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Srat.h | 53 ++
Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/amlresrc.h | 542 ++++++++++++++++++++
Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc | 6 +-
Platform/Intel/WhitleyOpenBoardPkg/Include/Library/AcpiPlatformLib.h | 107 ++++
Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformStatusCodes.h | 364 +++++++++++++
Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaFpkConfigLib.h | 55 ++
Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSmbiosUpdateLib.h | 275 ++++++++++
Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf | 1 +
12 files changed, 1597 insertions(+), 1 deletion(-)
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
index faea9726f7..80a4288895 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciHostBridge.inf
@@ -34,6 +34,7 @@
WhitleySiliconPkg/CpRcPkg.dec
WhitleySiliconPkg/Cpu/CpuRcPkg.dec
WhitleyOpenBoardPkg/PlatformPkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf
index 4121ea8982..cf5148b135 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciPlatform/PciPlatform.inf
@@ -32,6 +32,7 @@
WhitleySiliconPkg/CpRcPkg.dec
WhitleySiliconPkg/Cpu/CpuRcPkg.dec
WhitleyOpenBoardPkg/PlatformPkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
UefiDriverEntryPoint
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Madt.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Madt.h
new file mode 100644
index 0000000000..1860e1104d
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Madt.h
@@ -0,0 +1,118 @@
+/** @file
+ This file describes the contents of the ACPI Multiple APIC Description
+ Table (MADT). Some additional ACPI values are defined in Acpi1_0.h and
+ Acpi2_0.h.
+ To make changes to the MADT, it is necessary to update the count for the
+ APIC structure being updated, and to modify table found in Madt.c.
+
+ @copyright
+ Copyright 1996 - 2014 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _MADT_H
+#define _MADT_H
+
+//
+// Statements that include other files
+//
+#include <IndustryStandard/Acpi.h>
+#include "Platform.h"
+
+//
+// MADT Definitions
+//
+#define EFI_ACPI_OEM_MADT_REVISION 0x00000000
+//
+// Multiple APIC Flags are defined in AcpiX.0.h
+//
+#define EFI_ACPI_6_2_MULTIPLE_APIC_FLAGS (EFI_ACPI_6_2_PCAT_COMPAT)
+
+//
+// Local APIC address
+//
+#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000
+//
+// Define the number of each table type.
+// This is where the table layout is modified.
+//
+#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT MAX_CPU_NUM
+#define EFI_ACPI_LOCAL_APIC_NMI_COUNT MAX_CPU_NUM
+#define EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT MAX_CPU_NUM
+#define EFI_ACPI_LOCAL_X2APIC_NMI_COUNT MAX_CPU_NUM
+#define EFI_ACPI_IO_APIC_COUNT 32 + 1 // IIO I/O APIC (PCH) + I/O APIC (PC00-PC31)
+#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2
+#define EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT 0
+#define EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT 0
+#define EFI_ACPI_IO_SAPIC_COUNT 0
+#define EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT 0
+#define EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT 0
+
+//
+// MADT structure
+//
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+//
+// ACPI 4.0 Table structure
+//
+typedef struct {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+
+#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 // Type 0x00
+ EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_IO_APIC_COUNT > 0 // Type 0x01
+ EFI_ACPI_6_2_IO_APIC_STRUCTURE IoApic[EFI_ACPI_IO_APIC_COUNT];
+#endif
+
+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 // Type 0x02
+ EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT > 0 // Type 0x03
+ EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE NmiSource[EFI_ACPI_NON_MASKABLE_INTERRUPT_SOURCE_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_NMI_COUNT > 0 // Type 0x04
+ EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE LocalApicNmi;
+#endif
+
+#if EFI_ACPI_LOCAL_APIC_ADDRESS_OVERRIDE_COUNT > 0 // Type 0x05
+ EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE LocalApicOverride[EFI_ACPI_LOCAL_APIC_OVERRIDE_COUNT];
+#endif
+
+#if EFI_ACPI_IO_SAPIC_COUNT > 0 // Type 0x06
+ EFI_ACPI_6_2_IO_SAPIC_STRUCTURE IoSapic[EFI_ACPI_IO_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT > 0 // Type 0x07 : This table changes in madt 2.0
+ EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE LocalSapic[EFI_ACPI_PROCESSOR_LOCAL_SAPIC_COUNT];
+#endif
+
+#if EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT > 0 // Type 0x08
+ EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE PlatformInterruptSources[
+ EFI_ACPI_PLATFORM_INTERRUPT_SOURCES_COUNT];
+#endif
+
+#if EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT > 0 //Type 0x09
+ EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE LocalX2Apic[EFI_ACPI_PROCESSOR_LOCAL_X2APIC_COUNT];
+#endif
+
+#if EFI_ACPI_LOCAL_X2APIC_NMI_COUNT > 0 //Type 0x0A
+ EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE X2ApicNmi;
+#endif
+
+
+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+
+
+
+#pragma pack()
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Slit.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Slit.h
new file mode 100644
index 0000000000..bda37bc3cf
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Slit.h
@@ -0,0 +1,75 @@
+/** @file
+ This file describes the contents of the ACPI System Locality Information
+ Table (SLIT). Some additional ACPI 3.0 values are defined in Acpi3_0.h.
+ All changes to the Slit contents should be done in this file.
+
+ @copyright
+ Copyright 1999 - 2019 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SLIT_H_
+#define _SLIT_H_
+
+#include "MaxSocket.h"
+
+//
+// SLIT Definitions, see TBD specification for details.
+//
+
+#define EFI_ACPI_OEM_SLIT_REVISION 0x00000001
+//
+// SLIT Revision (defined in spec)
+//
+#define EFI_ACPI_SLIT_PMEM_NODES_SOCKET_MAX_CNT 8 // Max number of PMEM nodes per socket
+#define EFI_ACPI_SLIT_NODES_SOCKET_MAX_CNT 4 // Max number of SNC nodes
+#define EFI_ACPI_SLIT_DOMAINS_NODES_MAX_CNT 2 // Max number of Domins per SNC node (1LM domain and 2LM domain)
+
+#define EFI_ACPI_SLIT_NODES_MAX_CNT \
+ (MAX_SOCKET * ((EFI_ACPI_SLIT_NODES_SOCKET_MAX_CNT * EFI_ACPI_SLIT_DOMAINS_NODES_MAX_CNT) \
+ + EFI_ACPI_SLIT_PMEM_NODES_SOCKET_MAX_CNT))
+
+#define EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT \
+ (EFI_ACPI_SLIT_NODES_MAX_CNT * EFI_ACPI_SLIT_NODES_MAX_CNT)
+
+#define EFI_ACPI_SLIT_PMEM_INFO_CNT \
+ (MAX_SOCKET * EFI_ACPI_SLIT_PMEM_NODES_SOCKET_MAX_CNT)
+
+#define PMEM_INVALID_SOCKET 0xFF
+
+#define PMEM_ZERO_HOP 10
+#define PMEM_ONE_ONE 17
+#define PMEM_ONE_HOP 28
+#define PMEM_TWO_HOP 38
+
+#define ZERO_HOP 10
+#define ZERO_ONE 11
+#define ZERO_TWO 12
+#define ZERO_THREE 13
+#define ONE_HOP 20
+#define ONE_ONE 21
+#define ONE_TWO 22
+#define TWO_HOP 30
+#define THREE_HOP 40
+#define DISTANT_NODE_4S_EP 2
+#define DISTANT_NODE_4S_EP_COD (DISTANT_NODE_4S_EP * 2)
+
+typedef struct {
+ UINT8 Socket;
+ UINT8 Pmem;
+ UINT8 Valid;
+} EFI_ACPI_SYSTEM_LOCALITY_INFORMATION_TABLE_PMEM_INFO;
+
+typedef struct {
+ UINT8 Entry;
+} ACPI_SYSTEM_LOCALITIES_STRUCTURE;
+
+typedef struct {
+ EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER Header;
+ ACPI_SYSTEM_LOCALITIES_STRUCTURE NumSlit[0];
+
+} ACPI_SYSTEM_LOCALITY_INFORMATION_TABLE;
+
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Srat.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Srat.h
new file mode 100644
index 0000000000..3f3a6545c2
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/Srat.h
@@ -0,0 +1,53 @@
+/** @file
+ ACPI Static resource definition table implementation, defined at
+ http://microsoft.com/hwdev/design/srat.htm.
+
+ @copyright
+ Copyright 1999 - 2019 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SRAT_H_
+#define _SRAT_H_
+
+//
+// Statements that include other files
+//
+#include <IndustryStandard/Acpi.h>
+
+//
+#define EFI_ACPI_OEM_SRAT_REVISION 0x00000002 //
+
+//
+// TBD :Backward Compatibility per ACPI 3.0. Required by Hyper-V. OS's ok so far as of 5/27/09
+//
+#define EFI_ACPI_SRAT_RESERVED_FOR_BACKWARD_COMPATIBILITY 0x00000001
+//
+// Define the number of each table type.
+// This is where the table layout is modified.
+//
+#define PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE_COUNT MAX_CPU_NUM
+#define MEMORY_AFFINITY_STRUCTURE_COUNT MC_MAX_NODE*MAX_CRS_ENTRIES_PER_NODE
+#define X2APIC_AFFINITY_STRUCTURE_COUNT MAX_CPU_NUM
+//
+// Statis Resource Affinity Table header definition. The table
+// must be defined in a platform specific manner.
+//
+//
+// Ensure proper structure formats
+//
+#pragma pack(1)
+
+typedef struct {
+ EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER *SratHeader;
+
+ EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE *Apic;
+ EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE *Memory;
+ EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE *x2Apic;
+
+} STATIC_RESOURCE_AFFINITY_TABLE;
+
+#pragma pack()
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/amlresrc.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/amlresrc.h
new file mode 100644
index 0000000000..ddbca04903
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Acpi/amlresrc.h
@@ -0,0 +1,542 @@
+/** @file
+
+ @copyright
+ Copyright 1999 - 2017 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+/* acpisrc:StructDefs -- for acpisrc conversion */
+
+#ifndef __AMLRESRC_H
+#define __AMLRESRC_H
+
+
+/*
+ * Resource descriptor tags, as defined in the ACPI specification.
+ * Used to symbolically reference fields within a descriptor.
+ */
+#define ACPI_RESTAG_ADDRESS "_ADR"
+#define ACPI_RESTAG_ALIGNMENT "_ALN"
+#define ACPI_RESTAG_ADDRESSSPACE "_ASI"
+#define ACPI_RESTAG_ACCESSSIZE "_ASZ"
+#define ACPI_RESTAG_TYPESPECIFICATTRIBUTES "_ATT"
+#define ACPI_RESTAG_BASEADDRESS "_BAS"
+#define ACPI_RESTAG_BUSMASTER "_BM_" /* Master(1), Slave(0) */
+#define ACPI_RESTAG_DEBOUNCETIME "_DBT"
+#define ACPI_RESTAG_DECODE "_DEC"
+#define ACPI_RESTAG_DEVICEPOLARITY "_DPL"
+#define ACPI_RESTAG_DMA "_DMA"
+#define ACPI_RESTAG_DMATYPE "_TYP" /* Compatible(0), A(1), B(2), F(3) */
+#define ACPI_RESTAG_DRIVESTRENGTH "_DRS"
+#define ACPI_RESTAG_ENDIANNESS "_END"
+#define ACPI_RESTAG_FLOWCONTROL "_FLC"
+#define ACPI_RESTAG_GRANULARITY "_GRA"
+#define ACPI_RESTAG_INTERRUPT "_INT"
+#define ACPI_RESTAG_INTERRUPTLEVEL "_LL_" /* ActiveLo(1), ActiveHi(0) */
+#define ACPI_RESTAG_INTERRUPTSHARE "_SHR" /* Shareable(1), NoShare(0) */
+#define ACPI_RESTAG_INTERRUPTTYPE "_HE_" /* Edge(1), Level(0) */
+#define ACPI_RESTAG_IORESTRICTION "_IOR"
+#define ACPI_RESTAG_LENGTH "_LEN"
+#define ACPI_RESTAG_LINE "_LIN"
+#define ACPI_RESTAG_MEMATTRIBUTES "_MTP" /* Memory(0), Reserved(1), ACPI(2), NVS(3) */
+#define ACPI_RESTAG_MEMTYPE "_MEM" /* NonCache(0), Cacheable(1) Cache+combine(2), Cache+prefetch(3) */
+#define ACPI_RESTAG_MAXADDR "_MAX"
+#define ACPI_RESTAG_MINADDR "_MIN"
+#define ACPI_RESTAG_MAXTYPE "_MAF"
+#define ACPI_RESTAG_MINTYPE "_MIF"
+#define ACPI_RESTAG_MODE "_MOD"
+#define ACPI_RESTAG_PARITY "_PAR"
+#define ACPI_RESTAG_PHASE "_PHA"
+#define ACPI_RESTAG_PIN "_PIN"
+#define ACPI_RESTAG_PINCONFIG "_PPI"
+#define ACPI_RESTAG_POLARITY "_POL"
+#define ACPI_RESTAG_REGISTERBITOFFSET "_RBO"
+#define ACPI_RESTAG_REGISTERBITWIDTH "_RBW"
+#define ACPI_RESTAG_RANGETYPE "_RNG"
+#define ACPI_RESTAG_READWRITETYPE "_RW_" /* ReadOnly(0), Writeable (1) */
+#define ACPI_RESTAG_LENGTH_RX "_RXL"
+#define ACPI_RESTAG_LENGTH_TX "_TXL"
+#define ACPI_RESTAG_SLAVEMODE "_SLV"
+#define ACPI_RESTAG_SPEED "_SPE"
+#define ACPI_RESTAG_STOPBITS "_STB"
+#define ACPI_RESTAG_TRANSLATION "_TRA"
+#define ACPI_RESTAG_TRANSTYPE "_TRS" /* Sparse(1), Dense(0) */
+#define ACPI_RESTAG_TYPE "_TTP" /* Translation(1), Static (0) */
+#define ACPI_RESTAG_XFERTYPE "_SIZ" /* 8(0), 8And16(1), 16(2) */
+#define ACPI_RESTAG_VENDORDATA "_VEN"
+
+
+/* Default sizes for "small" resource descriptors */
+
+#define ASL_RDESC_IRQ_SIZE 0x02
+#define ASL_RDESC_DMA_SIZE 0x02
+#define ASL_RDESC_ST_DEPEND_SIZE 0x00
+#define ASL_RDESC_END_DEPEND_SIZE 0x00
+#define ASL_RDESC_IO_SIZE 0x07
+#define ASL_RDESC_FIXED_IO_SIZE 0x03
+#define ASL_RDESC_FIXED_DMA_SIZE 0x05
+#define ASL_RDESC_END_TAG_SIZE 0x01
+
+
+typedef struct asl_resource_node
+{
+ UINT32 BufferLength;
+ VOID *Buffer;
+ struct asl_resource_node *Next;
+
+} ASL_RESOURCE_NODE;
+
+
+/* Macros used to generate AML resource length fields */
+
+#define ACPI_AML_SIZE_LARGE(r) (sizeof (r) - sizeof (AML_RESOURCE_LARGE_HEADER))
+#define ACPI_AML_SIZE_SMALL(r) (sizeof (r) - sizeof (AML_RESOURCE_SMALL_HEADER))
+
+/*
+ * Resource descriptors defined in the ACPI specification.
+ *
+ * Packing/alignment must be BYTE because these descriptors
+ * are used to overlay the raw AML byte stream.
+ */
+#pragma pack(1)
+
+/*
+ * SMALL descriptors
+ */
+#define AML_RESOURCE_SMALL_HEADER_COMMON \
+ UINT8 DescriptorType;
+
+typedef struct aml_resource_small_header
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+
+} AML_RESOURCE_SMALL_HEADER;
+
+
+typedef struct aml_resource_irq
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT16 IrqMask;
+ UINT8 Flags;
+
+} AML_RESOURCE_IRQ;
+
+
+typedef struct aml_resource_irq_noflags
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT16 IrqMask;
+
+} AML_RESOURCE_IRQ_NOFLAGS;
+
+
+typedef struct aml_resource_dma
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT8 DmaChannelMask;
+ UINT8 Flags;
+
+} AML_RESOURCE_DMA;
+
+
+typedef struct aml_resource_start_dependent
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT8 Flags;
+
+} AML_RESOURCE_START_DEPENDENT;
+
+
+typedef struct aml_resource_start_dependent_noprio
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+
+} AML_RESOURCE_START_DEPENDENT_NOPRIO;
+
+
+typedef struct aml_resource_end_dependent
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+
+} AML_RESOURCE_END_DEPENDENT;
+
+
+typedef struct aml_resource_io
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT8 Flags;
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT8 Alignment;
+ UINT8 AddressLength;
+
+} AML_RESOURCE_IO;
+
+
+typedef struct aml_resource_fixed_io
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT16 Address;
+ UINT8 AddressLength;
+
+} AML_RESOURCE_FIXED_IO;
+
+
+typedef struct aml_resource_vendor_small
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+
+} AML_RESOURCE_VENDOR_SMALL;
+
+
+typedef struct aml_resource_end_tag
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT8 Checksum;
+
+} AML_RESOURCE_END_TAG;
+
+
+typedef struct aml_resource_fixed_dma
+{
+ AML_RESOURCE_SMALL_HEADER_COMMON
+ UINT16 RequestLines;
+ UINT16 Channels;
+ UINT8 Width;
+
+} AML_RESOURCE_FIXED_DMA;
+
+
+/*
+ * LARGE descriptors
+ */
+#define AML_RESOURCE_LARGE_HEADER_COMMON \
+ UINT8 DescriptorType;\
+ UINT16 ResourceLength;
+
+typedef struct aml_resource_large_header
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+
+} AML_RESOURCE_LARGE_HEADER;
+
+
+/* General Flags for address space resource descriptors */
+
+#define ACPI_RESOURCE_FLAG_DEC 2
+#define ACPI_RESOURCE_FLAG_MIF 4
+#define ACPI_RESOURCE_FLAG_MAF 8
+
+typedef struct aml_resource_memory24
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 Flags;
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT16 Alignment;
+ UINT16 AddressLength;
+
+} AML_RESOURCE_MEMORY24;
+
+
+typedef struct aml_resource_vendor_large
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+
+} AML_RESOURCE_VENDOR_LARGE;
+
+
+typedef struct aml_resource_memory32
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 Flags;
+ UINT32 Minimum;
+ UINT32 Maximum;
+ UINT32 Alignment;
+ UINT32 AddressLength;
+
+} AML_RESOURCE_MEMORY32;
+
+
+typedef struct aml_resource_fixed_memory32
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 Flags;
+ UINT32 Address;
+ UINT32 AddressLength;
+
+} AML_RESOURCE_FIXED_MEMORY32;
+
+
+#define AML_RESOURCE_ADDRESS_COMMON \
+ UINT8 ResourceType; \
+ UINT8 Flags; \
+ UINT8 SpecificFlags;
+
+
+typedef struct aml_resource_address
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_ADDRESS_COMMON
+
+} AML_RESOURCE_ADDRESS;
+
+
+typedef struct aml_resource_extended_address64
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_ADDRESS_COMMON
+ UINT8 RevisionID;
+ UINT8 Reserved;
+ UINT64 Granularity;
+ UINT64 Minimum;
+ UINT64 Maximum;
+ UINT64 TranslationOffset;
+ UINT64 AddressLength;
+ UINT64 TypeSpecific;
+
+} AML_RESOURCE_EXTENDED_ADDRESS64;
+
+#define AML_RESOURCE_EXTENDED_ADDRESS_REVISION 1 /* ACPI 3.0 */
+
+
+typedef struct aml_resource_address64
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_ADDRESS_COMMON
+ UINT64 Granularity;
+ UINT64 Minimum;
+ UINT64 Maximum;
+ UINT64 TranslationOffset;
+ UINT64 AddressLength;
+
+} AML_RESOURCE_ADDRESS64;
+
+
+typedef struct aml_resource_address32
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_ADDRESS_COMMON
+ UINT32 Granularity;
+ UINT32 Minimum;
+ UINT32 Maximum;
+ UINT32 TranslationOffset;
+ UINT32 AddressLength;
+
+} AML_RESOURCE_ADDRESS32;
+
+
+typedef struct aml_resource_address16
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_ADDRESS_COMMON
+ UINT16 Granularity;
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT16 TranslationOffset;
+ UINT16 AddressLength;
+
+} AML_RESOURCE_ADDRESS16;
+
+
+typedef struct aml_resource_extended_irq
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 Flags;
+ UINT8 InterruptCount;
+ UINT32 Interrupts[1];
+ /* ResSourceIndex, ResSource optional fields follow */
+
+} AML_RESOURCE_EXTENDED_IRQ;
+
+
+typedef struct aml_resource_generic_register
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 AddressSpaceId;
+ UINT8 BitWidth;
+ UINT8 BitOffset;
+ UINT8 AccessSize; /* ACPI 3.0, was previously Reserved */
+ UINT64 Address;
+
+} AML_RESOURCE_GENERIC_REGISTER;
+
+
+/* Common descriptor for GpioInt and GpioIo (ACPI 5.0) */
+
+typedef struct aml_resource_gpio
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ UINT8 RevisionId;
+ UINT8 ConnectionType;
+ UINT16 Flags;
+ UINT16 IntFlags;
+ UINT8 PinConfig;
+ UINT16 DriveStrength;
+ UINT16 DebounceTimeout;
+ UINT16 PinTableOffset;
+ UINT8 ResSourceIndex;
+ UINT16 ResSourceOffset;
+ UINT16 VendorOffset;
+ UINT16 VendorLength;
+ /*
+ * Optional fields follow immediately:
+ * 1) PIN list (Words)
+ * 2) Resource Source String
+ * 3) Vendor Data bytes
+ */
+
+} AML_RESOURCE_GPIO;
+
+#define AML_RESOURCE_GPIO_REVISION 1 /* ACPI 5.0 */
+
+/* Values for ConnectionType above */
+
+#define AML_RESOURCE_GPIO_TYPE_INT 0
+#define AML_RESOURCE_GPIO_TYPE_IO 1
+#define AML_RESOURCE_MAX_GPIOTYPE 1
+
+
+/* Common preamble for all serial descriptors (ACPI 5.0) */
+
+#define AML_RESOURCE_SERIAL_COMMON \
+ UINT8 RevisionId; \
+ UINT8 ResSourceIndex; \
+ UINT8 Type; \
+ UINT8 Flags; \
+ UINT16 TypeSpecificFlags; \
+ UINT8 TypeRevisionId; \
+ UINT16 TypeDataLength; \
+
+/* Values for the type field above */
+
+#define AML_RESOURCE_I2C_SERIALBUSTYPE 1
+#define AML_RESOURCE_SPI_SERIALBUSTYPE 2
+#define AML_RESOURCE_UART_SERIALBUSTYPE 3
+#define AML_RESOURCE_MAX_SERIALBUSTYPE 3
+#define AML_RESOURCE_VENDOR_SERIALBUSTYPE 192 /* Vendor defined is 0xC0-0xFF (NOT SUPPORTED) */
+
+typedef struct aml_resource_common_serialbus
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_SERIAL_COMMON
+
+} AML_RESOURCE_COMMON_SERIALBUS;
+
+typedef struct aml_resource_i2c_serialbus
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_SERIAL_COMMON
+ UINT32 ConnectionSpeed;
+ UINT16 SlaveAddress;
+ /*
+ * Optional fields follow immediately:
+ * 1) Vendor Data bytes
+ * 2) Resource Source String
+ */
+
+} AML_RESOURCE_I2C_SERIALBUS;
+
+#define AML_RESOURCE_I2C_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_I2C_TYPE_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_I2C_MIN_DATA_LEN 6
+
+typedef struct aml_resource_spi_serialbus
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_SERIAL_COMMON
+ UINT32 ConnectionSpeed;
+ UINT8 DataBitLength;
+ UINT8 ClockPhase;
+ UINT8 ClockPolarity;
+ UINT16 DeviceSelection;
+ /*
+ * Optional fields follow immediately:
+ * 1) Vendor Data bytes
+ * 2) Resource Source String
+ */
+
+} AML_RESOURCE_SPI_SERIALBUS;
+
+#define AML_RESOURCE_SPI_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_SPI_TYPE_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_SPI_MIN_DATA_LEN 9
+
+
+typedef struct aml_resource_uart_serialbus
+{
+ AML_RESOURCE_LARGE_HEADER_COMMON
+ AML_RESOURCE_SERIAL_COMMON
+ UINT32 DefaultBaudRate;
+ UINT16 RxFifoSize;
+ UINT16 TxFifoSize;
+ UINT8 Parity;
+ UINT8 LinesEnabled;
+ /*
+ * Optional fields follow immediately:
+ * 1) Vendor Data bytes
+ * 2) Resource Source String
+ */
+
+} AML_RESOURCE_UART_SERIALBUS;
+
+#define AML_RESOURCE_UART_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_UART_TYPE_REVISION 1 /* ACPI 5.0 */
+#define AML_RESOURCE_UART_MIN_DATA_LEN 10
+
+
+/* restore default alignment */
+
+#pragma pack()
+
+/* Union of all resource descriptors, so we can allocate the worst case */
+
+typedef union aml_resource
+{
+ /* Descriptor headers */
+
+ UINT8 DescriptorType;
+ AML_RESOURCE_SMALL_HEADER SmallHeader;
+ AML_RESOURCE_LARGE_HEADER LargeHeader;
+
+ /* Small resource descriptors */
+
+ AML_RESOURCE_IRQ Irq;
+ AML_RESOURCE_DMA Dma;
+ AML_RESOURCE_START_DEPENDENT StartDpf;
+ AML_RESOURCE_END_DEPENDENT EndDpf;
+ AML_RESOURCE_IO Io;
+ AML_RESOURCE_FIXED_IO FixedIo;
+ AML_RESOURCE_FIXED_DMA FixedDma;
+ AML_RESOURCE_VENDOR_SMALL VendorSmall;
+ AML_RESOURCE_END_TAG EndTag;
+
+ /* Large resource descriptors */
+
+ AML_RESOURCE_MEMORY24 Memory24;
+ AML_RESOURCE_GENERIC_REGISTER GenericReg;
+ AML_RESOURCE_VENDOR_LARGE VendorLarge;
+ AML_RESOURCE_MEMORY32 Memory32;
+ AML_RESOURCE_FIXED_MEMORY32 FixedMemory32;
+ AML_RESOURCE_ADDRESS16 Address16;
+ AML_RESOURCE_ADDRESS32 Address32;
+ AML_RESOURCE_ADDRESS64 Address64;
+ AML_RESOURCE_EXTENDED_ADDRESS64 ExtAddress64;
+ AML_RESOURCE_EXTENDED_IRQ ExtendedIrq;
+ AML_RESOURCE_GPIO Gpio;
+ AML_RESOURCE_I2C_SERIALBUS I2cSerialBus;
+ AML_RESOURCE_SPI_SERIALBUS SpiSerialBus;
+ AML_RESOURCE_UART_SERIALBUS UartSerialBus;
+ AML_RESOURCE_COMMON_SERIALBUS CommonSerialBus;
+
+ /* Utility overlays */
+
+ AML_RESOURCE_ADDRESS Address;
+ UINT32 DwordItem;
+ UINT16 WordItem;
+ UINT8 ByteItem;
+
+} AML_RESOURCE;
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc b/Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc
index d806521abf..1a85a26e25 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc
@@ -134,9 +134,13 @@ DEFINE EDKII_DSC_FEATURE_BUILD_OPTIONS = $(EDKII_DSC_FEATURE_BUILD_OPTIONS) $(ME
#
# Override the VFR compile flags to speed the build time
#
-
*_*_*_VFR_FLAGS == -n
+#
+# Disable remarks, enable warnings as errors, disable integer optimization,
+#
+ *_*_*_ASL_FLAGS = -vr -we -oi
+
#
# add to the build options for DXE/SMM drivers to remove the log message:
# !!!!!!!! InsertImageRecord - Section Alignment(0x20) is not 4K !!!!!!!!
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/AcpiPlatformLib.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/AcpiPlatformLib.h
new file mode 100644
index 0000000000..8ec25b8c16
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/AcpiPlatformLib.h
@@ -0,0 +1,107 @@
+/** @file
+
+ @copyright
+ Copyright 1996 - 2017 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _ACPI_PLATFORM_LIB_H_
+#define _ACPI_PLATFORM_LIB_H_
+
+//
+// Statements that include other header files
+//
+#include <PiDxe.h>
+#include <Uefi/UefiBaseType.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+
+#include <IndustryStandard/Acpi.h>
+
+#include <Protocol/MpService.h>
+
+#include <Protocol/AcpiSystemDescriptionTable.h>
+
+
+EFI_STATUS
+AcpiPlatformHooksIsActiveTable (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table
+ );
+
+/*++
+
+Routine Description:
+
+ Called for every ACPI table found in the BIOS flash.
+ Returns whether a table is active or not. Inactive tables
+ are not published in the ACPI table list. This hook can be
+ used to implement optional SSDT tables or enabling/disabling
+ specific functionality (e.g. SPCR table) based on a setup
+ switch or platform preference. In case of optional SSDT tables,
+ the platform flash will include all the SSDT tables but will
+ return EFI_SUCCESS only for those tables that need to be
+ published.
+ This hook can also be used to update the table data. The header
+ is updated by the common code. For example, if a platform wants
+ to use an SSDT table to export some platform settings to the
+ ACPI code, it needs to update the data inside that SSDT based
+ on platform preferences in this hook.
+
+Arguments:
+
+ None
+
+Returns:
+
+ Status - EFI_SUCCESS if the table is active
+ Status - EFI_UNSUPPORTED if the table is not active
+*/
+
+/**
+
+ This function will update any runtime platform specific information.
+ This currently includes:
+ Setting OEM table values, ID, table ID, creator ID and creator revision.
+ Enabling the proper processor entries in the APIC tables.
+
+ @param Table - The table to update
+
+ @retval EFI_SUCCESS - The function completed successfully.
+
+**/
+EFI_STATUS
+PlatformUpdateTables (
+ IN OUT EFI_ACPI_COMMON_HEADER *Table
+ ,IN OUT EFI_ACPI_TABLE_VERSION *Version
+ );
+
+/**
+ Give the platform a chance to build tables.
+
+ Some tables can be built from scratch more efficiently than being prebuilt
+ and updated. This function builds any such tables for the platform.
+
+ @retval EFI_SUCCESS Any platform tables were successfully built.
+**/
+EFI_STATUS
+PlatformBuildTables (
+ VOID
+ );
+
+/**
+ Platform hook to initialize Platform Specific ACPI Parameters
+
+ @retval EFI_SUCCESS Platform specific parameters in mAcpiParameter
+ initialized successfully.
+ @retval EFI_INVALID_PARAMETER mAcpiParameter global was NULL.
+**/
+EFI_STATUS
+PlatformHookAfterAcpiParamInit (
+ VOID
+ );
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformStatusCodes.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformStatusCodes.h
new file mode 100644
index 0000000000..dbe7fa075e
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/PlatformStatusCodes.h
@@ -0,0 +1,364 @@
+/** @file
+ PostCode status code definition.
+
+ @copyright
+ Copyright 2011 - 2020 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef __PLATFORM_STATUS_CODES_INTERNAL_H__
+#define __PLATFORM_STATUS_CODES_INTERNAL_H__
+
+#include <Pi/PiStatusCode.h>
+
+//
+//Error Code Operations
+//
+// ME related error definitions
+#define EFI_COMPUTING_UNIT_ME_PROCESSOR (EFI_COMPUTING_UNIT | 0x00800000)
+#define EFI_CU_ME_SELFTEST_FAIL (EFI_OEM_SPECIFIC | 0x00000000)
+
+//Chipset:EFI_COMPUTING_UNIT_CHIPSET
+#define EFI_CU_CHIPSET_EC_NVVARIABLES_CLEARED (EFI_OEM_SPECIFIC | 0x00000003)
+#define EFI_CU_CHIPSET_EC_NVVARIABLES_CORRUPTED (EFI_OEM_SPECIFIC | 0x00000004)
+#define EFI_CU_CHIPSET_SOFT_RECOVERY_MODE (EFI_OEM_SPECIFIC | 0x00000009)
+
+// TPM related error definations
+#define EFI_COMPUTING_UNIT_TPM (EFI_COMPUTING_UNIT | 0x00810000)
+#define EFI_CU_TPM_NOT_DETECTED (EFI_OEM_SPECIFIC | 0x00000000)
+#define EFI_CU_TPM_TIMEOUT_FAILURE (EFI_OEM_SPECIFIC | 0x00000001)
+#define EFI_CU_TPM_FAIL (EFI_OEM_SPECIFIC | 0x00000002)
+#define EFI_CU_TPM_FAILED_SELFTEST (EFI_OEM_SPECIFIC | 0x00000003)
+
+//TXT related error definations
+#define EFI_COMPUTING_UNIT_TXT (EFI_COMPUTING_UNIT | 0x00820000)
+#define EFI_CU_TXT_ACM_ERROR (EFI_OEM_SPECIFIC | 0x00000004)
+
+//Subclass of Computing Unit Class:EFI_COMPUTING_UNIT_MEMORY
+#define EFI_CU_MEMORY_EC_POPU_FAIL (EFI_OEM_SPECIFIC | 0x00000000)
+
+//Subclass of Computing Unit Class: EFI_COMPUTING_UNIT_HOST_PROCESSOR
+#define EFI_CU_DISABLE_INFO (EFI_OEM_SPECIFIC | 0x00000017)
+
+//Software Subclass definitions:EFI_SOFTWARE_PEI_MODULE
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_OEM_SPECIFIC | 0x00000000)
+
+//
+//Progress Code:Start from 0x8500 for OEM use
+//
+
+#define EFI_SW_RS_PC_VARIABLE_INIT (EFI_OEM_SPECIFIC | 0x00000501)
+#define EFI_SW_DXE_BS_SETUP_INIT (EFI_OEM_SPECIFIC | 0x00000502)
+#define EFI_SW_DXE_BS_ACPI_INIT (EFI_OEM_SPECIFIC | 0x00000503)
+#define EFI_SW_DXE_BS_CSM_INIT (EFI_OEM_SPECIFIC | 0x00000504)
+#define EFI_SW_SMM_ACPI_ENABLE (EFI_OEM_SPECIFIC | 0x00000505)
+#define EFI_SW_RS_PC_VARIABLE_RECLAIM (EFI_OEM_SPECIFIC | 0x00000506)
+#define EFI_IOB_PCI_RES_ASSIGN (EFI_OEM_SPECIFIC | 0x00000507)
+#ifndef EFI_SW_PEI_PC_S3_STARTED
+#define EFI_SW_PEI_PC_S3_STARTED (EFI_OEM_SPECIFIC | 0x00000508)
+#endif
+#define EFI_SW_PEI_PC_S3_VIDEO_REPOST (EFI_OEM_SPECIFIC | 0x00000509)
+#define EFI_SW_RS_PC_POST_END_CLEAR_STATUS (EFI_OEM_SPECIFIC | 0x0000050a)
+#define EFI_SW_OEM_END_OF_DXE (EFI_OEM_SPECIFIC | 0x0000050b)
+
+#define BOOT_CLEAR_STATUS (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_POST_END_CLEAR_STATUS)
+#define DXE_NVRAM_INIT (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_VARIABLE_INIT)
+#define DXE_SETUP_INIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_SETUP_INIT)
+#define DXE_ACPI_INIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_ACPI_INIT)
+#define DXE_CSM_INIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_CSM_INIT)
+#define DXE_ACPI_ENABLE (EFI_SOFTWARE_SMM_DRIVER | EFI_SW_SMM_ACPI_ENABLE)
+#define DXE_NVRAM_CLEANUP (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_VARIABLE_RECLAIM)
+#define DXE_END_OF_DXE (EFI_SOFTWARE_UNSPECIFIED | EFI_SW_OEM_END_OF_DXE)
+
+#define DXE_RTC_YEAR_IS_ERROR (EFI_SOFTWARE_SYSTEM_ERROR | EFI_SW_EC_CMOS_DATE_TIME_ERROR)
+
+
+typedef struct{
+ EFI_STATUS_CODE_VALUE Value;
+ UINT32 Data;
+} STATUS_CODE_TO_DATA_MAP;
+
+//
+// Enable PEI/DXE status code
+//
+#define PEI_STATUS_CODE 1
+#define DXE_STATUS_CODE 1
+
+#define STATUS_CODE_TYPE(Type) ((Type)&EFI_STATUS_CODE_TYPE_MASK)
+#define STATUS_CODE_CLASS(Value) ((Value)&EFI_STATUS_CODE_CLASS_MASK)
+
+//Progress/Error codes
+#define PEI_CORE_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_PC_ENTRY_POINT)
+#define PEI_RESET_NOT_AVAILABLE (EFI_SOFTWARE_PEI_CORE | EFI_SW_PS_EC_RESET_NOT_AVAILABLE)
+#define PEI_DXEIPL_NOT_FOUND (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_EC_DXEIPL_NOT_FOUND)
+#define PEI_DXE_CORE_NOT_FOUND (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_EC_DXE_CORRUPT)
+#define PEI_S3_RESUME_ERROR (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
+#define PEI_RECOVERY_FAILED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_EC_RECOVERY_FAILED)
+#define DXE_CORE_STARTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_ENTRY_POINT)
+
+#define DXE_EXIT_BOOT_SERVICES_END (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
+
+// Reported by CPU PEIM
+#define PEI_CAR_CPU_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_POWER_ON_INIT)
+
+
+// Reported by SB PEIM
+#define EFI_CU_CHIPSET_PLATFORM_TYPE_INIT 0x00000001
+#define EFI_CU_CHIPSET_PLATFORM_PEIM_INIT 0x00000002
+#define PEI_PLATFORM_TYPE_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CHIPSET_PLATFORM_TYPE_INIT)
+#define PEI_PLATFORM_PEIM_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CHIPSET_PLATFORM_PEIM_INIT)
+
+//Reported by Memory Detection PEIM
+#define PEI_MEMORY_SPD_READ (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_SPD_READ)
+#define PEI_MEMORY_PRESENCE_DETECT (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PRESENCE_DETECT)
+#define PEI_MEMORY_TIMING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TIMING)
+#define PEI_MEMORY_CONFIGURING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_CONFIGURING)
+#define PEI_MEMORY_OPTIMIZING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_OPTIMIZING)
+#define PEI_MEMORY_INIT (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_INIT)
+#define PEI_MEMORY_TEST (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TEST)
+#define PEI_MEMORY_INVALID_TYPE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_TYPE)
+#define PEI_MEMORY_INVALID_SPEED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SPEED)
+#define PEI_MEMORY_SPD_FAIL (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_SPD_FAIL)
+#define PEI_MEMORY_INVALID_SIZE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SIZE)
+#define PEI_MEMORY_MISMATCH (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_MISMATCH)
+#define PEI_MEMORY_S3_RESUME_FAILED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_S3_RESUME_FAIL)
+#define PEI_MEMORY_NOT_DETECTED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_DETECTED)
+#define PEI_MEMORY_NONE_USEFUL (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_USEFUL)
+#define PEI_MEMORY_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NON_SPECIFIC)
+#define PEI_MEMORY_INSTALLED (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_PC_INSTALL_PEI_MEMORY)
+#define PEI_MEMORY_NOT_INSTALLED (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PEI_CORE_EC_MEMORY_NOT_INSTALLED)
+#define PEI_MEMORY_INSTALLED_TWICE (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_EC_MEMORY_INSTALLED_TWICE)
+
+//Reported by CPU PEIM
+#define PEI_CPU_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_PC_INIT_BEGIN)
+#define PEI_CPU_CACHE_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_CACHE_INIT)
+#define PEI_CPU_BSP_SELECT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_BSP_SELECT)
+#define PEI_CPU_AP_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_AP_INIT)
+#define PEI_CPU_SMM_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_INIT)
+#define PEI_CPU_INVALID_TYPE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_TYPE)
+#define PEI_CPU_INVALID_SPEED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_SPEED)
+#define PEI_CPU_MISMATCH (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MISMATCH)
+#define PEI_CPU_SELF_TEST_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+#define PEI_CPU_CACHE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CACHE)
+#define PEI_CPU_MICROCODE_UPDATE_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MICROCODE_UPDATE)
+#define PEI_CPU_NO_MICROCODE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_NO_MICROCODE_UPDATE)
+//If non of the errors above apply use this one
+#define PEI_CPU_INTERNAL_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INTERNAL)
+//Generic CPU error. It should only be used if non of the errors above apply
+#define PEI_CPU_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NON_SPECIFIC)
+
+// Reported by NB PEIM
+#define PEI_MEM_NB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_MEM_NB_INIT)
+// Reported by SB PEIM
+#define PEI_MEM_SB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_MEM_SB_INIT)
+
+//Reported by PEIM which detected forced or auto recovery condition
+#define PEI_RECOVERY_AUTO (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_AUTO)
+#define PEI_RECOVERY_USER (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_USER)
+
+//Reported by DXE IPL
+#define PEI_RECOVERY_PPI_NOT_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_RECOVERY_PPI_NOT_FOUND)
+#define PEI_S3_RESUME_PPI_NOT_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_PPI_NOT_FOUND)
+#define PEI_S3_RESUME_FAILED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
+
+//Reported by Recovery PEIM
+#define PEI_RECOVERY_STARTED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_BEGIN)
+#define PEI_RECOVERY_CAPSULE_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_CAPSULE_LOAD)
+#define PEI_RECOVERY_NO_CAPSULE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE)
+#define PEI_RECOVERY_CAPSULE_LOADED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_CAPSULE_START)
+#define PEI_RECOVERY_INVALID_CAPSULE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR)
+
+//Reported by S3 Resume PEIM
+#define PEI_S3_BOOT_SCRIPT (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT)
+#define PEI_S3_OS_WAKE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE)
+#define PEI_S3_BOOT_SCRIPT_ERROR (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
+#define PEI_S3_OS_WAKE_ERROR (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
+#define PEI_S3_STARTED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_STARTED)
+#define PEI_S3_VIDEO_REPOST (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_VIDEO_REPOST)
+
+
+#define PEI_PEIM_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN)
+#define PEI_PEIM_ENDED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_END)
+
+//Reported by DXE IPL
+#define PEI_DXE_IPL_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT)
+
+//Reported by PEIM which installs Reset PPI
+#define PEI_RESET_SYSTEM (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_PC_RESET_SYSTEM)
+
+//Reported by the PEIM or DXE driver which detected the error
+#define GENERIC_MEMORY_CORRECTABLE_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_CORRECTABLE)
+#define GENERIC_MEMORY_UNCORRECTABLE_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UNCORRECTABLE)
+
+//Reported by Flash Update DXE driver
+#define DXE_FLASH_UPDATE_FAILED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UPDATE_FAIL)
+
+//Reported by the PEIM or DXE driver which detected the error
+#define GENERIC_CPU_THERMAL_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_THERMAL)
+#define GENERIC_CPU_LOW_VOLTAGE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_LOW_VOLTAGE)
+#define GENERIC_CPU_HIGH_VOLTAGE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_HIGH_VOLTAGE)
+#define GENERIC_CPU_CORRECTABLE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CORRECTABLE)
+#define GENERIC_CPU_UNCORRECTABLE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_UNCORRECTABLE)
+#define GENERIC_BAD_DATE_TIME_ERROR (EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_BAD_DATE_TIME)
+#define GENERIC_MEMORY_SIZE_DECREASE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_MISMATCH)
+
+//Reported by DXE Core
+#define DXE_DRIVER_STARTED (EFI_SOFTWARE_EFI_DXE_SERVICE | EFI_SW_PC_INIT_BEGIN)
+#define DXE_DRIVER_ENED (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_END)
+#define DXE_ARCH_PROTOCOLS_AVAILABLE (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_ARCH_READY)
+#define DXE_DRIVER_CONNECTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_START_DRIVER)
+#define DXE_ARCH_PROTOCOL_NOT_AVAILABLE (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_EC_NO_ARCH)
+
+//Reported by DXE CPU driver
+#define DXE_CPU_SELF_TEST_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+
+//Reported by PCI Host Bridge driver
+#define DXE_NB_HB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_HB_INIT )
+
+// Reported by NB Driver
+#define DXE_NB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_NB_INIT )
+#define DXE_NB_SMM_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_NB_SMM_INIT )
+#define DXE_NB_ERROR (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_DXE_NB_ERROR )
+
+// Reported by SB Driver(s)
+#define DXE_SBRUN_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_RT_INIT )
+#define DXE_SB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_INIT )
+#define DXE_SB_SMM_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_SMM_INIT )
+#define DXE_SB_DEVICES_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_DEVICES_INIT )
+#define DXE_SB_BAD_BATTERY (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_BAD_BATTERY)
+#define DXE_SB_ERROR (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_DXE_SB_ERROR )
+
+#define EFI_SW_DXE_BS_PC_ACPI_INIT 0x00000005
+#ifndef EFI_SW_DXE_BS_PC_CSM_INIT
+#define EFI_SW_DXE_BS_PC_CSM_INIT 0x00000006
+#endif
+
+//Reported by DXE Core
+#define DXE_BDS_STARTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT)
+
+//Reported by BDS
+#define DXE_BDS_CONNECT_DRIVERS (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS)
+
+//Reported by Boot Manager
+#define DXE_READY_TO_BOOT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT)
+
+//Reported by DXE Core
+#define DXE_EXIT_BOOT_SERVICES (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
+#define DXE_EXIT_BOOT_SERVICES_EVENT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT)
+
+//Reported by driver that installs Runtime AP
+#define RT_SET_VIRTUAL_ADDRESS_MAP_BEGIN (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP)
+#define RT_SET_VIRTUAL_ADDRESS_MAP_END (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT)
+
+//Reported by CSM
+#define DXE_LEGACY_OPROM_INIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT)
+#define DXE_LEGACY_BOOT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT)
+#define DXE_LEGACY_OPROM_NO_SPACE (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE)
+
+//Reported by SETUP
+#define DXE_SETUP_START (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_USER_SETUP)
+#define DXE_SETUP_INPUT_WAIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_INPUT_WAIT)
+#define DXE_INVALID_PASSWORD (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_INVALID_PASSWORD)
+#define DXE_INVALID_IDE_PASSWORD (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_INVALID_IDE_PASSWORD)
+#define DXE_BOOT_OPTION_LOAD_ERROR (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_BOOT_OPTION_LOAD_ERROR)
+#define DXE_BOOT_OPTION_FAILED (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_BOOT_OPTION_FAILED)
+
+//Reported by a Driver that installs Reset AP
+#define DXE_RESET_SYSTEM (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_RESET_SYSTEM)
+#define DXE_RESET_NOT_AVAILABLE (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_PS_EC_RESET_NOT_AVAILABLE)
+
+// Reported by PCI bus driver
+#define DXE_PCI_BUS_BEGIN (EFI_IO_BUS_PCI | EFI_IOB_PC_INIT)
+#define DXE_PCI_BUS_ENUM (EFI_IO_BUS_PCI | EFI_IOB_PCI_BUS_ENUM)
+#define DXE_PCI_BUS_HPC_INIT (EFI_IO_BUS_PCI | EFI_IOB_PCI_HPC_INIT)
+#define DXE_PCI_BUS_REQUEST_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_PCI_RES_ALLOC)
+#define DXE_PCI_BUS_ASSIGN_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_PC_ENABLE)
+#define DXE_PCI_BUS_HOTPLUG (EFI_IO_BUS_PCI | EFI_IOB_PC_HOTPLUG)
+#define DXE_PCI_BUS_OUT_OF_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT)
+
+// Reported by USB bus driver
+#define DXE_USB_BEGIN (EFI_IO_BUS_USB | EFI_IOB_PC_INIT)
+#define DXE_USB_RESET (EFI_IO_BUS_USB | EFI_IOB_PC_RESET)
+#define DXE_USB_DETECT (EFI_IO_BUS_USB | EFI_IOB_PC_DETECT)
+#define DXE_USB_ENABLE (EFI_IO_BUS_USB | EFI_IOB_PC_ENABLE)
+#define DXE_USB_HOTPLUG (EFI_IO_BUS_USB | EFI_IOB_PC_HOTPLUG)
+
+//Reported by IDE bus driver
+#define DXE_IDE_BEGIN (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_INIT)
+#define DXE_IDE_RESET (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_RESET)
+#define DXE_IDE_DETECT (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_DETECT)
+#define DXE_IDE_ENABLE (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_ENABLE)
+#define DXE_IDE_SMART_ERROR (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
+#define DXE_IDE_CONTROLLER_ERROR (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_CONTROLLER_ERROR)
+#define DXE_IDE_DEVICE_FAILURE (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_INTERFACE_ERROR)
+
+// Reported by SCSI bus driver
+#define DXE_SCSI_BEGIN (EFI_IO_BUS_SCSI | EFI_IOB_PC_INIT)
+#define DXE_SCSI_RESET (EFI_IO_BUS_SCSI | EFI_IOB_PC_RESET)
+#define DXE_SCSI_DETECT (EFI_IO_BUS_SCSI | EFI_IOB_PC_DETECT)
+#define DXE_SCSI_ENABLE (EFI_IO_BUS_SCSI | EFI_IOB_PC_ENABLE)
+
+// Reported by Super I/O driver
+#define DXE_SIO_INIT (EFI_IO_BUS_LPC | EFI_IOB_PC_INIT)
+
+// Reported by Keyboard driver
+#define DXE_KEYBOARD_INIT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_INIT)
+#define DXE_KEYBOARD_RESET (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_RESET)
+#define DXE_KEYBOARD_DISABLE (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_DISABLE)
+#define DXE_KEYBOARD_DETECT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_KEYBOARD_ENABLE (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_ENABLE)
+#define DXE_KEYBOARD_CLEAR_BUFFER (EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_CLEAR_BUFFER)
+#define DXE_KEYBOARD_SELF_TEST (EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_SELF_TEST)
+
+// Reported by Mouse driver
+#define DXE_MOUSE_INIT (EFI_PERIPHERAL_MOUSE | EFI_P_PC_INIT)
+#define DXE_MOUSE_RESET (EFI_PERIPHERAL_MOUSE | EFI_P_PC_RESET)
+#define DXE_MOUSE_DISABLE (EFI_PERIPHERAL_MOUSE | EFI_P_PC_DISABLE)
+#define DXE_MOUSE_DETECT (EFI_PERIPHERAL_MOUSE | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_MOUSE_ENABLE (EFI_PERIPHERAL_MOUSE | EFI_P_PC_ENABLE)
+
+// Reported by Mass Storage drivers
+#define DXE_FIXED_MEDIA_INIT (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_INIT)
+#define DXE_FIXED_MEDIA_RESET (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_RESET)
+#define DXE_FIXED_MEDIA_DISABLE (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_DISABLE)
+#define DXE_FIXED_MEDIA_DETECT (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_FIXED_MEDIA_ENABLE (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_ENABLE)
+#define DXE_REMOVABLE_MEDIA_INIT (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_INIT)
+#define DXE_REMOVABLE_MEDIA_RESET (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_RESET)
+#define DXE_REMOVABLE_MEDIA_DISABLE (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_DISABLE)
+#define DXE_REMOVABLE_MEDIA_DETECT (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_REMOVABLE_MEDIA_ENABLE (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_ENABLE)
+#define DXE_REMOVABLE_MEDIA_DETECTED (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_DETECTED)
+#define DXE_REMOVABLE_MEDIA_DISABLED (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_EC_DISABLED)
+//
+// Reset/Sleep conditions specific to CRK that map to a port80 code.
+//
+#define CRK_DXE_RESET 8 // Action qualifier. (bits 2:0) of error code == PCH_RESET_TYPE when sleep == 1.
+//
+// Progress code reflects a legitimate HW forced transition to S5 via GPIO activated PWRBTN.
+#define PWRBTN_SHUTDOWN (EFI_SOFTWARE_SMM_DRIVER | EFI_SUBCLASS_SPECIFIC | 7)
+
+// If sleep bit and progress type: ProgressCode(2:0) == 7 and represent legitimate SW request for S5 transition.
+// If sleep bit and error type: ProgressCode(2:0) == state of the field represented by the sleep request prior to mapping to S5.
+#define SLEEP_SHUTDOWN (EFI_SOFTWARE_SMM_DRIVER | EFI_OEM_SPECIFIC | 7)
+
+// If sleep bit and error type: ProgressCode(2:0) == PCH_RESET_TYPE request forced to transition to S5.
+#define DXE_RESET_ERROR (EFI_SOFTWARE_DXE_RT_DRIVER | EFI_OEM_SPECIFIC | CRK_DXE_RESET)
+
+// Reported by BDS
+#define DXE_CON_OUT_CONNECT (EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_INIT)
+#define DXE_CON_IN_CONNECT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_INIT)
+#define DXE_NO_CON_OUT (EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED)
+#define DXE_NO_CON_IN (EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED)
+
+#define DXE_CMOS_CLR_REQUEST (EFI_SOFTWARE_AL | EFI_SW_EC_CFG_CLR_REQUEST)
+#define DXE_WATCHDOG_TIMER_EXPIRED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_TIMER_EXPIRED)
+
+#define EFI_IOB_PCI_EXP_VGA_ILLEAGL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+
+#define EFI_CU_QPI_ERROR (EFI_OEM_SPECIFIC | 0x00000005)
+#define EFI_CU_QPI_LINK_DOWN (EFI_COMPUTING_UNIT | 0x000A0000)
+
+
+#endif
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaFpkConfigLib.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaFpkConfigLib.h
new file mode 100644
index 0000000000..bdd42b2d69
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaFpkConfigLib.h
@@ -0,0 +1,55 @@
+/** @file
+ UBA FPK configuration library header
+
+ @copyright
+ Copyright 2016 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _UBA_FPK_CONFIG_LIB_H
+#define _UBA_FPK_CONFIG_LIB_H
+
+#include <Base.h>
+#include <Uefi.h>
+#include <Library/GpioLib.h>
+
+#define PLATFORM_FPK_CONFIG_SIGNATURE SIGNATURE_32 ('P', 'F', 'P', 'K')
+#define PLATFORM_FPK_CONFIG_VERSION 01
+
+// {38F0930C-E7FB-49CC-B88E-D9909EB65D77}
+#define PLATFORM_FPK_CONFIG_DATA_GUID \
+{ 0x38f0930c, 0xe7fb, 0x49cc, { 0xb8, 0x8e, 0xd9, 0x90, 0x9e, 0xb6, 0x5d, 0x77 } }
+
+typedef enum {
+ PortMappedToFunc0,
+ PortMappedToFunc1,
+ PortMappedToFunc2,
+ PortMappedToFunc3,
+ PortNotMapped
+} PLATFORM_FPK_PORT_MAP;
+
+typedef struct _PLATFORM_FPK_CONFIG_STRUCT {
+ UINT32 Signature;
+ UINT32 Version;
+ PLATFORM_FPK_PORT_MAP *PortToFuncMapPtr;
+ UINTN PortToFuncMapSize;
+ GPIO_PAD PciDisNGpioPad;
+ GPIO_PAD LanDisNGpioPad;
+} PLATFORM_FPK_CONFIG_STRUCT;
+
+/**
+ Retrieves FPK config struct from UBA database
+
+ @retval EFI_SUCCESS Config struct is retrieved.
+ @retval EFI_NOT_FOUND UBA protocol, platform or data not found.
+ @retval EFI_INVALID_PARAMETER If PlatformFpkConfigStruct is NULL.
+**/
+EFI_STATUS
+FpkConfigGetConfigStruct (
+ OUT PLATFORM_FPK_CONFIG_STRUCT *PlatformFpkConfigStruct
+ );
+
+STATIC EFI_GUID gPlatformFpkConfigDataGuid = PLATFORM_FPK_CONFIG_DATA_GUID;
+
+#endif // !_UBA_FPK_CONFIG_LIB_H
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSmbiosUpdateLib.h b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSmbiosUpdateLib.h
new file mode 100644
index 0000000000..9ea87b62df
--- /dev/null
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Include/Library/UbaSmbiosUpdateLib.h
@@ -0,0 +1,275 @@
+/** @file
+ UBA smbios Update Library Header File.
+
+ @copyright
+ Copyright 2012 - 2015 Intel Corporation. <BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _UBA_SMBIOS_UPDATE_LIB_
+#define _UBA_SMBIOS_UPDATE_LIB_
+
+#include <Base.h>
+#include <Uefi.h>
+#include <IndustryStandard/SmBios.h>
+
+
+typedef enum
+{
+ SmbiosDelayUpdate,
+ SmbiosNormalUpdate,
+} SmbiosUpdateType;
+
+
+#define PLATFORM_SMBIOS_UPDATE_SIGNATURE SIGNATURE_32 ('P', 'S', 'M', 'B')
+#define PLATFORM_SMBIOS_UPDATE_VERSION 01
+
+// {AAC6CAFD-42C6-440a-B958-9FD4C84B50EA}
+STATIC EFI_GUID gPlatformSmbiosConfigDataGuid =
+{ 0xaac6cafd, 0x42c6, 0x440a, { 0xb9, 0x58, 0x9f, 0xd4, 0xc8, 0x4b, 0x50, 0xea } };
+
+
+/**
+ Callback function for SMBIOS dynamic update.
+
+ @param Smbios The SMBIOS data buffer pointer.
+ @param BufferSize The SMBIOS data buffer size allocated for you.
+ @param Instance Instance number for this type.
+
+ @retval EFI_INVALID_PARAMETER Check your register data if the call return this error.
+ @retval EFI_NOT_FOUND The data process have error occur.
+ @retval EFI_SUCCESS Data have been updated successfully.
+
+**/
+typedef
+EFI_STATUS
+(*SMBIOS_UPDATE_CALLBACK) (
+ VOID
+);
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Version;
+
+ UINT32 PlatformType;
+ SmbiosUpdateType UpdateType; // DelayUpdate or NormalUpdate
+ SMBIOS_UPDATE_CALLBACK CallUpdate;
+} SMBIOS_UPDATE_DATA;
+
+/**
+ Provide the RegData and register a callback for dynamic update SMBIOS data.
+
+ @param RegData Callback register data.
+
+ @retval EFI_NOT_FOUND Data log protocol not found.
+ @retval EFI_OUT_OF_RESOURCES Data was not logged due to lack of system resources.
+ @retval EFI_SUCCESS Data have been updated successfully.
+
+**/
+EFI_STATUS
+PlatformRegisterSmbiosUpdate (
+ IN SMBIOS_UPDATE_DATA *RegData
+);
+
+/**
+ Update a String for a filled SMBIOS data structure, the structure must be filled
+ before update string.
+ This function update a string indicated by StringNumber to the tail of SMBIOS
+ structure.
+
+ @param Smbios SMBIOS structure data buffer pointer.
+ @param BufferSize SMBIOS structure data buffer size.
+ @param StringNumber The string index number of SMBIOS structure.
+ @param String String want to update.
+
+ @retval EFI_OUT_OF_RESOURCES No enough memory for this action.
+ @retval EFI_SUCCESS String updated successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosUpdateString (
+ IN OUT SMBIOS_STRUCTURE_POINTER Smbios,
+ IN UINTN BufferSize,
+ IN UINTN StringNumber,
+ IN CHAR16 *String
+);
+
+/**
+ Get SMBIOS data structure length, include the string in tail.
+
+ @param Smbios SMBIOS structure data buffer pointer.
+ @param TypeSize SMBIOS structure size.
+
+ @retval EFI_INVALID_PARAMETER Input paramter invalid.
+ @retval EFI_SUCCESS Caculate data structure size successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosGetTypeLength (
+ IN OUT SMBIOS_STRUCTURE_POINTER Smbios,
+ IN OUT UINTN *TypeSize
+);
+
+/**
+ Add a new SMBIOS structure into SMBIOS database.
+
+ @param Smbios SMBIOS structure data buffer pointer.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Add data structure successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosAddNew (
+ IN SMBIOS_STRUCTURE_POINTER SmbiosPtr
+);
+
+/**
+ Get the number of instance of SMBIOS type structure in SMBIOS database.
+ return 0 means no instance for this type now.
+
+ @param Type SMBIOS type.
+
+ @retval Count Number of instance.
+
+**/
+UINTN
+PlatformSmbiosGetInstanceCount (
+ IN UINT8 Type
+);
+
+/**
+ Get SMBIOS type data structure in SMBIOS database.
+
+ This function give you a pointer of SMBIOS structure directly in the database, you can update
+ the value in formated structure area and it's take affect immediately, but never directly or
+ call PlatformSmbiosUpdateString to edit the string in this buffer,
+ use PlatformSmbiosGetEditCopy->PlatformSmbiosUpdateType instead.
+
+ One of the SmbiosPtr or Handle must be valid value.
+
+ @param Type SMBIOS type.
+ @param Instance The instance of this type.
+ @param SmbiosPtr Optional parameter, on input, pass a pointer of SMBIOS_STRUCTURE_POINTER
+ to this function.
+ On output, return the SMBIOS data pointer in SmbiosPtr.
+ @param Handle Optional parameter, on input, pass a pointer of Handle.
+ On output, return the SMBIOS data handle value
+
+ @retval EFI_INVALID_PARAMETER Both the SmbiosPtr and Handle is NULL.
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Get structure data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosGetInstance (
+ IN UINT8 Type,
+ IN UINTN Instance,
+ IN OUT SMBIOS_STRUCTURE_POINTER *SmbiosPtr,
+ IN OUT UINT16 *Handle
+);
+
+/**
+ Get a copy of SMBIOS type structure data in SMBIOS database.
+ Must allocate memory large enough first, then call this function to get the copy.
+
+ @param Type SMBIOS type.
+ @param Instance The instance of this type.
+ @param SmbiosPtr A valid buffer pointer which SMBIOS data will copy to this buffer.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Get structure data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosGetEditCopy (
+ IN UINT8 Type,
+ IN UINTN Instance,
+ IN OUT SMBIOS_STRUCTURE_POINTER SmbiosPtr
+);
+
+/**
+ Update a string which in SMBIOS database.
+ The data structure which string belong to must installed before.
+
+ @param Type SMBIOS type.
+ @param Instance The instance of this type.
+ @param StringNumber The string number.
+ @param String The string want to update.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Update data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosUpdateInstalledString (
+ IN UINT8 Type,
+ IN UINTN Instance,
+ IN UINTN StringNumber,
+ IN CHAR16 *String
+);
+
+/**
+ Remove a SMBIOS instance in SMBIOS database.
+
+ @param Type SMBIOS type.
+ @param Instance The instance of this type.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Remove data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosRemoveType (
+ IN UINT8 Type,
+ IN UINTN Instance
+);
+
+/**
+ Remove all the instance of specific SMBIOS type in SMBIOS database.
+
+ @param Type SMBIOS type.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Remove data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosRemoveAll (
+ IN UINT8 Type
+);
+
+/**
+ Update SMBIOS data structure in database with new structure data.
+
+ @param Type SMBIOS type.
+ @param Instance The instance of this type.
+ @param SmbiosPtr A valid buffer pointer which new SMBIOS data stored.
+
+ @retval EFI_NOT_FOUND SMBIOS protocol not installed.
+ @retval EFI_SUCCESS Update data successfully.
+
+**/
+EFI_STATUS
+PlatformSmbiosUpdateType (
+ IN UINT8 Type,
+ IN UINTN Instance,
+ IN SMBIOS_STRUCTURE_POINTER SmbiosPtr
+);
+
+/**
+ Function provide to DXE driver, which initial the dynamic update.
+
+ @param NULL
+
+ @retval EFI_NOT_FOUND Required protocol not found.
+ @retval EFI_SUCCESS Init successfully.
+
+**/
+EFI_STATUS
+PlatformInitSmbiosUpdate (
+ VOID
+);
+
+#endif //_UBA_SMBIOS_UPDATE_LIB_
diff --git a/Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf b/Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf
index 219512566c..57ec872e33 100644
--- a/Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf
+++ b/Platform/Intel/WhitleyOpenBoardPkg/Library/BoardInitLib/BoardInitDxeLib.inf
@@ -27,6 +27,7 @@
WhitleySiliconPkg/SiliconPkg.dec
WhitleySiliconPkg/CpRcPkg.dec
WhitleyOpenBoardPkg/PlatformPkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
IoLib
--
2.27.0.windows.1
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