[edk2-devel] [edk2-platform][PATCH 2/3] Silicon/Qemu: Add PCD for Serial port GSI

[Tomas Pilar (tpilar)]

The UART specified in the SPCR table needs a GSI assigned
to it. The EDK2 will not use it because it does not use
interrupts, but it is necessary for OS boot.

Parametrize the value of the GSI assigned to the UART using
a PCD so that it might be specified in the platform DSC file.

Cc: Leif Lindholm <leif at nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel at arm.com>
Cc: Tanmay Jagdale <tanmay.jagdale at linaro.org>
Signed-off-by: Tomas Pilar <tomas at nuviainc.com>
---
 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 +
 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl       | 2 +-
 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc      | 2 +-
 Silicon/Qemu/SbsaQemu/SbsaQemu.dec              | 3 +++
 4 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
index 1ce7e12890..10ece22d9d 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
@@ -68,6 +68,7 @@
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit
+  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSerialGlobalSystemInterrupt
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
 
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 307e031a7b..f5a709083e 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "LINARO", "SBSAQEMU",
         Memory32Fixed (ReadWrite,
                        FixedPcdGet32 (PcdSerialRegisterBase),
                        0x00001000)
-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 33 }
+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { FixedPcdGet32 (PcdSerialGlobalSystemInterrupt) }
       })
     }
 
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc
index 0c3b627fc7..ff787bd8bf 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc
@@ -29,7 +29,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
   },
   EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC,
   0,                      /* Irq */
-  33,                     /* GlobalSystemInterrupt */
+  FixedPcdGet32 (PcdSerialGlobalSystemInterrupt),
   EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200,
   EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY,
   EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1,
diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 2831781c4e..b53c5b82e9 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -47,6 +47,9 @@
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize|0x10000000|UINT64|0x00000009
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit|0xFFFFFFFF|UINT64|0x000000a
 
+  # GSI for the UART. Recall that GSIs are offset by 32.
+  gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSerialGlobalSystemInterrupt|33|UINT32|0x0000000b
+
 [PcdsDynamic.common]
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000100
   gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x00000101
-- 
2.25.1



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