[edk2-devel] [PATCH v3 1/7] Platform/RaspberryPi: Add XHCI/PCI selection menu
Jeremy Linton
jeremy.linton at arm.com
Fri Aug 20 04:16:13 UTC 2021
Arm has standardized a PCI SMC conduit that can be used
to access the PCI config space in a standardized way. This
functionality doesn't yet exist in many OS/Distro's. Lets
add another advanced config item that allows the user
to toggle between presenting the XHCI on the base RPi4
as a platform device, or presenting this newer PCIe
conduit. The CM4 doesn't have an attached XHCI controller
soldered to the PCIe, so PCIe mode is the default.
Signed-off-by: Jeremy Linton <jeremy.linton at arm.com>
---
Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 42 ++++++++++++++++++++++
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf | 1 +
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni | 5 +++
.../RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr | 17 +++++++++
Platform/RaspberryPi/Include/ConfigVars.h | 4 +++
Platform/RaspberryPi/RPi3/RPi3.dsc | 6 ++++
Platform/RaspberryPi/RPi4/RPi4.dsc | 8 +++++
Platform/RaspberryPi/RaspberryPi.dec | 1 +
8 files changed, 84 insertions(+)
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
index 9e78cb47ad..87f6b4e7bb 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
@@ -43,6 +43,7 @@ extern UINT8 ConfigDxeStrings[];
STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol;
STATIC UINT32 mModelFamily = 0;
STATIC UINT32 mModelInstalledMB = 0;
+STATIC UINT32 mModelRevision = 0;
STATIC EFI_MAC_ADDRESS mMacAddress;
@@ -271,6 +272,40 @@ SetupVariables (
ASSERT_EFI_ERROR (Status);
}
+ if (mModelFamily >= 4) {
+ if (((mModelRevision >> 4) & 0xFF) == 0x14) {
+ /*
+ * Enable PCIe by default on CM4
+ */
+ Status = PcdSet32S (PcdXhciPci, 2);
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ Size = sizeof (UINT32);
+ Status = gRT->GetVariable (L"XhciPci",
+ &gConfigDxeFormSetGuid,
+ NULL, &Size, &Var32);
+ if (EFI_ERROR (Status) || (Var32 == 0)) {
+ /*
+ * Enable XHCI by default
+ */
+ Status = PcdSet32S (PcdXhciPci, 0);
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ /*
+ * Enable PCIe
+ */
+ Status = PcdSet32S (PcdXhciPci, 1);
+ ASSERT_EFI_ERROR (Status);
+ }
+ }
+ } else {
+ /*
+ * Disable PCIe and XHCI
+ */
+ Status = PcdSet32S (PcdXhciPci, 0);
+ ASSERT_EFI_ERROR (Status);
+ }
+
Size = sizeof (AssetTagVar);
Status = gRT->GetVariable (L"AssetTag",
&gConfigDxeFormSetGuid,
@@ -888,6 +923,13 @@ ConfigInitialize (
DEBUG ((DEBUG_INFO, "Current Raspberry Pi installed RAM size is %d MB\n", mModelInstalledMB));
}
+ Status = mFwProtocol->GetModelRevision (&mModelRevision);
+ if (Status != EFI_SUCCESS) {
+ DEBUG ((DEBUG_ERROR, "Couldn't get the Raspberry Pi revision: %r\n", Status));
+ } else {
+ DEBUG ((DEBUG_INFO, "Current Raspberry Pi revision %x\n", mModelRevision));
+ }
+
Status = SetupVariables ();
if (Status != EFI_SUCCESS) {
DEBUG ((DEBUG_ERROR, "Couldn't not setup NV vars: %r\n", Status));
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
index 4bb2d08550..e6e22ad82e 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.inf
@@ -94,6 +94,7 @@
gRaspberryPiTokenSpaceGuid.PcdFanOnGpio
gRaspberryPiTokenSpaceGuid.PcdFanTemp
gRaspberryPiTokenSpaceGuid.PcdUartInUse
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci
[Depex]
gPcdProtocolGuid AND gRaspberryPiFirmwareProtocolGuid
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
index 466fa852cb..5ec17072c3 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.uni
@@ -57,6 +57,11 @@
#string STR_ADVANCED_FANTEMP_PROMPT #language en-US "ACPI fan temperature"
#string STR_ADVANCED_FANTEMP_HELP #language en-US "Cycle a fan at C"
+#string STR_ADVANCED_XHCIPCI_PROMPT #language en-US "ACPI XHCI/PCIe"
+#string STR_ADVANCED_XHCIPCI_HELP #language en-US "OS sees XHCI USB platform device or PCIe bridge"
+#string STR_ADVANCED_XHCIPCI_XHCI #language en-US "XHCI"
+#string STR_ADVANCED_XHCIPCI_PCIE #language en-US "PCIe"
+
#string STR_ADVANCED_ASSET_TAG_PROMPT #language en-US "Asset Tag"
#string STR_ADVANCED_ASSET_TAG_HELP #language en-US "Set the system Asset Tag"
diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
index fa34eab809..18b3ec726e 100644
--- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
+++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxeHii.vfr
@@ -56,6 +56,11 @@ formset
name = FanTemp,
guid = CONFIGDXE_FORM_SET_GUID;
+ efivarstore ADVANCED_XHCIPCI_VARSTORE_DATA,
+ attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ name = XhciPci,
+ guid = CONFIGDXE_FORM_SET_GUID;
+
efivarstore SYSTEM_TABLE_MODE_VARSTORE_DATA,
attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
name = SystemTableMode,
@@ -212,6 +217,18 @@ formset
default = 60,
endnumeric;
endif;
+
+ suppressif ideqval XhciPci.Value == 2;
+ grayoutif NOT ideqval SystemTableMode.Mode == SYSTEM_TABLE_MODE_ACPI;
+ oneof varid = XhciPci.Value,
+ prompt = STRING_TOKEN(STR_ADVANCED_XHCIPCI_PROMPT),
+ help = STRING_TOKEN(STR_ADVANCED_XHCIPCI_HELP),
+ flags = NUMERIC_SIZE_4 | INTERACTIVE | RESET_REQUIRED,
+ option text = STRING_TOKEN(STR_ADVANCED_XHCIPCI_XHCI), value = 0, flags = DEFAULT;
+ option text = STRING_TOKEN(STR_ADVANCED_XHCIPCI_PCIE), value = 1, flags = 0;
+ endoneof;
+ endif;
+ endif;
#endif
string varid = AssetTag.AssetTag,
prompt = STRING_TOKEN(STR_ADVANCED_ASSET_TAG_PROMPT),
diff --git a/Platform/RaspberryPi/Include/ConfigVars.h b/Platform/RaspberryPi/Include/ConfigVars.h
index 142317985a..a5b32b5284 100644
--- a/Platform/RaspberryPi/Include/ConfigVars.h
+++ b/Platform/RaspberryPi/Include/ConfigVars.h
@@ -77,6 +77,10 @@ typedef struct {
} ADVANCED_FANTEMP_VARSTORE_DATA;
typedef struct {
+ UINT32 Value;
+} ADVANCED_XHCIPCI_VARSTORE_DATA;
+
+typedef struct {
#define SYSTEM_TABLE_MODE_ACPI 0
#define SYSTEM_TABLE_MODE_BOTH 1
#define SYSTEM_TABLE_MODE_DT 2
diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc
index 1c8a5408e7..6ab5d1ae6d 100644
--- a/Platform/RaspberryPi/RPi3/RPi3.dsc
+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
@@ -520,6 +520,12 @@
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0
+ # Select XHCI/PCIe mode (not valid on rpi3)
+ #
+ # 0 - DISABLED
+ #
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0x0|0
+
#
# Common UEFI ones.
#
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index dcf9bb5f11..babcbb2f41 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -536,6 +536,14 @@
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|L"ResetDelay"|gRaspberryPiTokenSpaceGuid|0x0|0
+ # Select XHCI/PCIe mode
+ #
+ # 0 - XHCI Enabled (default on !cm4)
+ # 1 - PCIe Enabled
+ # 2 - PCIe Enabled (default on cm4)
+ #
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|L"XhciPci"|gConfigDxeFormSetGuid|0x0|0
+
#
# Common UEFI ones.
#
diff --git a/Platform/RaspberryPi/RaspberryPi.dec b/Platform/RaspberryPi/RaspberryPi.dec
index 2ca25ff9e6..797be59274 100644
--- a/Platform/RaspberryPi/RaspberryPi.dec
+++ b/Platform/RaspberryPi/RaspberryPi.dec
@@ -71,3 +71,4 @@
gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay|0|UINT32|0x0000001E
gRaspberryPiTokenSpaceGuid.PcdMmcEnableDma|0|UINT32|0x0000001F
gRaspberryPiTokenSpaceGuid.PcdUartInUse|1|UINT32|0x00000021
+ gRaspberryPiTokenSpaceGuid.PcdXhciPci|0|UINT32|0x00000022
--
2.13.7
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