[edk2-devel] [PATCH edk2-platforms 3/4] Platform/AMD/Styx: implement PCIe _DSM #5 to preserve boot allocations
Ard Biesheuvel
ard.biesheuvel at arm.com
Fri Jan 8 14:28:49 UTC 2021
Now that we have gained support for resizable BARs in EDK2, there is no
longer a need for the OS to reallocate MMIO BAR resources. So let's
implement _DSM #5 properly to inform the OS that boot time allocations
may be preserved.
While at it, clean up the implementation of _DSM, and only retain the
methods that we actually need: #0 exposing the fact that #0 and #5 are
the only ones implemented, and #5 as explained above.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel at arm.com>
---
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl | 82 +-------------------
1 file changed, 2 insertions(+), 80 deletions(-)
diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
index 2ee6ea3b1eb1..53ad25ea9a2f 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/Dsdt.asl
@@ -434,92 +434,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3)
// Function 0: Return supported functions
//
case(0) {
- Return (Buffer() {0xFF})
- }
-
- //
- // Function 1: Return PCIe Slot Information
- //
- case(1) {
- Return (Package(2) {
- One, // Success
- Package(3) {
- 0x1, // x1 PCIe link
- 0x1, // PCI express card slot
- 0x1 // WAKE# signal supported
- }
- })
- }
-
- //
- // Function 2: Return PCIe Slot Number.
- //
- case(2) {
- Return (Package(1) {
- Package(4) {
- 2, // Source ID
- 4, // Token ID: ID refers to a slot
- 0, // Start bit of the field to use.
- 7 // End bit of the field to use.
- }
- })
- }
-
- //
- // Function 3: Return Vendor-specific Token ID Strings.
- //
- case(3) {
- Return (Package(0) {})
- }
-
- //
- // Function 4: Return PCI Bus Capabilities
- //
- case(4) {
- Return (Package(2) {
- One, // Success
- Buffer() {
- 1,0, // Version
- 0,0, // Status, 0:Success
- 24,0,0,0, // Length
- 1,0, // PCI
- 16,0, // Length
- 0, // Attributes
- 0x0D, // Current Speed/Mode
- 0x3F,0, // Supported Speeds/Modes
- 0, // Voltage
- 0,0,0,0,0,0,0 // Reserved
- }
- })
+ Return (Buffer() {0x21})
}
//
// Function 5: Return Ignore PCI Boot Configuration
//
case(5) {
- Return (Package(1) {1})
- }
-
- //
- // Function 6: Return LTR Maximum Latency
- //
- case(6) {
- Return (Package(4) {
- Package(1){0}, // Maximum Snoop Latency Scale
- Package(1){0}, // Maximum Snoop Latency Value
- Package(1){0}, // Maximum No-Snoop Latency Scale
- Package(1){0} // Maximum No-Snoop Latency Value
- })
- }
-
- //
- // Function 7: Return PCI Express Naming
- //
- case(7) {
- Return (Package(2) {
- Package(1) {0},
- Package(1) {Unicode("PCI0")}
- })
+ Return (0)
}
//
--
2.17.1
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