[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

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https://bugzilla.redhat.com/show_bug.cgi?id=468516





--- Comment #15 from Lane <dirjud at gmail.com>  2009-01-01 11:26:33 EDT ---
This is a URL correction of Comment #13

I have an updated spec and src file you can download from:
Spec URL: http://brooks.nu/~lane/verilator.spec
SRPM URL: http://brooks.nu/~lane/verilator-3.681-1.fc10.src.rpm

I incorporated Chitlesh's feedback from Comment #7 and Comment #9 except for
item #004 from Comment #7 as I do not understand this suggestion.

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