[Bug 468516] Review Request: verilator - A fast simulator of synthesizable Verilog HDL

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https://bugzilla.redhat.com/show_bug.cgi?id=468516





--- Comment #14 from Lane <dirjud at gmail.com>  2009-01-01 11:25:42 EDT ---
Chitlesh,

I would like to get verilator into Fedora 11 if it is not already too late. 
Can you give me a summary of the milestones and dates that are required to
accomplish that?  This will help me as I am still extremely swamped with a
tapeout.  With the milestone list I can make the necessary time to get this
done.

Lane

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